Intersil HA7-2510/883 High slew rate operational amplifier Datasheet

HA-2510/883
®
High Slew Rate Operational Amplifier
October 26, 2004
Features
Description
• This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
The HA-2510/883 is a high performance operational amplifier which sets the standards for maximum slew rate and
wide bandwidth operation in moderately powered, internally
compensated, monolithic devices. In addition to excellent
dynamic characteristics, this dielectrically isolated amplifier
also offers low offset current and high input impedance.
• High Slew Rate . . . . . . . . . . . . . . . . . . . . . . .50V/µs (Min)
65V/µs (Typ)
• Wide Power Bandwidth . . . . . . . . . . . . . . . 750kHz (Min)
• Internally Compensated For Unity Gain Stability
The ±50V/µs minimum slew rate and fast settling time of
the HA-2510/883 are ideally suited for high speed D/A, A/D,
and pulse amplification designs. The HA-2510/883’s superior bandwidth and 750kHz minimum full power bandwidth
are extremely useful in RF and video applications. To insure
compliance with slew rate and transient response specifications, all devices are 100% tested for AC performance characteristics over full temperature limits. To improve signal
conditioning accuracy, the HA-2510/883 provides a maximum offset current of 25nA and a minimum input impedance
of 50MΩ, both at 25oC, as well as offset voltage adjust capability.
Applications
Ordering Information
• Low Offset Current . . . . . . . . . . . . . . . . . . . . 25nA (Min)
10nA (Typ)
• High Input Impedance . . . . . . . . . . . . . . . . . 50MΩ (Min)
100MΩ (Typ)
• Wide Small Signal Bandwidth. . . . . . . . . . .12MHz (Typ)
• Fast Settling Time (0.1% of 10V Step) . . . . 250ns (Typ)
• Low Quiescent Supply Current . . . . . . . . . . 6mA (Max)
• Data Acquisition Systems
PART NUMBER
TEMP.
RANGE (oC)
PACKAGE
PKG.
NO.
• RF Amplifiers
HA7-2510/883
• Video Amplifiers
-55 to 125
8 Ld CERDIP
F8.3A
• Signal Generators
• Pulse Amplification
Pinout
HA-2510/883
(CERDIP)
TOP VIEW
BAL
1
-IN
2
+IN
3
V-
4
+
8
COMP
7
V+
6
OUT
5
BAL
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002, 2004. All Rights Reserved
1
Spec Number
511003-883
FN3697.3
HA-2510/883
Absolute Maximum Ratings
Thermal Information
Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . . 40V
Differential Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V
Voltage at Either Input Terminal . . . . . . . . . . . . . . . . . . . . . . V+ to VPeak Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
ESD Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <2000V
Thermal Resistance (Typical, Note 1)
θJA
θJC
CERDIP Package . . . . . . . . . . . . . . . . . . 120oC/W 30oC/W
Package Power Dissipation Limit at 75oC for TJ ≤ 175oC
CERDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 870mW
Package Power Dissipation Derating Factor Above 75oC
CERDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.7mW/oC
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 175oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15V
VINCM ≤ 1/2 (V+ - V-)
RL ≥ 2kΩ
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief
TB379 for details.
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at: VSUPPLY = ±15V, RSOURCE = 100Ω, RLOAD = 500kΩ, VOUT = 0V, Unless Otherwise Specified.
PARAMETER
Input Offset
Voltage
Input Bias Current
SYMBOL
VIO
+IB
-IB
Input Offset
Current
Common Mode
Range
IIO
+CMR
-CMR
Large Signal
Voltage Gain
+AVOL
-AVOL
Common Mode
Rejection Ratio
+CMRR
-CMRR
CONDITIONS
VCM = 0V
VCM = 0V, +RS = 100kΩ, -RS = 100Ω
VCM = 0V, +RS = 100Ω, -RS = 100kΩ
VCM = 0V, +RS = 100kΩ, -RS = 100kΩ
V+ = 5V, V- = -25V
V+ = 25V, V- = -5V
VOUT = 0V and +10V, RL = 2kΩ
VOUT = 0V and -10V, RL = 2kΩ
∆VCM = +10V, V+ = +5V, V- = -25V,
VOUT = -10V
∆VCM = -10V, V+ = +25V, V- = -5V, VOUT
= +10V
GROUP A
SUBGROUPS
TEMP (oC)
MIN
MAX
UNITS
1
25
-8
8
mV
2, 3
125, -55
-18
10
mV
1
25
-200
200
nA
2, 3
125, -55
-400
400
nA
1
25
-200
200
nA
2, 3
125, -55
-400
400
nA
1
25
-25
25
nA
2, 3
125, -55
-50
50
nA
1
25
+10
-
V
2, 3
125, -55
+10
-
V
1
25
-
-10
V
2, 3
125, -55
-
-10
V
4
25
10
-
kV/V
5, 6
125, -55
7.5
-
kV/V
4
25
10
-
kV/V
5, 6
125, -55
7.5
-
kV/V
1
25
80
-
dB
2, 3
125, -55
80
-
dB
1
25
80
-
dB
2, 3
125, -55
80
-
dB
Spec Number
2
511003-883
HA-2510/883
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Tested at: VSUPPLY = ±15V, RSOURCE = 100Ω, RLOAD = 500kΩ, VOUT = 0V, Unless Otherwise Specified.
PARAMETER
Output Voltage
Swing
SYMBOL
+VOUT
-VOUT
Output Current
+IOUT
-IOUT
Quiescent Power
Supply Current
+ICC
-ICC
Power Supply
Rejection Ratio
+PSRR
-PSRR
Offset Voltage
Adjustment
+VIOAdj
-VIOAdj
CONDITIONS
RL = 2kΩ
RL = 2kΩ
VOUT = -10V
VOUT = +10V
VOUT = 0V,
IOUT = 0mA
VOUT = 0V,
IOUT = 0mA
∆VSUP = 10V, V+ = +20V, V- = -15V,
V+ = +10V, V- = -15V
∆VSUP = 10V, V+ = +15V, V- = -20V,
V+ = +15V, V- = -10V
Note 2
Note 2
GROUP A
SUBGROUPS
TEMP (oC)
MIN
MAX
UNITS
4
25
10
-
V
5, 6
125, -55
10
-
V
4
25
-
-10
V
5, 6
125, -55
-
-10
V
4
25
10
-
mA
5, 6
125, -55
7.5
-
mA
4
25
-
-10
mA
5, 6
125, -55
-
-7.5
mA
1
25
-
6
mA
2, 3
125, -55
-
6.5
mA
1
25
-6
-
mA
2, 3
125, -55
-6.5
-
mA
1
25
80
-
dB
2, 3
125, -55
80
-
dB
1
25
80
-
dB
2, 3
125, -55
80
-
dB
1
25
VIO-1
-
mV
2, 3
125, -55
VIO-1
-
mV
1
25
VIO+1
-
mV
2, 3
125, -55
VIO+1
-
mV
NOTE:
2. Offset adjustment range is [VIO (Measured) ±1mV] minimum referred to output. This test is for functionality only to assure adjustment
through 0V.
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at: VSUPPLY = ±15V, RSOURCE = 50Ω, RLOAD = 2kΩ, CLOAD = 50pF, AVCL = +1V/V, Unless Otherwise Specified.
PARAMETER
Slew Rate
SYMBOL
CONDITIONS
GROUP A
SUBGROUPS
TEMP (oC)
MIN
MAX
UNITS
+SR
VOUT = -5V to +5V, 25% ≤ +SR ≤ 75%
7
25
50
-
V/µs
8A, 8B
125, -55
45
-
V/µs
7
25
50
-
V/µs
8A, 8B
125, -55
45
-
V/µs
-SR
VOUT = +5V to -5V, 75% ≥ -SR ≥ 25%
Spec Number
3
511003-883
HA-2510/883
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Tested at: VSUPPLY = ±15V, RSOURCE = 50Ω, RLOAD = 2kΩ, CLOAD = 50pF, AVCL = +1V/V, Unless Otherwise Specified.
PARAMETER
SYMBOL
Rise and Fall
Time
VOUT = 0 to +200mV, 10% ≤ tr ≤ 90%
tr
VOUT = 0 to -200mV, 10% ≤ tf ≤ 90%
tf
Overshoot
CONDITIONS
+OS
-OS
VOUT = 0 to +200mV
VOUT = 0 to -200mV
GROUP A
SUBGROUPS
TEMP (oC)
MIN
MAX
UNITS
7
25
-
50
ns
8A, 8B
125, -55
-
60
ns
7
25
-
50
ns
8A, 8B
125, -55
-
60
ns
7
25
-
40
%
8A, 8B
125, -55
-
50
%
7
25
-
40
%
8A, 8B
125, -55
-
50
%
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Characterized at: VSUPPLY = ±15V, RLOAD = 2kΩ, CLOAD = 50pF, Unless Otherwise Specified.
PARAMETER
SYMBOL
Differential Input
Resistance
RIN
CONDITIONS
VCM = 0V
Full Power
Bandwidth
FPBW
VPEAK = 10V
Minimum Closed
Loop Stable Gain
CLSG
RL = 2kΩ, CL = 50pF
Quiescent Power
Consumption
PC
VOUT = 0V, IOUT = 0mA
NOTES
TEMP (oC)
MIN
MAX
UNITS
3
25
50
-
MΩ
3, 4
25
750
-
kHz
3
-55 to 125
1
-
V/V
3, 5
-55 to 125
-
195
mW
NOTES:
3. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These parameters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization
based upon data from multiple production runs which reflect lot to lot and within lot variation.
4. Full Power Bandwidth guarantee based on Slew Rate measurement using FPBW = Slew Rate/(2πVPEAK).
5. Quiescent Power Consumption based upon Quiescent Supply Current test maximum. (No load on outputs.)
TABLE 4. ELECTRICAL TEST REQUIREMENTS
MIL-STD-883 TEST REQUIREMENTS
SUBGROUPS (SEE TABLES 1 AND 2)
Interim Electrical Parameters (Pre Burn-In)
1
Final Electrical Test Parameters
1 (Note 6), 2, 3, 4, 5, 6, 7, 8A, 8B
Group A Test Requirements
1, 2, 3, 4, 5, 6, 7, 8A, 8B
Groups C and D Endpoints
1
NOTE:
6. PDA applies to Subgroup 1 only.
Spec Number
4
511003-883
HA-2510/883
Die Characteristics
WORST CASE CURRENT DENSITY:
DIE DIMENSIONS:
0.3 x 105 A/cm2
65 mils x 57 mils x 19 mils
1650µm x 1450µm x 483µm
SUBSTRATE POTENTIAL (Powered Up):
METALLIZATION:
Unbiased
Type: Al, 1% Cu
Thickness: 16kÅ ± 2kÅ
TRANSISTOR COUNT:
HA-2510/883: 40
GLASSIVATION:
PROCESS: Bipolar Dielectric Isolation
Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos.)
Silox Thickness: 12kÅ ± 2kÅ
Nitride Thickness: 3.5kÅ ± 1.5kÅ
Metallization Mask Layout
HA-2510/883
+IN
-IN
BAL
COMP
V-
V+
BAL
5
OUT
HA-2510/883
Burn-In Circuit
HA7-2510/883
1
R1
2
-
3
+
V+
7
6
4
VD2
8
5
C2
R1 = 1MΩ, ±5%, 1/4W (Min)
C1 = C2 = 0.01µF/Socket (Min) or 0.1µF/Row (Min)
C3 = 0.01µF/Socket (10%)
D1 = D2 = 1N4002 or Equivalent/Board
|(V+) - (V-)| = 30V
6
C3
C1
D1
HA-2510/883
Ceramic Dual-In-Line Frit Seal Packages (CERDIP)
F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A)
LEAD FINISH
c1
8 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE
-D-
-A-
BASE
METAL
INCHES
(c)
E
b1
M
M
(b)
-Bbbb S
C A-B S
SECTION A-A
D S
D
BASE
PLANE
Q
-C-
SEATING
PLANE
A
α
L
S1
eA
A A
b2
b
ccc M
C A-B S
e
eA/2
c
aaa M C A - B S D S
D S
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.200
-
5.08
-
b
0.014
0.026
0.36
0.66
2
b1
0.014
0.023
0.36
0.58
3
b2
0.045
0.065
1.14
1.65
-
b3
0.023
0.045
0.58
1.14
4
c
0.008
0.018
0.20
0.46
2
c1
0.008
0.015
0.20
0.38
3
D
-
0.405
-
10.29
5
E
0.220
0.310
5.59
7.87
5
e
0.100 BSC
2.54 BSC
-
eA
0.300 BSC
7.62 BSC
-
3.81 BSC
-
eA/2
NOTES:
L
1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded
area shown. The manufacturer’s identification shall not be used
as a pin one identification mark.
MILLIMETERS
0.150 BSC
0.125
0.200
3.18
5.08
-
Q
0.015
0.060
0.38
1.52
6
S1
0.005
-
0.13
-
7
α
90o
105o
90o
105o
-
aaa
-
0.015
-
0.38
-
bbb
-
0.030
-
0.76
-
3. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness.
ccc
-
0.010
-
0.25
-
M
-
0.0015
-
0.038
2, 3
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a
partial lead paddle. For this configuration dimension b3 replaces
dimension b2.
N
2. The maximum limits of lead dimensions b and c or M shall be
measured at the centroid of the finished lead surfaces, when
solder dip or tin plate lead finish is applied.
8
8
8
Rev. 0 4/94
5. This dimension allows for off-center lid, meniscus, and glass
overrun.
6. Dimension Q shall be measured from the seating plane to the
base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling dimension: INCH.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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