Renesas HAT1024R Silicon p channel power mosfet high speed power switching Datasheet

HAT1024R
Silicon P Channel Power MOS FET
High Speed Power Switching
REJ03G1146-0900
(Previous: ADE-208-476G)
Rev.9.00
Sep 07, 2005
Features
•
•
•
•
Low on-resistance
Capable of 4 V gate drive
Low drive current
High density mounting
Outline
RENESAS Package code: PRSP0008DD-D
(Package name: SOP-8 <FP-8DAV> )
7 8
D D
65
87
2
G
3
12
4
G
1, 3
2, 4
5, 6, 7, 8
4
S1
MOS1
Rev.9.00 Sep 07, 2005 page 1 of 7
5 6
D D
S3
MOS2
Source
Gate
Drain
HAT1024R
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Body-drain diode reverse drain current
Symbol
VDSS
Value
–30
Unit
V
VGSS
ID
±20
–3.5
V
A
–28
–3.5
A
A
Pch
Note 3
Pch
2
3
W
W
Tch
Tstg
150
–55 to +150
°C
°C
ID (pulse)
IDR
Note 1
Note 2
Channel dissipation
Channel dissipation
Channel temperature
Storage temperature
Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1%
2. 1 Drive operation: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW ≤ 10 s
3. 2 Drive operation: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW ≤ 10 s
Electrical Characteristics
(Ta = 25°C)
Item
Drain to source breakdown voltage
Symbol
V (BR) DSS
Min
–30
Typ
—
Max
—
Unit
V
Gate to source breakdown voltage
Gate to source leak current
V (BR) GSS
IGSS
±20
—
—
—
—
±10
V
µA
IG = ±100 µA, VDS = 0
VGS = ±16 V, VDS = 0
Zero gate voltage drain current
Gate to source cutoff voltage
IDSS
VGS (off)
—
–1.0
—
—
–10
–2.5
µA
V
VDS = –30 V, VGS = 0
VDS = –10 V, ID = –1 mA
Static drain to source on state resistance
RDS (on)
RDS (on)
—
—
0.12
0.2
0.16
0.34
Ω
Ω
ID = –2 A, VGS = –10 V
Note 4
ID = –2 A, VGS = –4 V
Forward transfer admittance
Input capacitance
|yfs|
Ciss
2.5
—
3.5
350
—
—
S
pF
Output capacitance
Reverse transfer capacitance
Coss
Crss
—
—
230
75
—
—
pF
pF
ID = –2 A, VDS = –10 V
VDS = –10 V
VGS = 0
f = 1 MHz
Turn-on delay time
Rise time
td (on)
tr
—
—
18
110
—
—
ns
ns
VGS = –4 V, ID = –2 A,
VDD ≅ –10 V
Turn-off delay time
Fall time
td (off)
tf
—
—
20
30
—
—
ns
ns
Body-drain diode forward voltage
Body-drain diode reverse recovery time
VDF
trr
—
—
–1.0
60
–1.5
—
V
ns
Note:
4. Pulse test
Rev.9.00 Sep 07, 2005 page 2 of 7
Test Conditions
ID = –10 mA, VGS = 0
Note 4
IF = –3.5 A, VGS = 0
IF = –3.5 A, VGS = 0
diF/dt = 20 A/µs
Note 4
Note 4
HAT1024R
Main Characteristics
Power vs. Temperature Derating
3.0
ive
Dr
1.0
ive
ion
at
er
Op
1
Op
er
at
ion
0
0
50
100
150
Ambient Temperature
10 µs
–30
Drain Current
Dr
2.0
–100
ID (A)
Test Condition:
When using the glass epoxy board
(FR4 40 × 40 × 1.6 mm), PW ≤ 10 s
2
Channel Dissipation
Pch (W)
4.0
Maximum Safe Operation Area
200
10
0
µ
1m s
s
–10
PW
=
Op
10
era
ms
tio
n(
P
N
W ote
Operation in
≤1 5
this area is
0s
)
limited by RDS (on)
DC
–3
–1
–0.3
–0.1
Ta = 25°C
–0.03 1 shot pulse
1 Drive Operation
–0.01
–1
–3
–0.1 –0.3
–10
–30
–100
Drain to Source Voltage VDS (V)
Ta (°C)
Note 5:
When using the glass epoxy board
(FR4 40 × 40 × 1.6 mm)
Typical Transfer Characteristics
Typical Output Characteristics
ID (A)
–10 V
–8 V
–20
–6 V
Tc = –25°C
Pulse Test
–16
–5 V
75°C
ID (A)
–20
–4.5 V
–4 V
–8
–3.5 V
–4
25°C
–12
Drain Current
Drain Current
–12
–16
–3 V
–8
–4
VDS = –10 V
Pulse Test
VGS = –2.5 V
0
0
–2
–4
–6
–8
Drain to Source Voltage
0
0
–10
VDS (V)
–0.4
ID = –2 A
–0.3
–0.2
–1 A
–0.1
0
–0.5 A
0
–2
–4
–6
Gate to Source Voltage
Rev.9.00 Sep 07, 2005 page 3 of 7
–8
–10
VGS (V)
–6
–8
–10
VGS (V)
Static Drain to Source on State Resistance
vs. Drain Current
Drain to Source on State Resistance
RDS (on) (Ω)
Drain to Source Saturation Voltage
VDS (on) (V)
Pulse Test
–4
Gate to Source Voltage
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
–0.5
–2
2
Pulse Test
1
0.5
VGS = –4 V
0.2
0.1
–10 V
0.05
0.02
–0.2
–0.5
–1
–2
Drain Current
–5
–10
ID (A)
–20
Static Drain to Source on State Resistance
vs. Temperature
Forward Transfer Admittance vs.
Drain Current
Forward Transfer Admittance |yfs| (S)
Static Drain to Source on State Resistance
RDS (on) (Ω)
HAT1024R
0.5
Pulse Test
0.4
ID = –2 A
0.3
VGS = –4 V
–1 A, –0.5 A
0.2
0.1
–2 A, –1 A, –0.5 A
–10 V
0
–40
0
40
80
Case Temperature
120
160
10
Tc = –25°C
5
25°C
2
75°C
1
0.5
0.2
VDS = –10 V
Pulse Test
0.1
–0.2
Tc (°C)
200
3000
Capacitance C (pF)
Reverse Recovery Time trr (ns)
10000
100
50
20
1000
Ciss
300
Coss
100
Crss
VGS = 0
f = 1 MHz
–1
–2
–5
0
–10
–20
–4
–8
VGS
VDS
–12
VDD = –25 V
–10 V
–5 V
–16
ID = –3.5 A
0
4
8
Gate Charge
Rev.9.00 Sep 07, 2005 page 4 of 7
12
16
Qg (nc)
–30
–40
–50
–20
20
–20
Reverse Drain Current IDR (A)
–10
VGS (V)
0
VDD = –5 V
–10 V
–25 V
–20
Reverse Drain Current vs.
Source to Drain Voltage
Gate to Source Voltage
VDS (V)
Drain to Source Voltage
0
–10
Drain to Source Voltage VDS (V)
IDR (A)
Dynamic Input Characteristics
–50
–10 –20
10
–0.5
Reverse Drain Current
–40
–5
30
di / dt = 20 A / µs
VGS = 0, Ta = 25°C
–30
–2
Typical Capacitance vs.
Drain to Source Voltage
500
5
–0.1 –0.2
–1
Drain Current ID (A)
Body-Drain Diode Reverse
Recovery Time
10
–0.5
–16
VGS = –5 V
–12
–8
0, 5 V
–4
Pulse Test
0
0
–0.4
–0.8
–1.2
Source to Drain Voltage
–1.6
VSD
–2.0
(V)
HAT1024R
Switching Characteristics
500
Switching Time t (ns)
VGS = –4 V, VDD = –10 V
PW = 3 µs, duty ≤ 1 %
200
tr
100
50
tf
td(on)
20
td(off)
10
5
–0.1 –0.2
–0.5
–1
–2
Drain Current
–5
–10
ID (A)
Normalized Transient Thermal Impedance γ s (t)
Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation)
10
1
D=1
0.5
0.1
0.2
0.1
θch – f (t) = γ s (t) • θch – f
θch – f = 125°C/W, Ta = 25°C
When using the glass epoxy board
(FR4 40 × 40 × 1.6 mm)
0.05
0.01
0.001
0.02
0.01
1s
ho
0.0001
10 µ
t
ls
pu
e
D=
PDM
PW
T
PW
T
100 µ
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (S)
Normalized Transient Thermal Impedance γ s (t)
Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation)
10
1
D=1
0.5
0.1
0.2
0.1
θch – f (t) = γ s (t) • θch – f
θch – f = 166°C/W, Ta = 25°C
When using the glass epoxy board
(FR4 40 × 40 × 1.6 mm)
0.05
0.01
0.02
0.01
0.001
0.0001
10 µ
D=
PDM
e
uls
tp
ho
1s
100 µ
PW
T
1m
10 m
100 m
1
Pulse Width PW (S)
Rev.9.00 Sep 07, 2005 page 5 of 7
PW
T
10
100
1000
10000
HAT1024R
Switching Time Test Circuit
Switching Time Waveform
Vin
Vout
Monitor
Vin Monitor
10%
D.U.T.
90%
RL
90%
90%
Vin
–4 V
50 Ω
VDD
= –10 V
Vout
td(on)
Rev.9.00 Sep 07, 2005 page 6 of 7
10%
tr
10%
td(off)
tf
HAT1024R
Package Dimensions
JEITA Package Code
RENESAS Code
P-SOP8-3.95 × 4.9-1.27
PRSP0008DD-D
Package Name
FP-8DAV
0.085g
F
*1 D
MASS[Typ.]
bp
1
c
*2 E
Index mark
HE
5
8
4
Z
Terminal cross section
(Ni/Pd/Au plating)
*3 bp
x M
NOTE)
1. DIMENSIONS "*1(Nom)" AND "*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION "*3" DOES NOT
INCLUDE TRIM OFFSET.
e
Reference
Symbol
L1
Dimension in Millimeters
Min
Nom
Max
D
4.90
5.3
E
3.95
A2
A1
0.10
0.14
0.25
0.34
0.40
0.46
0.15
0.20
0.25
1.75
A
A
bp
A1
b1
c
L
c1
0°
y
HE
Detail F
5.80
e
8°
6.10
6.20
1.27
x
0.25
y
0.1
Z
0.75
L
L1
0.40
0.60
1.27
1.08
Ordering Information
Part Name
Quantity
Shipping Container
HAT1024R-EL-E
2500 pcs
Taping
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of
production before ordering the product.
Rev.9.00 Sep 07, 2005 page 7 of 7
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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