Renesas HAT1096C Silicon p channel mos fet power switching Datasheet

Data Sheet
HAT1096C
R07DS1175EJ0500
(Previous: REJ03G1233-0400)
Rev.5.00
Mar 19, 2014
Silicon P Channel MOS FET
Power Switching
Features
• Low on-resistance
RDS(on) = 225 mΩ typ. (at VGS = –4.5 V)
• Low drive current.
• 2.5 V gate drive devices.
• High density mounting
Outline
RENESAS Package code: PWSF0006JA-A
(Package name: CMFPAK-6)
Indexband
6
5
2 3 4 5
D DD D
4
1
2
3
6
G
1. Source
2. Drain
3. Drain
4. Drain
5. Drain
6. Gate
S
1
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to Source voltage
Gate to Source voltage
Drain current
Drain peak current
Body - Drain diode reverse drain current
Channel dissipation
Channel temperature
Storage temperature
Symbol
VDSS
VGSS
ID
ID(pulse)Note1
Ratings
–20
±12
–1
–4
Unit
V
V
A
A
IDR
PchNote 2
Tch
Tstg
–1
790
150
–55 to +150
A
mW
°C
°C
Notes: 1. PW ≤ 10 μs, duty cycle ≤ 1%
2. When using the glass epoxy board. (FR4 40 × 40 × 1.6mm), Ta = 25°C
R07DS1175EJ0500 Rev.5.00
Mar 19, 2014
Page 1 of 6
HAT1096C
Electrical Characteristics
(Ta = 25°C)
Item
Drain to Source breakdown
voltage
V(BR)DSS
Min
–20
Gate to Source breakdown
voltage
Gate to Source leakage current
Drain to Source leakage current
Gate to Source cutoff voltage
V(BR)GSS
±12
—
—
V
IGSS
IDSS
VGS(th)
—
—
–0.4
—
—
0.6
—
—
—
—
—
—
—
—
—
—
225
380
0.9
155
40
30
2
0.4
0.6
12
±10
–1
–1.4
293
530
—
—
—
—
—
—
—
—
μA
μA
V
mΩ
mΩ
S
pF
pF
pF
nC
nC
nC
ns
—
—
—
—
18
28
8
–0.85
—
—
—
–1.1
ns
ns
ns
V
Drain to Source on state
resistance
Forward transfer admittance
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate to Source charge
Gate to Drain charge
Turn - on delay time
Rise time
Turn - off delay time
Fall time
Body - Drain diode forward
voltage
Symbol
RDS(on)
RDS(on)
|yfs|
Ciss
Coss
Crss
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
VDF
Typ
—
Max
—
Unit
V
Test Conditions
ID = –10 mA, VGS = 0
IG = ±100 μA, VDS = 0
VGS = ±10 V, VDS = 0
VDS = –20 V, VGS = 0
ID = –1 mA, VDS = –10 V Note3
ID = –0.5 mA, VGS = –4.5 V Note3
ID = –0.5 mA, VGS = –2.5 V Note3
ID = –0.5 mA, VDS = –10 V Note3
VDS = –10 V, VGS = 0,
f = 1 MHz
VDS = –10 V, VGS = –4.5 V,
ID = -1 A
VDS = –10 V, VGS = –4.5 V,
ID = -0.5 A, RL = 20 Ω,
Rg = 4.7 Ω
IF = –1 A, VGS = 0
Notes: 3. Pulse test
R07DS1175EJ0500 Rev.5.00
Mar 19, 2014
Page 2 of 6
HAT1096C
Main Characteristics
Power vs. Temperature Derating
Maximum Safe Operation Area
Ta = 25°C,1shot pulse
When using the FR4 board.
–30
0.6
–3
1
–1
150
Operation in this area
is limited by RDS(on)
Ambient Temperature
–0.01 –0.03 –0.1 –0.3
200
–4
–3
–10 –30 –100
Typical Transfer Characteristics
–5
–6.0 V
–4.5 V
–3.5 V
Pulse Test
–3
–2.5 V
–2
–2.0 V
–1
VDS = –10 V
Pulse Test
25°C
–3.0 V
Drain Current ID (A)
Drain Current ID (A)
–10 V
–1
Drain to Source Voltage VDS (V)
Ta (°C)
Typical Output Characteristics
–5
n
100
s
m
io
at
50
s
m
er
–0.1
–0.03
0
10
–0.3
op
0.2
100 μs
=
0.4
–10 10 μs
PW
Drain Current ID (A)
0.8
–100
Test Condition :
When using the glass epoxy board
(FR4 40 x 40 x 1.6 mm), Ta = 25°C
DC
Channel Dissipation
Pch (W)
1.0
−25°C
–4
Tc = 75°C
–3
–2
–1
VGS = –1.5 V
–2
–4
–6
–8
0
–10
–2
–4
–6
–8
–10
Drain to Source Voltage VDS (V)
Gate to Source Voltage VGS (V)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
Static Drain to Source on State Resistance
vs. Drain Current
10000
–400
Pulse Test
–300
–200
–1 A
–100
–0.5 A
ID = –0.3 A
0
Drain to Source On State Resistance
RDS(on) (mΩ)
Drain to Source Voltage VDS(on) (mV)
0
–2
–4
–6
–8
–10
Gate to Source Voltage VGS (V)
R07DS1175EJ0500 Rev.5.00
Mar 19, 2014
VGS = –2.5 V
1000
–4.5 V
100
–0.1
Pulse Test
–1
–10
Drain Current ID (A)
Page 3 of 6
Forward Transfer Admittance vs.
Drain Current
Static Drain to Source on State Resistance
vs. Temperature
600
Forward Transfer Admittance |yfs| (S)
Static Drain to Source on State Resistance
RDS(on) (mΩ)
HAT1096C
Pulse Test
–1 A
500
–0.5 A
–0.3 A
400
–2.5 V
–0.5, –1 A
300
ID = –0.3 A
200
VGS = –4.5 V
100
–25
0
25
50
75
100
Case Temperature
Tc
125 150
10
3
Tc = –25°C
1
25°C
0.3
75°C
0.1
0.03
VDS = –10 V
Pulse Test
0.01
–0.01 –0.03 –0.1 –0.3
–2
VDD = –5 V
–10 V
–20 V
–4
–30
–6
2
1000
Capacitance C (pF)
–10
Gate to Source Voltage VGS (V)
Drain to Source Voltage VDS (V)
0
VDD = –5 V
–10 V
–20 V
1
Coss
30
Crss
10
VGS = 0
f = 1 MHz
–4
–12
–8
–16
–20
Gate Charge Qg (nc)
Drain to Source Voltage VDS (V)
Reverse Drain Current vs.
Source to Drain Voltage
Switching Characteristics
100
VGS = –4.5 V, VDD = –10 V
Rg = 4.7 Ω, Ta = 25°C
–5 V
Switching Time t (ns)
Reverse Drain Current IDR (A)
Ciss
100
1
0
–8
4
3
300
3
–5
–4
VGS = 0, 5 V
–3
–2
–1
Pulse Test
0
–10
Typical Capacitance vs.
Drain to Source Voltage
0
–40
0
–3
Drain Current ID (A)
(°C)
Dynamic Input Characteristics
–20
–1
–0.4
–0.8
–1.2
–1.6
–2.0
Source to Drain Voltage VSD (V)
R07DS1175EJ0500 Rev.5.00
Mar 19, 2014
td(off)
tr
td(on)
10
tf
1
–0.1
–1
–10
Drain Current ID (A)
Page 4 of 6
HAT1096C
Switching Time Test Circuit
Waveform
Vin
Vout
Monitor
Vin Monitor
10%
D.U.T.
90%
RL
4.7 Ω
Vin
–4.5 V
Vout
td(on)
R07DS1175EJ0500 Rev.5.00
Mar 19, 2014
90%
90%
VDD
= –10 V
10%
10%
tr
td(off)
tf
Page 5 of 6
HAT1096C
Package Dimensions
JEITA Package Code
⎯
Package Name
CMFPAK-6
RENESAS Code
PWSF0006JA-A
Previous Code
CMFPAK-6 / CMFPAK-6V
MASS[Typ.]
0.0065g
D
A
e
c
E
A
HE
A
x M
LP
L
b
S A
e
A2
Reference
Symbol
A
A1
y S
S
e1
b
l1
b1
c
Pattern of terminal position areas
A-A Section
A
A1
A2
b
c
D
E
e
HE
L
LP
x
y
b1
e1
l1
Dimension in Millimeters
Min
0.7
0
0.7
0.15
0.1
1.9
1.6
2.05
0.1
0.15
Nom
0.2
0.15
2.0
1.7
0.65
2.1
0.2
Max
0.8
0.01
0.79
0.3
0.25
2.1
1.8
2.15
0.3
0.45
0.05
0.05
0.3
1.9
0.4
Ordering Information
Orderable Part Number
HAT1096C-EL-E
Note:
Quantity
3000 pcs
Shipping Container
Taping
For some grades, production may be terminated. Please contact the Renesas sales office to check the state of
production before ordering the product.
R07DS1175EJ0500 Rev.5.00
Mar 19, 2014
Page 6 of 6
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