AVAGO HCPL-4200-000E Optically coupled 20 ma current loop receiver Datasheet

HCPL-4200
Optically Coupled 20 mA Current Loop Receiver
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
Features
The HCPL-4200 optocoupler is designed to operate as a
receiver in equipment using the 20 mA Current Loop. 20
mA current loop systems conventionally signal a logic
high state by transmitting 20 mA of loop current (MARK),
and signal a logic low state by allowing no more than a
few milliamperes of loop current (SPACE). Optical coupling of the signal from the 20 mA current loop to the
logic output breaks ground loops and provides for a very
high common mode rejection. The HCPL-4200 aids in the
design process by providing guaranteed thresholds for
logic high state and logic low state for the current loop,
providing an LSTTL, TTL, or CMOS compatible logic interface, and providing guaranteed common mode rejection. The buffer circuit on the current loop side of the
HCPL-4200 provides typically 0.8 mA of hysteresis which
increases the immunity to common mode and differential mode noise. The buffer also provides a controlled
amount of LED drive current which takes into account
any LED light output degradation. The internal shield allows a guaranteed 1000 V/μs common mode transient
immunity.
x Data output compatible with LSTTL, TTL and CMOS
Functional Diagram
x 20 K Baud data rate at 1400 metres line length
x Guaranteed On and Off thresholds
x LED is protected from excess current
x Input threshold hysteresis
x Three-state output compatible with data buses
x Internal shield for high Common Mode Rejection
x Safety approval
UL recognized -3750 V rms, for 1 minute
CSA approved
x Optically coupled 20 mA current loop transmitter,
HCPL-4100, also available
Applications
x Isolated 20 mA current
x Loop receiver in:
Computer peripherals
Industrial control equipment
Data communications equipment
A 0.1 μF bypass capacitor connected between pins 8 and 5 is recommended.
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
Ordering Information
HCPL-4200 is UL Recognized with 3750 Vrms for 1 minute per UL1577.
Option
Part number
HCPL-4200
RoHS
Compliant
Non-RoHS
Compliant
-000E
No option
-300E
#300
-500E
#500
Package
Surface Mount Gull Wing
Tape & Reel Quantity
50 per tube
300 mil
DIP-8
X
X
X
X
50 per tube
X
1000 per reel
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry.
Example 1:
HCPL-4200-500E to order product of Gull Wing Surface Mount package in Tape and Reel packaging in RoHS compliant.
Example 2:
HCPL-4200 to order product of 300 mil DIP package in tube packaging and non-RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
Remarks: The notation ‘#XXX’ is used for existing products, while (new) products launched since 15th July 2001 and
RoHS compliant option will use ‘-XXXE’.
2
Package Outline Drawings – 8 Pin DIP Package (HCPL-4200)
7.62 ± 0.25
(0.300 ± 0.010)
9.65 ± 0.25
(0.380 ± 0.010)
8
7
6
5
6.35 ± 0.25
(0.250 ± 0.010)
TYPE NUMBER
DATE CODE
A XXXX
YYWW RU
1
2
3
4
UL
RECOGNITION
1.78 (0.070) MAX.
1.19 (0.047) MAX.
5° TYP.
3.56 ± 0.13
(0.140 ± 0.005)
4.70 (0.185) MAX.
+ 0.076
0.254 - 0.051
+ 0.003)
(0.010 - 0.002)
0.51 (0.020) MIN.
2.92 (0.115) MIN.
0.65 (0.025) MAX.
1.080 ± 0.320
(0.043 ± 0.013)
DIMENSIONS IN MILLIMETERS AND (INCHES).
2.54 ± 0.25
(0.100 ± 0.010)
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
8 Pin DIP Package with Gull Wing Surface Mount Option 300 (HCPL-4200)
LAND PATTERN RECOMMENDATION
9.65 ± 0.25
(0.380 ± 0.010)
8
7
6
1.016 (0.040)
5
6.350 ± 0.25
(0.250 ± 0.010)
1
2
3
10.9 (0.430)
4
1.27 (0.050)
9.65 ± 0.25
(0.380 ± 0.010)
1.780
(0.070)
MAX.
1.19
(0.047)
MAX.
7.62 ± 0.25
(0.300 ± 0.010)
3.56 ± 0.13
(0.140 ± 0.005)
1.080 ± 0.320
(0.043 ± 0.013)
0.635 ± 0.25
(0.025 ± 0.010)
2.54
(0.100)
BSC
0.635 ± 0.130
(0.025 ± 0.005)
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
3
2.0 (0.080)
+ 0.076
0.254 - 0.051
+ 0.003)
(0.010 - 0.002)
12° NOM.
Solder Reflow Thermal Profile
300
TEMPERATURE (°C)
PREHEATING RATE 3°C + 1°C/–0.5°C/SEC.
REFLOW HEATING RATE 2.5°C ± 0.5°C/SEC.
PEAK
TEMP.
245°C
PEAK
TEMP.
240°C
PEAK
TEMP.
230°C
200
2.5°C ± 0.5°C/SEC.
SOLDERING
TIME
200°C
30
SEC.
160°C
150°C
140°C
30
SEC.
3°C + 1°C/–0.5°C
100
PREHEATING TIME
150°C, 90 + 30 SEC.
50 SEC.
TIGHT
TYPICAL
LOOSE
ROOM
TEMPERATURE
0
50
0
100
150
200
250
TIME (SECONDS)
Note: Non-halide flux should be used.
Figure 1a. Solder Reflow Thermal Profile.
Recommended Pb-Free IR Profile
tp
Tp
TEMPERATURE
TL
Tsmax
TIME WITHIN 5 °C of ACTUAL
PEAK TEMPERATURE
20-40 SEC.
260 +0/-5 °C
217 °C
RAMP-UP
3 °C/SEC. MAX.
150 - 200 °C
RAMP-DOWN
6 °C/SEC. MAX.
Tsmin
ts
PREHEAT
60 to 180 SEC.
tL
60 to 150 SEC.
25
t 25 °C to PEAK
TIME
NOTES:
THE TIME FROM 25 °C to PEAK TEMPERATURE = 8 MINUTES MAX.
Tsmax = 200 °C, Tsmin = 150 °C
Note: Non-halide flux should be used.
Figure 1b. Pb-Free IR Profile.
Regulatory Information
The HCPL-4200 has been approved by the following organizations:
UL
Recognized under UL 1577, Component Recognition
Program, File E55361.
4
CSA
Approved under CSA Component Acceptance Notice
#5, File CA 88324.
Insulation and Safety Related Specifications
Parameter
Symbol
Value
Units
Conditions
Min. External Air Gap
(External Clearance)
L(IO1)
7.1
mm
Measured from input terminals to output
terminals, shortest distance through air
Min. External Tracking Path
(External Creepage)
L(IO2)
7.4
mm
Measured from input terminals to output
terminals, shortest distance path along body
0.08
mm
Through insulation distance, conductor to
conductor, usually the direct distance
between the photoemitter and photodetector
inside the optocoupler cavity
200
volts
DIN IEC 112/VDE 0303 PART 1
Min. Internal Plastic Gap
(Internal Clearance)
Tracking Resistance
(Comparative Tracking Index)
CTI
Isolation Group
IIIa
Material Group (DIN VDE 0110, 1/89, Table 1)
Option 300 – surface mount classification is Class A in accordance with CECC 00802.
Absolute Maximum Ratings
(No Derating Required up to 70°C)
Storage Temperature .............................................................................................-55°C to +125°C
Operating Temperature ..........................................................................................-40°C to +85°C
Lead Solder Temperature .............................. 260°C for 10 s (1.6 mm below seating plane)
Supply Voltage – VCC ..........................................................................................................0 V to 20 V
Average Input Current - II ...................................................................................-30 mA to 30 mA
Peak Transient Input Current - II ........................................................................................... 0.5 A[1]
Enable Input Voltage – VE ...........................................................................................-0.5 V to 20 V
Output Voltage – VO .......................................................................................................-0.5 V to 20 V
Average Output Current – IO ...................................................................................................25 mA
Input Power Dissipation – PI ..............................................................................................90 mW[2]
Output Power Dissipation – PO ......................................................................................210 mW[3]
Total Power Dissipation – P .............................................................................................255 mW[4]
Infrared and Vapor Phase Reflow Temperature
(Option #300) ..................................................................................... see Fig. 1, Thermal Profile
Recommended Operating Conditions
5
Parameter
Symbol
Min.
Max.
Units
Power Supply Voltage
VCC
4.5
20
Volts
Forward Input Current
(SPACE)
ISI
0
2.0
mA
Forward Input Current
(MARK)
IMI
14
24
mA
Operating Temperature
TA
0
70
°C
Fan Out
N
0
4
TTL Loads
Logic Low Enable
Voltage
VEL
0
0.8
Volts
Logic High Enable
Voltage
VEH
2.0
20
Volts
DC Electrical Specifications
For 0°C ≤TA ≤70°C, 4.5 V ≤VCC ≤20 V, VE = 0.8 V, all typicals at TA = 25°C and VCC = 5 V unless otherwise noted. See note 13.
Symbol
Min.
Mark State Input
Current
Parameter
IMI
12
Mark State Input
Voltage
VMI
Space State Input
Current
ISI
Space State Input
Voltage
VSI
Input Hysteresis
Current
IHYS
Logic Low Output
Voltage
VOL
Logic High Output
Voltage
VOH
Output Leakage
Current (VOUT > VCC)
IOHH
Logic High Enable
Voltage
VEH
Logic Low Enable
Voltage
VEL
Logic High Enable
Current
IEH
Logic Low Enable
Current
IEL
Logic Low Supply
Current
ICCL
Logic High Supply
Current
ICCH
Typ.
1.6
2.75
Volts
3
mA
2.2
Volts
0.8
Test Conditions
2.4
II = 20 mA
Volts
IOL = 6.4 mA
(4 TTL Loads)
Volts
IOH = -2.6 mA,
100
μA
VO = 5.5 V
μA
VO = 20 V
0.8
Volts
20
μA
VE = 2.7 V
100
μA
VE = 5.5 V
250
μA
VE = 20 V
-0.32
mA
VE = 0.4 V
4.5
6.0
mA
VCC = 5.5 V
5.25
7.5
mA
VCC = 20 V
2.7
4.5
mA
VCC = 5.5 V
3.1
6.0
mA
VCC = 20 V
IOZL
-20
μA
VO = 0.4 V
20
μA
VO = 2.4 V
IOSH
CIN
2, 4
II = 3 mA
II = 12 mA
6
7
II = 20 mA
VCC = 4.5 V
Volts
IOZH
Logic High Short
Circuit Output Current
Input Capacitance
4, 5
2
High Impedance
IOSL
VE = Don’t Care
II = 0.5 to 2.0 mA VE = Don’t
Care
State Output
Current
Logic Low Short
Circuit Output Current
Note
2, 3,
4
500
2.0
Fig.
2, 3,
4
mA
0.5
0.004
6
Units
mA
2.52
0.3
Max.
100
μA
VO = 5.5 V
500
μA
VO = 20 V
25
mA
VO = VCC = 5.5 V
40
mA
VO = VCC = 20 V
-10
mA
-25
120
II = 0 mA
VE = Don’t Care
II = 20 mA
VE = Don’t Care
VE = 2 V,
II = 20 mA
II = 0 mA
5
VCC = 5.5 V
II = 20 mA
5
mA
VCC = 20 V
VO = GND
pF
f = 1 MHz, VI = 0 V dc,
Pins 1 and 2
Switching Specifications
For 0°C ≤ TA ≤ 70°C, 4.5 V ≤ VCC ≤ 20 V, VE = 0.8 V, all typicals at TA = 25°C and VCC = 5 V unless otherwise noted. See note 13.
Parameter
Typ.
Max.
Units
Test Conditions
Fig.
Note
Propagation Delay Time
to Logic High Output Level
Symbol
tPLH
Min.
0.23
1.6
μs
VE = 0 V,
CL = 15 pF
8, 9,
10
7
Propagation Delay Time
to Logic Low Output Level
tPHL
0.17
1.0
μs
VE = 0 V,
CL = 15 pF
8, 9,
10
8
Propagation Delay Time
Skew
tPLH - tPHL
60
ns
II = 20 mA,
CL = 15 pF
8, 9,
10
Output Enable Time to
Logic Low Level
tPZL
25
ns
II = 0 mA,
CL = 15 pF
12, 13,
15
Output Enable Time to
Logic High Level
tPZH
28
ns
II = 20 mA,
CL = 15 pF
12, 13,
14
Output Disable Time to
Logic Low Level
tPLZ
60
ns
II = 0 mA,
CL = 15 pF
12, 13,
15
Output Disable Time to
Logic High Level
tPHZ
105
ns
II = 20 mA,
CL = 15 pF
12, 13,
14
Output Rise Time
(10-90%)
tr
55
ns
VCC = 5 V,
CL = 15 pF
8, 9,
11
9
Output Fall Time
(90-10%)
tf
15
ns
VCC = 5 V,
CL = 15 pF
8, 9,
11
10
Common Mode Transient
Immunity at Logic High
Output Level
|CMH|
1,000
10,000
V/μs
VCM = 50 V (peak)
II = 12 mA,
TA = 25°C
16
11
Common Mode Transient
Immunity at Logic Low
Output Level
|CML|
1,000
10,000
V/μs
VCM = 50 V (peak)
II = 3 mA,
TA = 25°C
16
12
Fig.
Notes
Package Characteristics
For 0°C ≤ TA ≤ 70°C, unless otherwise specified. All typicals at TA = 25°C.
Parameter
Symbol
Min.
Typ.
Max.
Units
Input-Output Momentary
Withstand Voltage*
VISO
Resistance, Input-Output
RI-O
Capacitance, Input-Output
CI-O
3750
Test Conditions
V rms
RH ≤ 50%, t = 1 min,
TA = 25°C
6, 14
1012
ohms
VI-O = 500 V dc
6
1.0
pF
f = 1 MHz, VI-O = 0 V
6
*The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table (if applicable), your equipment
level safety specification, or Avago Application Note 1074, “Optocoupler Input-Output Endurance Voltage.”
7
Notes:
1. ≤ 1 μs pulse width, 300 pps.
2. Derate linearly above 70°C free air temperature at a rate of 1.6 mW/ °C. Proper application of the derating factors will prevent IC junction
temperatures from exceeding 125°C for ambient temperatures up to 85°C.
3. Derate linearly above 70°C free air temperature at a rate of 3.8 mW/ °C.
4. Derate linearly above 70°C free air temperature at a rate of 4.6 mW/ °C.
5. Duration of output short circuit time shall not exceed 10 ms.
6. The device is considered a two terminal device, pins 1, 2, 3, and 4 are connected together and pins 5, 6, 7, and 8 are connected together.
7. The tPLH propagation delay is measured from the 10 mA level on the leading edge of the input pulse to the 1.3 V level on the leading edge of
the output pulse.
8. The tPHL propagation delay is measured from the 10 mA level on the trailing edge of the input pulse to the 1.3 V level on the trailing edge of the
output pulse.
9. The rise time, tr, is measured from the 10% to the 90% level on the rising edge of the output logic pulse.
10. The fall time, tf, is measured from the 90% to the 10% level on the falling edge of the output logic pulse.
11. Common mode transient immunity in the logic high level is the maximum (negative) dVCM /dt on the trailing edge of the common mode pulse,
VCM , which can be sustained with the output voltage in the logic high state (i.e., VO ≥ 2 V).
12. Common mode transient immunity in the logic low level is the maximum (positive) dVCM /dt on the leading edge of the common mode pulse,
VCM, which can be sustained with the output voltage in the logic low state (i.e., VO ≤ 0.8 V).
13. Use of a 0.1 μF bypass capacitor connected between pins 5 and 8 is recommended.
14. In accordance with UL 1577, each optocoupler momentary withstand is proof tested by applying an insulation test voltage ≥ 4500 V rms for 1
second (leakage detection current limit, Ii-o ≤ 5 μA).
II – INPUT SWITCHING THRESHOLD – mA
10
8
6
IHYS
4
2
0
-50
-25
0
25
50
75
100
TA – AMBIENT TEMPERATURE –°C
Figure 2. Typical Output Voltage vs. Loop Current.
Figure 3. Typical Current Switching Threshold vs.
Temperature.
VOL – LOW LEVEL OUTPUT VOLTAGE – V
VI – LOOP VOLTAGE – VOLTS
2.6
II = 20 mA
II = 12 mA
2.4
2.2
-50
-25
0
25
50
75
100
TA – AMBIENT TEMPERATURE –°C
Figure 5. Typical Input Voltage vs. Temperature.
8
IOH – HIGH LEVEL OUTPUT CURRENT – mA
1.0
2.8
0.9
VCC = 4.5 V
II = 3 mA
IO = 6.4 mA
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-60
-40
-20
0
20
40
60
Figure 4. Typical Input Loop Voltage vs. Input
Current.
80
100
TA – TEMPERATURE –°C
Figure 6. Typical Logic Low Output Voltage vs.
Temperature.
0
-1
VCC = 4.5 V
II = 12 mA
-2
-3
VO = 2.7 V
-4
-5
VO = 2.4 V
-6
-7
-8
-60
-40
-20
0
20
40
60
80
100
TA – TEMPERATURE –°C
Figure 7. Typical Logic High Output Current vs.
Temperature.
Figure 8. Test Circuit for tPHL, tPLH, tr, and tf.
Figure 9. Waveforms for tPHL, tPLH, tr, and tf.
120
VCC = 5 V
CL = 15 pF
VCC = 5 V
CL = 15 pF
0.4
tr, tf – RISE, FALL TIMES – ns
tp – PROPAGATION DELAY – μs
0.5
0.3
tPLH
0.2
tPHL
0.1
100
80
tr
60
40
20
tf
0
-60
-40
-20
0
20
40
60
80
100
TA – TEMPERATURE –°C
0
-60
-40
-20
0
20
40
60
80
100
TA – TEMPERATURE –°C
Figure 10. Typical Propagation Delay vs. Temperature.
Figure 11. Typical Rise, Fall Time vs. Temperature.
Figure 12. Test Circuit for tPZH, tPZL, tPHZ, and tPLZ.
Figure 13. Waveforms for tPZH, tPZL, tPHZ, and tPLZ.
9
100
CL = 15 pF
VCC
tp – ENABLE PROPAGATION DELAY – ns
tp – ENABLE PROPAGATION DELAY – ns
200
20 V
150
tPHZ
4.5 V
100
20 V
50
4.5 V
tPZH
0
-60
-40
-20
0
20
40
60
80
100
TA – TEMPERATURE –°C
Figure 14. Typical Logic High Enable Propagation Delay vs. Temperature.
CL = 15 pF
VCC
20 V
80
4.5 V
tPLZ
60
20 V
40
tPZL
4.5 V
20
0
-60
-40
-20
0
20
40
60
80
100
TA – TEMPERATURE –°C
Figure 15. Typical Logic Low Enable Propagation Delay vs. Temperature.
Figure 16. Test Circuit for Common Mode Transient Immunity.
Applications
Data transfer between equipment which employs current loop circuits can be accomplished via one of three
configurations: simplex, half duplex or full duplex communication. With these configurations, point-to-point
and multidrop arrangements are possible. The appropriate configuration to use depends upon data rate, number of stations, number and length of lines, direction of
data flow, protocol, current source location and voltage
compliance value, etc.
Simplex
The simplex configuration, whether point to point or
multidrop, gives unidirectional data flow from transmitter to receiver(s). This is the simplest configuration for use
in long line length (two wire), for high data rate, and low
current source compliance level applications. Block diagrams of simplex point-to-point and multidrop arrangements are given in Figures 17a and 17b respectively for
the HCPL-4200 receiver optocoupler.
10
For the highest data rate per formance in a current loop,
the configuration of a non-isolated active transmitter
(containing current source) transmitting data to a remote isolated receiver(s) should be used. When the current source is located at the transmitter end, the loop is
charged approximately to VMI (2.5 V). Alternatively, when
the current source is located at the receiver end, the loop
is charged to the full compliance voltage level. The lower
the charged voltage level the faster the data rate will be.
In the configurations of Figures 17a and 17b, data rate is
independent of the current source voltage compliance
level. An adequate compliance level of current source
must be available for voltage drops across station(s) during the MARK state in multidrop applications or for long
line length. The maximum compliance level is determined by the transmitter breakdown characteristic.
Figure 17. Simplex Current Loop System Configurations for (a) Point-to-Point, (b) Multidrop.
A recommended non-isolated active transmitter circuit
which can be used with the HCPL-4200 in point-to-point
or in multidrop 20 mA current loop applications is given
in Figure 18. The current source is controlled via a standard TTL 7407 buffer to provide high output impedance
of current source in both the ON
and OFF states. This non-isolated active transmitter provides a nominal 20 mA loop current for the listed values
of VCC, R2 and R3 in Figure 18.
Length of current loop (one direction) versus minimum
required DC supply voltage, VCC, of the circuit in Figure 18
is graphically illustrated in Figure 19. Multidrop configurations will require larger VCC than Figure 19 predicts in
order to account for additional station terminal voltage
drops.
11
Typical data rate performance versus distance is illustrated in Figure 20 for the combination of a non-isolated
active transmitter and HCPL-4200 optically coupled current loop receiver shown in Figure 18. Curves are shown
for 10% and 25% distortion data rate. 10% (25%) distortion data rate is defined as that rate at which 10% (25%)
distortion occurs to output bit interval with respect to
input bit interval. An input Non-Return-to-Zero (NRZ)
test waveform of 16 bits (0000001011111101) was used
for data rate distortion measurements. Data rate is independent of current source supply voltage, VCC.
The cable used contained five pairs of unshielded, twisted, 22 AWG wire (Dearborn #862205). Loop current is 20
mA nominal. Input and output logic supply voltages are
5 V dc.
Figure 18. Recommended Non-Isolated Active Transmitter with HCPL-4200 Isolated Receiver for Simplex Point-to-Point 20 mA Current Loop.
Full Duplex
Half Duplex
The full duplex point-to-point communication of Figure
21 uses a four wire system to provide simultaneous, bidirectional data communication between local and remote equipment. The basic application uses two simplex
point-to-point loops which have two separate, active,
non-isolated units at one common end of the loops. The
other end of each loop is isolated.
The half duplex configuration, whether point-to-point
or multidrop, gives non-simultaneous bidirectional data
flow from transmitters to receivers shown in Figures 22a
and 22b. This configuration allows the use of two wires
to carry data back and forth between local and remote
units. However, protocol must be used to determine
which specific transmitter can operate at any given time.
Maximum data rate for a half duplex system is limited
by the loop current charging time. These considerations
were explained in the Simplex configuration section.
As Figure 21 illustrates, the combination of Avago current
loop optocouplers, HCPL-4100 transmitter and HCPL4200 receiver, can be used at the isolated end of current
loops. Cross talk and common mode coupling are greatly
reduced when optical isolation is implemented at the
same end of both loops, as shown. The full duplex data
rate is limited by the non-isolated active receiver current
loop. Comments mentioned under simplex configuration apply to the full duplex case. Consult the HCPL-4100
transmitter optocoupler data sheet for specified device
performance.
Figure 19. Minimum Required Supply Voltage, VCC, vs.
Loop Length for Current Loop Circuit of Figure 19.
12
Figures 22a and 22b illustrate half duplex application
for the combination of HCPL-4100/-4200 optocouplers.
The unique and complementary designs of the HCPL4100 transmitter and HCPL-4200 receiver optocouplers
provide many designed-in benefits. For example, total
optical isolation at one end of the current loop is easily accomplished, which results in substantial removal
Figure 20. Typical Data Rate vs. Distance.
of common mode influences, elimination of ground
potential differences and reduction of power supply requirements. With this combination of HCPL-4100/-4200
optocouplers, specific current loop noise immunity is
provided, i.e., minimum SPACE state current noise immunity is 1 mA, MARK state noise immunity is 8 mA.
Voltage compliance of the current source must be of an
adequate level for operating all units in the loop while
not exceeding 27 V dc, the maximum breakdown voltage
for the HCPL-4100. Note that the HCPL-4100 transmitter
will allow loop current to conduct when input VCC power
is off. Consult the HCPL-4100 transmitter optocoupler
data sheet for specified device performance.
For more information about the HCPL-4100/-4200 optocouplers, consult Application Note 1018.
Figure 21. Full Duplex Point-to-Point Current Loop System Configuration.
Figure 22. Half Duplex Current Loop System Configurations for (a) Point-to-Point, (b) Multidrop.
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Data subject to change. Copyright © 2005-2010 Avago Technologies. All rights reserved. Obsoletes AV01-0541EN
AV02-2353EN - February 8, 2010
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