RENESAS HD74LS132P

HD74LS132
Quadruple 2-Input Positive NAND Schmitt-triggers
REJ03D0432–0300
Rev.3.00
Jul.13.2005
Features
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LS132P
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
—
HD74LS132FPEL
SOP-14 pin (JEITA)
PRSP0014DF-B
(FP-14DAV)
FP
EL (2,000 pcs/reel)
PRSP0014DE-A
RP
(FP-14DNV)
Note: Please consult the sales office for the above package availability.
HD74LS132RPEL
SOP-14 pin (JEDEC)
EL (2,500 pcs/reel)
Pin Arrangement
1A
1
14
VCC
1B
2
13
4B
1Y
3
12
4A
2A
4
11
4Y
2B
5
10
3B
2Y
6
9
3A
GND
7
8
3Y
(Top view)
Rev.3.00, Jul.13.2005, page 1 of 6
HD74LS132
Circuit Schematic (1/4)
VCC
75Ω
20k
Input
A
Output
Y
B
GND
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
VCC
VIN
PT
Tstg
7
7
400
–65 to +150
V
V
mW
°C
Supply voltage
Input voltage
Power dissipation
Storage temperature
Recommended Operating Conditions
Item
Supply voltage
Output current
Operating temperature
Rev.3.00, Jul.13.2005, page 2 of 6
Symbol
Min
Typ
Max
Unit
VCC
4.75
5.00
5.25
V
IOH
—
—
–400
µA
IOL
—
—
8
mA
Topr
–20
25
75
°C
HD74LS132
Electrical Characteristics
(Ta = –20 to +75 °C)
Item
II
min.
1.4
0.5
0.4
2.7
—
—
—
—
—
—
—
Short-circuit output
current
IOS
–20
—
–100
mA
VCC = 5.25 V
Supply current
ICCH
ICCL
—
—
—
5.9
8.2
—
11
14
–1.5
mA
mA
V
VCC = 5.25 V
VCC = 5.25 V
VCC = 4.75 V, IIN = –18 mA
Input threshold
voltage
Symbol
VT+
–
VT
VT – VT–
VOH
+
Hysteresis
Output voltage
Input threshold
current
Input current
VOL
IT +
–
IT
IIH
IIL
Input clamp voltage
VIK
Note: * VCC = 5 V, Ta = 25°C
typ.*
1.6
0.7
0.9
—
—
—
–0.14
–0.18
—
—
—
max.
1.9
1.0
—
—
0.5
0.4
—
—
20
–0.4
0.1
Unit
V
V
V
V
mA
mA
µA
mA
mA
Condition
VCC = 5 V
VCC = 5 V
VCC = 5 V
VCC = 4.75 V, VI = 0.5 V, IOH = –400 µA
IOL = 8 mA
VCC = 4.75 V, VI = 1.9 V
IOL = 4 mA
VCC = 5 V, VI = VT+
VCC = 5 V, VI = VT–
VCC = 5.25 V, VI = 2.7 V
VCC = 5.25 V, VI = 0.4 V
VCC = 5.25 V, VI = 7 V
V
Switching Characteristics
(VCC = 5 V, Ta = 25°C)
Item
Propagation delay time
Symbol
tPLH
tPHL
min.
—
—
typ.
15
15
max.
22
22
Unit
ns
ns
Testing Method
Test Circuit
VCC
Output
Input 4.5V
RL
P.G.
Zout=50Ω
CL
Notes:
1. CL includes probe and jig capacitance.
2. All diodes are 1S2074(H).
Rev.3.00, Jul.13.2005, page 3 of 6
Condition
CL = 15 pF, RL = 2 kΩ
HD74LS132
Waveform
tTLH
Input
10%
tTHL
90%
1.6 V
3V
90%
0.7 V
tPHL
10%
0V
tPLH
VOH
Output
1.3 V
1.3 V
VOL
Note:
Input pulse; tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz, duty cycle 50%
Rev.3.00, Jul.13.2005, page 4 of 6
HD74LS132
Package Dimensions
JEITA Package Code
P-DIP14-6.3x19.2-2.54
RENESAS Code
PRDP0014AB-B
MASS[Typ.]
0.97g
Previous Code
DP-14AV
D
8
E
14
1
7
b3
Z
A1
A
Reference
Symbol
Nom
e1
7.62
D
19.2
E
6.3
L
A
θ
bp
e
Dimension in Millimeters
Min
e1
A1
0.51
bp
0.40
JEITA Package Code
P-SOP14-5.5x10.06-1.27
RENESAS Code
PRSP0014DF-B
*1
Previous Code
FP-14DAV
D
0.48
0.56
c
0.19
θ
0°
e
2.29
0.25
0.31
2.54
2.79
15°
2.39
L
2.54
MASS[Typ.]
0.23g
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
F
14
7.4
1.30
Z
( Ni/Pd/Au plating )
20.32
5.06
b3
c
Max
8
c
HE
*2
E
bp
Index mark
Reference
Symbol
Terminal cross section
( Ni/Pd/Au plating )
1
Z
*3
Nom
Max
D
10.06
10.5
E
5.50
A2
7
e
A1
bp
Dimension in Millimeters
Min
x
M
0.00
0.10
0.20
0.34
0.40
0.46
0.15
0.20
0.25
7.80
8.00
A
L1
2.20
bp
b1
c
A
c
A1
θ
y
L
Detail F
1
θ
0°
HE
7.50
e
1.27
x
0.12
y
0.15
1.42
Z
L
L
Rev.3.00, Jul.13.2005, page 5 of 6
8°
0.50
1
0.70
1.15
0.90
HD74LS132
JEITA Package Code
P-SOP14-3.95x8.65-1.27
RENESAS Code
PRSP0014DE-A
*1
MASS[Typ.]
0.13g
Previous Code
FP-14DNV
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
F
D
14
8
c
*2
Index mark
HE
E
bp
Reference
Symbol
Terminal cross section
( Ni/Pd/Au plating )
Dimension in Millimeters
Min
Nom
Max
D
8.65
9.05
E
3.95
A2
A1
7
1
Z
e
*3
bp
x
M
0.14
A
c
A1
θ
L
Detail F
0.34
0.40
0.46
0.15
0.20
0.25
6.10
6.20
b1
c
y
0.25
1.75
bp
L1
1
θ
0°
HE
5.80
e
8°
1.27
0.25
x
y
0.15
Z
0.635
L
L
Rev.3.00, Jul.13.2005, page 6 of 6
0.10
A
0.40
1
0.60
1.08
1.27
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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