INTERSIL HFA1110IB

HFA1110
Data Sheet
750MHz, Low Distortion Unity Gain,
Closed Loop Buffer
The HFA1110 is a unity gain closed loop buffer that achieves
-3dB bandwidth of 750MHz, while offering excellent video
performance and low distortion. Manufactured on Intersil’s
proprietary complementary bipolar UHF-1 process, the
HFA1110 also offers very fast slew rate, and high output
current. It is one more example of Intersil’s intent to enhance
its leadership position in products for high speed signal
processing applications.
The HFA1110’s settling time of 11ns to 0.1%, low distortion
and ability to drive capacitive loads make it an ideal flash
A/D driver.
The HFA1110 is an enhanced, pin compatible upgrade for
the AD9620, AD9630, CLC110, EL2072, BUF600 and
BUF601.
For buffer applications requiring a standard op amp pinout,
or selectable gain (-1, +1, +2), see the HFA1112 data sheet.
For output limiting see the HFA1113 data sheet.
For military grade product please refer to the HFA1110/883
data sheet.
February 1999
File Number
2944.7
Features
• Wide -3dB Bandwidth. . . . . . . . . . . . . . . . . . . . . . 750MHz
• Very Fast Slew Rate . . . . . . . . . . . . . . . . . . . . . . 1300V/µs
• Fast Settling Time (0.2%) . . . . . . . . . . . . . . . . . . . . . . 7ns
• High Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 60mA
• Fixed Gain of +1
• Gain Flatness (100MHz) . . . . . . . . . . . . . . . . . . . . 0.03dB
• Differential Phase . . . . . . . . . . . . . . . . . . . 0.025 Degrees
• Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.04%
• 3rd Harmonic Distortion (50MHz). . . . . . . . . . . . . . -80dBc
• 3rd Order Intercept (100MHz) . . . . . . . . . . . . . . . . 30dBm
Applications
• Video Switching and Routing
• RF/IF Processors
• Driving Flash A/D Converters
• High-Speed Communications
• Impedance Transformation
Pinout
• Line Driving
HFA1110
(SOIC)
TOP VIEW
• Radar Systems
Ordering Information
V+
1
OPT V+
2
NC
IN
8
OUT
PART NUMBER
(BRAND)
7
NC
3
6
OPT V-
HFA1110IB
(H1110I)
4
5
V-
HFA1110EVAL
- +
TEMP.
RANGE (oC)
-40 to 85
PACKAGE
8 Ld SOIC
PKG.
NO.
M8.15
High Speed Buffer DIP Evaluation Board
Pin Descriptions
NAME
PIN
NUMBER
V+
1
Positive Supply
Opt V+
2
Optional Positive Supply
NC
3
No Connection
IN
4
Input
V-
5
Negative Supply
Opt V-
6
Optional Negative Supply
NC
7
No Connection
OUT
8
Output
DESCRIPTION
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
HFA1110
Absolute Maximum Ratings
Thermal Information
Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60mA
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
158
Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
VSUPPLY = ±5V, RL = 100Ω, Unless Otherwise Specified
Electrical Specifications
PARAMETER
TEST CONDITIONS
TEMP (oC)
MIN
TYP
MAX
UNITS
INPUT CHARACTERISTICS
Output Offset Voltage (Note 2)
25
-
8
25
mV
Full
-
-
35
mV
Output Offset Voltage Drift
Full
-
10
-
µV/oC
PSRR
25
39
45
-
dB
Full
35
-
-
dB
25
-
14
-
nV/√Hz
Input Noise Voltage (Note 2)
100kHz
Input Noise Current (Note 2)
100kHz
Input Bias Current (Note 2)
25
-
51
-
pA/√Hz
25
-
10
40
µA
Full
-
-
65
µA
Input Resistance
25
25
50
-
kΩ
Input Capacitance
25
-
2
-
pF
TRANSFER CHARACTERISTICS
Gain
VOUT = 2VP-P
±2V Full Scale
DC Non-Linearity (Note 2)
25
0.980
0.990
1.02
V/V
Full
0.975
-
1.025
V/V
25
-
0.003
-
%
OUTPUT CHARACTERISTICS
Output Voltage (Note 2)
Output Current (Note 2)
RL = 50Ω
25
3.0
3.3
-
±V
Full
2.5
3.0
-
±V
25, 85
50
60
-
mA
-40
35
50
-
mA
Full
4.5
-
5.5
±V
POWER SUPPLY CHARACTERISTICS
Supply Voltage Range
Supply Current (Note 2)
25
-
21
26
mA
Full
-
-
33
mA
VOUT = 0.2VP-P
25
-
750
-
MHz
Slew Rate
VOUT = 5VP-P
25
-
1300
-
V/µs
Full Power Bandwidth (Note 2)
VOUT = 4VP-P
25
-
150
-
MHz
AC CHARACTERISTICS
-3dB Bandwidth (Note 2)
To 100MHz
25
-
±0.03
-
dB
To 30MHz
25
-
±0.01
-
dB
Linear Phase Deviation (Note 2)
DC to 100MHz
25
-
±0.3
-
Degrees
2nd Harmonic Distortion (Note 2)
50MHz, VOUT = 2VP-P
25
-
-60
-
dBc
3rd Harmonic Distortion (Note 2)
50MHz, VOUT = 2VP-P
25
-
-80
-
dBc
3rd Order Intercept (Note 2)
100MHz
25
-
30
-
dBm
Gain Flatness (Note 2)
2
HFA1110
VSUPPLY = ±5V, RL = 100Ω, Unless Otherwise Specified (Continued)
Electrical Specifications
PARAMETER
TEST CONDITIONS
TEMP (oC)
MIN
TYP
MAX
UNITS
-1dB Gain Compression
100MHz
25
-
14
-
dBm
Reverse Gain (S12, Note 2)
100MHz, VOUT = 1VP-P
25
-
-60
-
dB
Rise Time
VOUT = 0.5V Step
25
-
0.5
-
ns
Overshoot (Note 2)
VOUT = 1.0V Step, Input Signal
Rise/Fall = 1ns
25
-
2.5
-
%
0.2% Settling Time (Note 2)
VOUT = 1V to 0V
25
-
7
-
ns
0.1% Settling Time (Note 2)
VOUT = 1V to 0V
25
-
11
-
ns
TRANSIENT RESPONSE
Overdrive Recovery Time
25
-
15
-
ns
Differential Gain
3.58MHz, RL = 75Ω
25
-
0.04
-
%
Differential Phase
3.58MHz, RL = 75Ω
25
-
0.025
-
Degrees
NOTE:
2. See Typical Performance Curves for more information.
Application Information
PC Board Layout
50Ω
0.1µF
The frequency performance of this amplifier depends a great
deal on the amount of care taken in designing the PC board.
The use of low inductance components such as chip
resistors and chip capacitors is strongly recommended,
while a solid ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
chip (0.1µF) capacitor works well in most cases.
1
+5V
10µF
8
2
7
HFA1110
IN
3
6
4
5
SCHEMATIC DIAGRAM
BOTTOM LAYOUT
An example of a good high frequency layout is the
Evaluation Board shown below.
Evaluation Board
TOP LAYOUT
The layout and schematic of the board are shown here:
NOTE: The SOIC version may be evaluated in the DIP board by
using a SOIC-to-DIP adapter such as Aries Electronics Part Number
08-350000-10.
3
-5V
10µF
50Ω
Terminated microstrip signal lines are recommended at the
input and output of the device. Output capacitance, such as
that resulting from an improperly terminated transmission
line will degrade the frequency response of the amplifier and
may cause oscillations. In most cases, the oscillation can be
avoided by placing a resistor (RS) in series with the output.
See the “Recommended RS vs Load Capacitance” graph for
specific recommendations.
An evaluation board is available for the HFA1110 (part
number HFA1110EVAL). Please contact your local sales
office for information.
OUT
RS
1
0.1µF
HFA1110
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified
1.2
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (mV)
120
80
40
0
-40
-80
0.8
0.4
0
-0.4
-0.8
-120
-1.2
TIME (5ns/DIV.)
TIME (5ns/DIV.)
FIGURE 1. SMALL SIGNAL PULSE RESPONSE
FIGURE 2. LARGE SIGNAL PULSE RESPONSE
2
-45
-2
-90
-3
-135
-4
-180
PHASE
VOUT = 200mVP-P
-5
-225
RL = 100Ω
3
0
RL = 50Ω
-3
-6
0
-90
-180
-270
-6
-7
-8
0
200M
400M
600M
800M
1M
1G
10M
-360
1G
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 3. FREQUENCY RESPONSE
FIGURE 4. FREQUENCY RESPONSE FOR VARIOUS LOAD
RESISTORS
2
890
1
870
BANDWIDTH (MHz)
0
-1
GAIN (dB)
-270
RL = 1kΩ
PHASE (DEGREES)
0
-1
GAIN (dB)
GAIN (dB)
0
RL = 1kΩ
6
PHASE (DEGREES)
GAIN
VOUT = 200mVP-P
VOUT = 1VP-P
1
-2
VOUT = 200mVP-P
VOUT = 2.5VP-P
VOUT = 4VP-P
-3
-4
850
830
810
790
770
-5
750
-6
730
-7
710
-8
1M
10M
100M
FREQUENCY (Hz)
1G
FIGURE 5. FREQUENCY RESPONSE FOR VARIOUS OUTPUT
VOLTAGES
4
-50
-30
-10
10
30
50
70
90
110
TEMPERATURE (oC)
FIGURE 6. -3dB BANDWIDTH vs TEMPERATURE
130
HFA1110
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued)
2.0
0.20
1.5
DEVIATION (DEGREES)
0.25
GAIN (dB)
0.15
0.10
0.05
0
-0.05
1.0
0.5
0
-0.5
-1.0
-1.5
-0.10
-2.0
1M
10M
FREQUENCY (Hz)
0
100M 200M
15M 30M 45M 60M 75M 90M 105M 120M 135M 150M
FREQUENCY (Hz)
FIGURE 7. GAIN FLATNESS
FIGURE 8. DEVIATION FROM LINEAR PHASE
-30
+90
PHASE
GAIN
-40
+45
0
-50
-60
INTERCEPT POINT (dBm)
+135
PHASE (DEGREES)
GAIN (dB)
50
-20
40
30
20
10
VOUT = 1VP-P
0
0
200M
400M
600M
800M
1G
0
50
100
150
200
250
300
350
400
FREQUENCY (MHz)
FREQUENCY (Hz)
FIGURE 9. REVERSE GAIN AND PHASE (S12)
FIGURE 10. TWO-TONE, THIRD ORDER INTERMODULATION
INTERCEPT
-30
-30
-40
-40
DISTORTION (dBc)
DISTORTION (dBc)
100 MHz
-50
50 MHz
-60
-70
30 MHz
-80
100 MHz
-50
-60
-70
50 MHz
-80
30 MHz
-90
-90
-100
-100
-5
-3
-1
1
3
5
7
9
11
OUTPUT POWER (dBm)
FIGURE 11. SECOND HARMONIC DISTORTION vs POUT
5
13
-5
-3
-1
1
3
5
7
9
11
OUTPUT POWER (dBm)
FIGURE 12. THIRD HARMONIC DISTORTION vs POUT
13
HFA1110
Typical Performance Curves
VSUPPLY = ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued)
0.8
0.4
0.2
0
-0.2
-0.4
RS (Ω)
SETTLING ERROR (%)
VOUT = 1V
-0.8
50
45
40
35
30
25
20
15
10
5
0
0
-5
0
5
10
15
20
25
30
35
40
40
80
120
45
160
200
240
280
320
360
CL (pF)
TIME (ns)
FIGURE 13. SETTLING RESPONSE
FIGURE 14. RECOMMENDED SERIES OUTPUT RESISTOR vs
CLOAD
0.04
21
RL = 200Ω
0.02
15
RL = 100Ω
12
VO = 2.0VP-P
VO = 1.0VP-P
9
RL = 1kΩ
ERROR (%)
OVERSHOOT (%)
18
6
0
-0.02
VO = 0.5VP-P
3
0
200
300
400
500
600
700
800
900
-0.04
1000
-3.0
-2.0
-1.0
0
1.0
INPUT VOLTAGE (V)
INPUT RISE TIME (ps)
3.0
FIGURE 16. INTEGRAL LINEARITY ERROR
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
25
24
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
FIGURE 15. OVERSHOOT vs INPUT RISETIME
2.0
23
22
21
20
19
18
17
5
6
7
8
9
TOTAL SUPPLY VOLTAGE (V+ - V-, V)
FIGURE 17. SUPPLY CURRENT vs SUPPLY VOLTAGE
6
10
-60
-40
-20
0
20
40
60
80
100
TEMPERATURE (oC)
FIGURE 18. SUPPLY CURRENT vs TEMPERATURE
120
HFA1110
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
-60
VSUPPLY = ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued)
10
OUTPUT OFFSET VOLTAGE (mV)
BIAS CURRENT (µA)
Typical Performance Curves
9.8
9.6
9.4
9.2
9
8.8
8.6
8.4
8.2
8
-40
-20
0
20
40
60
80
100
7.8
-60
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (oC)
TEMPERATURE (oC)
FIGURE 19. BIAS CURRENT vs TEMPERATURE
FIGURE 20. OFFSET VOLTAGE vs TEMPERATURE
3.8
100
200
80
160
60
120
3.5
+VOUT (RL = 100Ω)
3.4
3.3
+VOUT (RL = 50Ω)
|-VOUT |(RL = 100Ω)
3.2
3.1
|-VOUT |(RL = 50Ω)
3
40
80
INI
20
40
2.9
2.8
-60
ENI
-40
-20
0
20
40
60
80
100
TEMPERATURE (oC)
FIGURE 21. OUTPUT VOLTAGE vs TEMPERATURE
7
120
0
100
1K
10K
0
100K
FREQUENCY (Hz)
FIGURE 22. INPUT NOISE vs FREQUENCY
NOISE CURRENT (pA/√Hz)
3.6
NOISE VOLTAGE (nV/√Hz)
OUTPUT VOLTAGE (V)
3.7
HFA1110
Die Characteristics
DIE DIMENSIONS:
PASSIVATION:
63 mils x 44 mils x 19 mils
1600µm x 1130µm x 483µm
Type: Nitride
Thickness: 4kÅ ±0.5kÅ
TRANSISTOR COUNT:
METALLIZATION:
52
Type: Metal 1: AlCu(2%)/TiW
Thickness: Metal 1: 8kÅ ±0.4kÅ
Type: Metal 2: AlCu(2%)
Thickness: Metal 2: 16kÅ ±0.8kÅ
SUBSTRATE POTENTIAL (POWERED UP):
Floating (Recommend Connection to V-)
Metallization Mask Layout
HFA1110
NC
IN
V-
NC
NC
NC
NC
V+
OUT
8
HFA1110
Small Outline Plastic Packages (SOIC)
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
N
INDEX
AREA
0.25(0.010) M
H
B M
E
INCHES
-B-
1
2
SYMBOL
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
e
α
A1
B
0.25(0.010) M
C A M
MAX
MIN
MAX
NOTES
A
0.0532
0.0688
1.35
1.75
-
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.1890
0.1968
4.80
5.00
3
E
0.1497
0.1574
3.80
4.00
4
e
C
0.10(0.004)
B S
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
MILLIMETERS
MIN
0.050 BSC
1.27 BSC
0.2284
0.2440
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
1.27
6
8o
0o
N
α
5.80
-
H
8
0o
6.20
-
8
7
8o
Rev. 0 12/93
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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