Hanbit HMF25664F4VP Flash-rom module 2mbyte (256k x 64-bit) ,120pin smm,3.3v Datasheet

HANBit
HMF25664F4VP
FLASH-ROM MODULE 2MByte (256K x 64-Bit) ,120PIN SMM,3.3V
Part No. HMF25664F4VP
GENERAL DESCRIPTION
The HMF25664F4VPis a high-speed flash read only memory (FROM) module containing 262,144 words organized in an
x64bit configuration. The module consists of four 256K x 16 FROM mounted on a 120-pin, SMM connector FR4-printed circuit
board. Commands are written to the command register using standard microprocessor write timings.
Register contents serve as input to an internal state-machine, which controls the erase and programming circuitry. Write
cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the
device is similar to reading from 12.0V flash or EPROM devices.
Output enable (/OE) and write enable (/WE) can set the memory input and output. The host system can detect a program or
erase operation is complete by observing the Ready Pin, or reading the DQ7(Data # Polling) and DQ6(Toggle) status bits.
When FROM module is disable condition the module is becoming power standby mode, system designer can get low -power
design. All module components may be powered from a single + 3.0V DC power supply and all inputs and outputs are LVTTLcompatible
PIN ASSIGNMENT
P1
FEATURES
P2
PIN
Symb
ol
PIN
Symbol
Vss
DQ0
DQ1
1
2
3
Vcc
DQ16
DQ17
31
32
33
Vss
DQ48
DQ49
PIN
Symb
ol
31
32
33
1
2
3
Symb
ol
Vcc
DQ32
DQ33
w Easy memory expansion
4
5
6
DQ34
DQ35
DQ36
34
35
36
DQ2
DQ3
DQ4
4
5
6
DQ18
DQ19
DQ20
34
35
36
DQ50
DQ51
DQ52
w Hardware reset pin(RESET#)
7
DQ37
37
DQ5
7
DQ21
37
DQ53
w FR4-PCB design
8
DQ38
38
DQ6
8
DQ22
38
DQ54
9
10
DQ39
Vcc
39
40
DQ7
Vss
9
10
DQ23
Vcc
39
40
DQ55
Vss
11
12
13
DQ40
DQ41
DQ42
41
42
43
DQ8
DQ9
DQ10
11
12
13
DQ24
DQ25
DQ26
41
42
43
DQ56
DQ57
DQ58
14
15
16
17
DQ43
DQ44
DQ45
DQ46
44
45
46
47
DQ11
DQ12
DQ13
DQ14
14
15
16
17
DQ27
DQ28
DQ29
DQ30
44
45
46
47
DQ59
DQ60
DQ61
DQ62
18
19
20
21
DQ47
Vcc
A1
A2
48
49
50
51
DQ15
Vss
A10
A11
18
19
20
21
DQ31
Vcc
NC
A0
48
49
50
51
DQ63
Vss
NC
/BANK0
22
23
24
25
26
A3
A4
A5
Vcc
A6
52
53
54
55
56
A12
A13
A14
Vss
A15
22
23
24
25
26
52
53
54
55
56
Vss
/BYTE
/WE3
Vss
NC
27
A7
57
A17
27
57
NC
28
A8
58
NC
28
58
NC
29
A9
59
NC
29
59
NC
30
Vcc
60
Vss
30
A16
/WE1
/WE2
Vcc
/OE
/RES
ET
/WE0
/RY_B
Y
Vcc
60
Vss
w Access time : 50, 55, 70, 90 and 120ns
w High-density 2MByte design
w High-reliability, low-power design
w Single + 3V ± 0.3V power supply
w 120-Pin Designed
by 60-Pin Fine Pitch
Connector P1,P2
w Minimum 1,000,000 write cycle guarantee per
sector
w 20-year data retention at 125 oC
w Flexible sector architecture
w Embedded algorithms
w Erase suspend / Erase resume
OPTIONS
MARKING
w Timing
50ns access
-50
55ns access
-55
70ns access
-70
90ns access
-90
120ns access
-120
w Packages
120-pin SMM
URL: www.hbe.co.kr
REV.02(August,2002)
F
PIN
1
HANbit Electronics Co., Ltd.
HANBit
HMF25664F4VP
FUNCTIONAL BLOCK DIAGRAM
DQ0 – DQ63
A0 – A17
64
18
A(0-17)
DQ(0-15)
/WE0
/WE
/BYTE
/OE
U2
/CE
RY-BY
/Reset
A(0-17)
DQ(16-31)
/WE1
/WE
/BYTE
/OE
U3
/CE
RY-BY
/Reset
A(0-17)
DQ(32-47)
/WE2
/WE
/OE
/BYTE
/CE
U1
RY-BY
/Reset
A(0-17)
DQ(48-63)
/WE3
/WE
/OE
/OE
/BANK0
/CE
RY_/BY
RY-BY
/BYTE
U4
/Reset
/RESET
/BYTE
URL: www.hbe.co.kr
REV.02(August,2002)
2
HANbit Electronics Co., Ltd.
HANBit
HMF25664F4VP
TRUTH TABLE
DQ8-DQ15
MODE
/OE
/CE
/WE
/RESET
DQ0-DQ7
/BYTE=V IH
STANDBY
X
Vcc± 0.3
X
Vcc± 0.3
HIGH-Z
HIGH-Z
NOT SELECTED
H
L
H
H
HIGH-Z
HIGH-Z
READ
L
L
H
H
Dout
Dout
WRITE or ERASE
H
L
L
H
Din
Din
NOTE: X means don’t care
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATING
VIN,OUT
-0.5V to VCC+0.5V
Voltage with respect to ground Vcc
VCC
-0.5V to +4.0V
Storage Temperature
TSTG
-65oC to +150oC
Voltage with respect to ground all other pins
Operating Temperature
TA
-55Oc to +125 oC
w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only and functional oper ation of the device at these or any other conditions above those indicated
in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
SYMBOL
MIN
Vcc for Regulated Voltages Range
VCC
3.0V
3.6V
Vcc for Full Voltages Range
Vcc
2.7V
3.6V
Ground
VSS
0
PARAMETER
TYP.
MAX
0
0
DC AND OPERATING CHARACTERISTICS (0oC ≤ TA ≤ 70 oC ; Vcc = 5V ± 0.5V )
PARAMETER
TEST CONDITIONS
SYMBOL
MIN
MAX
UNITS
IL1
±1.0
µA
IL0
±1.0
µA
VIN=VSS to Vcc
Input Load Current
Vcc = Vcc max
Output Leakage Current
Vcc=Vcc max, V OUT= VSS to Vcc
IOH = -2.0mA, Vcc = Vcc min
VOH1
0.85VCC
IOH = -100uA, Vcc = Vcc min
VOH2
VCC – 0.4
Output Low Voltage
IOL = 4.0mA, Vcc =Vcc min
VOL
Vcc Active Current for Read(1)
Vcc Active Current for Program
or Erase(2,3)
/CE = VIL, /OE=VIH,
ICC1
/CE = VIL, /OE=VIH
Vcc Standby Current(3)
/CE,/RESET= VCC ±0.3V
Output High Voltage
0.45
V
7
12
mA
ICC2
15
30
mA
ICC3
0.2
5
mA
2.5
V
Low Vcc Lock-Out Voltage
VLKO
2.3
Notes: 1. The Icc current listed is typically less than 2mA/MHz, with /OE at VIH. typical V CC is 3.0V.
2. Icc active while embedded algorithm (program or erase) is in progress
3. Maximum Icc current specifications are tested with Vcc=Vcc max
URL: www.hbe.co.kr
REV.02(August,2002)
3
V
HANbit Electronics Co., Ltd.
HANBit
HMF25664F4VP
ERASE AND PROGRAMMING PERFORMANCE
LIMITS
PARAMETER
UNIT
MIN.
TYP.
MAX.
Sector Erase Time
-
0.7
15
Sec
Byte Programming Time
-
9
300
µs
Chip Programming Time
-
11
COMMENTS
Excludes 00H programming
prior to erasure
Excludes system-level
overhead
Excludes system-level
overhead
Sec
CAPACITANCE
PARAMETER
SYMBOL
PARAMETER
DESCRIPTION
CIN
TEST SETUP
TYP.
MAX
UNIT
VIN = 0
6
7.5
pF
VOUT = 0
8.5
12
pF
VIN = 0
7.5
9
pF
Input Capacitance
COUT
Output Capacitance
CIN2
Control Pin Capacitance
o
Notes : Test conditions TA = 25 C, f=1.0 MHz.
AC CHARACTERISTICS
u Read Only Operations Characteristics
PARAMETER
SYMBOLS
JEDEC
STANDARD
TAVAV
tRC
Speed Options
DESCRIPTION
TEST SETUP
Read Cycle Time
UNIT
50R
55R
70
90
120
Min
50
55
70
90
120
ns
Max
50
55
70
90
120
ns
Max
50
55
70
90
120
ns
TAVQV
tACC
Address to Output Delay
/CE = VIL
/OE = VIL
TELQV
tCE
Chip Enable to Output Delay
/OE = VIL
TGLQV
tOE
Chip Enable to Output Delay
Max
30
30
30
35
50
ns
TEHQZ
tDF
Chip Enable to Output High -Z
Max
25
25
25
30
30
ns
TGHQZ
tDF
Max
25
25
25
30
30
ns
TAXQX
tQH
Output Enable to Output High-Z
Output Hold Time From Addresses,
/CE or /OE, Whichever Occurs First
Min
0
0
0
0
0
ns
Notes : Test Conditions
Output Load : 1TTL gate
Output Load Capacitance
- 50R,55R,70 -30 pF
- 90,120 -30pF
Input rise and fall times : 5 ns
Input pulse levels : 0.0V-3.0V
Timing measurement reference level
- Input : 1.5V
- Output :1.5V
URL: www.hbe.co.kr
REV.02(August,2002)
4
HANbit Electronics Co., Ltd.
HANBit
HMF25664F4VP
3.3V
2.7kΩ
IN3064
or Equivalent
Device
Under
Test
CL
6.2kΩ
Diodes = IN3064
or Equivalent
Note : CL = 100pF including jig capacitance
u Erase/Program Operations
PARAMETER
SYMBOLS
UNIT
Speed Options
DESCRIPTION
JEDEC
STANDARD
TAVAV
tWC
Write Cycle Time
Min
TAVWL
tAS
Address Setup Time
Min
TWLAX
tAH
Address Hold Time
Min
45
45
45
45
50
ns
TDVWH
tDS
Data Setup Time
Min
45
45
45
45
50
ns
TWHDX
tDH
Data Hold Time
Min
0
ns
tOES
Output Enable Setup Time
Min
0
ns
Read Recover Time Before write
Min
0
ns
50R
55R
70
90
120
50
55
70
90
120
0
ns
ns
TGHWL
tGHWL
TELWL
tCS
/CE Setup Time
Min
0
ns
TWHEH
tCH
/CE Hold Time
Min
0
ns
TWLWH
tWP
Write Pulse Width
Min
tWHWL
tWPH
Write Pulse Width High
Min
30
ns
tWHWH1
tWHWH1
Byte Programming Operation
Typ
9
µs
tWHWH2
tWHWH2
Sector Erase Operation (Note1)
Typ
0.7
sec
Vcc set up time
Min
50
µs
5
HANbit Electronics Co., Ltd.
tVCS
35
35
35
35
50
Notes : 1. This does not include the preprogramming time
2. This timing is only for Sector Protect oper ations
URL: www.hbe.co.kr
REV.02(August,2002)
ns
HANBit
HMF25664F4VP
u Erase/Program Operations
Alternate /CE Controlled Writes
PARAMETER SYMBOLS
SPEED OPTION
UNIT
DESCRIPTION
JEDEC
STANDARD
50R
55R
70
90
120
tAVAV
tWC
Write Cycle Time
Min
50
55
70
90
120
tAVEL
tAS
Address Setup Time
Min
tELAX
tAH
Address Hold Time
Min
45
45
45
45
50
ns
tDVEH
tDS
Data Setup Time
Min
35
35
35
45
50
ns
tEHDX
tDH
Data Hold Time
Min
0
ns
tOES
Output Enable Setup Time
Min
0
ns
tGHEL
tGHEL
Read Recover Time Before Write
Min
0
ns
tWLEL
tWS
/WE Setup Time
Min
0
ns
tEHWH
tWH
/WE Hold Time
Min
0
ns
tELEH
tCP
/CE Pulse Width
Min
tEHEL
tCPH
/CE Pulse Width High
Min
30
ns
tWHWH1
tWHWH1
Byte Programming Operation
Typ
9
µs
tWHWH2
tWHWH2
Sector Erase Operation (Note)
Typ
0.7
sec
0
35
35
35
ns
35
50
Notes : This does not include the preprogramming time.
URL: www.hbe.co.kr
REV.02(August,2002)
6
ns
HANbit Electronics Co., Ltd.
ns
HANBit
HMF25664F4VP
u READ OPERATIONS TIMING
u RESET TIMING
URL: www.hbe.co.kr
REV.02(August,2002)
7
HANbit Electronics Co., Ltd.
HANBit
HMF25664F4VP
u PROGRAM OPERATIONS TIMING
u CHIP/SECTOR ERASE OPERATION TIMINGS
URL: www.hbe.co.kr
REV.02(August,2002)
8
HANbit Electronics Co., Ltd.
HANBit
HMF25664F4VP
u DATA# POLLING TIMES(DURING EMBEDDED ALGORITHMS)
u TOGGLE# BIT TIMINGS (DURING EMBEDDED ALGORITHMS)
URL: www.hbe.co.kr
REV.02(August,2002)
9
HANbit Electronics Co., Ltd.
HANBit
HMF25664F4VP
u SECTOR PROTECT UNPROTECT TIMEING DIAGRAM
u ALTERNATE CE# CONTROLLED WRITE OPERATING TIMINGS
URL: www.hbe.co.kr
REV.02(August,2002)
10
HANbit Electronics Co., Ltd.
HANBit
HMF25664F4VP
PACKAGE DIMENSIONS
FRONT SIDE
REAR SIDE
URL: www.hbe.co.kr
REV.02(August,2002)
11
HANbit Electronics Co., Ltd.
HANBit
HMF25664F4VP
ORDERING INFORMATION
Part Number
Density
Org.
Package
HMF25664F4VP-50
2MByte
X 64
120 Pin-SMM
HMF25664F4VP-55
2MByte
X 64
HMF25664F4VP-70
2MByte
HMF25664F4VP-90
HMF25664F4VP-120
Component
Vcc
SPEED
4EA
3.3V
50ns
120 Pin-SMM
4EA
3.3V
55ns
X 64
120 Pin-SMM
4EA
3.3V
70ns
2MByte
X 64
120 Pin-SMM
4EA
3.3V
90ns
2MByte
X 64
120 Pin-SMM
4EA
3.3V
120ns
Number
P : PULL UP OF ALL SIGNAL (DATA LINE, ADDRESS LINE, CONTROLL SIGNAL LINE)
URL: www.hbe.co.kr
REV.02(August,2002)
12
HANbit Electronics Co., Ltd.
Similar pages