SUTEX HV518PJ-G 32-channel vacuum-fluorescent display driver Datasheet

Supertex inc.
HV518
32-Channel Vacuum-Fluorescent
Display Driver
Features
►
►
►
►
►
►
32 output lines
90V output swing
Active pull-down
Latches on all outputs
Up to 6.0MHz @ VDD = 5.0V
-40°C to +85°C operation
Applications
► Vacuum flourescent displays
► DC plasma displays
General Description
The HV518 is designed for vacuum fluorescent or DC plasma
applications, where it can serve as a segment, digit or matrix
display driver. Each device has 32 outputs, 32 latches and a
32-bit cascadable shift register.
Serial data enters the shift register on the LOW-to-HIGH
transition of the clock input. With latch enable (LE) HIGH,
parallel data is transferred to the output buffers through a
32-bit latch. When LE is low the data is stored in the latch.
When STROBE (STR) is LOW, all outputs are enabled; if
STROBE is HIGH, all outputs are LOW.
Block Diagram
LE
DOUT
Doc.# DSFP-HV518
C072413
VPP
HVOUT1
DIN
CLK
STR
32-Bit
Shift
Register
Latches
HVOUT32
Supertex inc.
www.supertex.com
HV518
Pin Configurations
Ordering Information
Part Number
Package
Packing
HV518P-G
40-Lead PDIP
9/Tube
HV518PJ-G
44-Lead PLCC
27/Tube
HV518PJ-G M903
44-Lead PLCC
500/Reel
40
1
-G denotes a lead (Pb)-free / RoHS compliant package
Absolute Maximum Ratings
Parameter
Value
Supply voltage, VDD
-0.5V to +6.0V
Supply voltage, VPP
-0.5V to +90V
Logic input levels
40-Lead PDIP
(top view)
-0.5V to VDD +0.5V
Continuous total power dissipation
1,2
Operating temperature
6
1200mW
40
1 44
-40°C to +85°C
Storage temperature
-65°C to +150°C
Absolute Maximum Ratings are those values beyond which damage to the
device may occur. Functional operation under these conditions is not implied.
Continuous operation of the device at the absolute rating level may affect device
reliability. All voltages are referenced to GND.
Notes:
1. Duty cycle is limited by the total power dissipated in the package.
2. For operation above 25OC ambient, derate linearly to 85OC at 20mW/OC.
Typical Thermal Resistance
Package
θja
40-Lead PDIP
39 C/W
44-Lead PLCC
37 C/W
44-Lead PLCC
(top view)
Product Marking
Top Marking
O
YYWW
H V 518P
O
LLLLLLLLLL
Bottom Marking
CCCCCCCCCCC
AAA
Y = Last Digit of Year Sealed
WW = Week Sealed
L = Lot Number
C = Country of Origin*
A = Assembler ID*
= “Green” Packaging
*May be part of top marking
Package may or may not include the following marks: Si or
40-Lead PDIP
Top Marking
YYWW
HV518PJ
LLLLLLLLLL
Bottom Marking
CCCCCCCCCCC
AAA
YY = Year Sealed
WW = Week Sealed
L = Lot Number
C = Country of Origin*
A = Assembler ID*
= “Green” Packaging
*May be part of top marking
Package may or may not include the following marks: Si or
44-Lead PLCC
Doc.# DSFP-HV518
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Supertex inc.
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HV518
Recommended Operating Conditions (T
A
Sym
= 25°C, unless otherwise noted)
Parameter
Min
Max
Unit
Conditions
VDD
Logic supply voltage
4.5
5.5
V
---
VPP
High voltage supply
8.0
80
V
---
VIH
High-level input voltage
3.5
-
V
VDD = 4.5V, See Figure 1
VIL
Low-level input voltage
-
1.0
V
VDD = 4.5V, See Figure 1
IOH
High-level output current
-25
-
mA
---
IOL
Low-level output current
-
2.0
mA
---
fCLK
Clock frequency
-
6.0
MHz
VDD = 4.5V, See Figure 1
tw(CKH)
Pulse duration, clock high
83
-
ns
VDD = 4.5V
tw(CKL)
Pulse duration, clock low
83
-
ns
VDD = 4.5V
tsu
Setup time, data before clock
75
-
ns
VDD = 4.5V
th
Hold time, data after clock
75
-
ns
VDD = 4.5V
TA
Operating ambient temperature
-40
85
°C
---
Electrical Characteristics (over recommended ranges of operating ambient temperature unless otherwise noted.)
Sym
Parameter
Min
Typ
Max
Units
Conditions
IDD
Supply current
-
-
10
mA
VDD = 5.0V, fCH = 6.0 MHz
IDDQ
Quiescent supply current
-
-
0.5
mA
VDD = 5.5V, VIN = 0V
-
-
12
mA
Outputs high, TA = -40O
-
7.0
10
mA
Outputs high, TA = 0 to +85O
-
-
500
µA
Outputs low
HV output
70
-
-
Serial output
4.5
4.9
5.0
HV output
-
-
5.0
Serial output
-
0.06
0.8
IPP
Supply current
V
IOH = -25mA
VOH
HVIN operating current
VOL
LVIN operating current
IIH
Logic input current high
-
0.1
1.0
µA
VIH = VDD
IIL
Logic input current low
-
-0.1
-1.0
µA
VIL = 0V
V
VDD = 5.0V, IOH = -20µA
IOL = 1.0mA
IOL = 20µA
Note:
The total number of ON outputs times the duty cycle must not exceed the allowable package power disspation.
Switching Characteristics (V
PP
Sym
td
= 80V, CL = 50pF, TA = 25°C, unless otherwise noted)
Parameter
Delay time, clock to data output
Min
Typ
Max
Unit
-
-
600
ns
Conditions
CL = 15pF, See Figure 2
tDHL
Delay time, high-to-lowlevel, HV output
From latch enable
-
-
1.5
From strobe
-
-
1.0
tDLH
Delay time, low-to-highlevel, HV output
From latch enable
-
-
1.5
From strobe
-
-
1.0
tTHL
Transition time, high-to-low-level, HV output
-
-
3.0
µs
VDD = 4.5V, See Figure 4
tTLH
Transition time, low-to-high-level, HV output
-
-
2.5
µs
VDD = 4.5V, See Figure 4
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3
µs
µs
VDD = 4.5V, See Figure 3
VDD = 4.5V, See Figure 4
VDD = 4.5V, See Figure 3
VDD = 4.5V, See Figure 4
Supertex inc.
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HV518
Power-Up/ Power-Down Sequences
Power-up sequence should be the following:
1. Connect ground.
2. Apply VDD.
3. Set all inputs (Data, CLK, EN, etc.) to a known state.
4. Apply VPP.
The VPP should not drop below VDD or float during operation.
Power-down sequence should be the reverse of the above.
Input and Output Equivalent Circuits
VDD
VDD
VPP
DATA
OUT
INPUT
GND
GND
Logic Inputs
HVOUT
GND
Logic Data Output
High Voltage Outputs
Parameter Measurement Information
tw(CKH)
CLK
tw(CKH)
VIH
CLK
50%
VIL
tw(CKL)
tSU
VIL
td
th
VIH
DATA
IN
VIL
DATA
OUTPUT
VOL
Figure 2
VIH
50%
VIH
tDLH
tDLH or tDHL
90%
10%
VOH
VOL
50%
STR
VIL
HV
OUTPUT
VOH
50%
Figure 1: Input Timing Voltage Waveforms
LE
VIH
50%
VIL
tDHL
90%
HV
OUTPUT
10%
tTHL
Figure 4: Switching-Time Voltage Waveforms
Figure 3
Note:
For testing purposes, all input pulses have maximum rise and fall times of 30 nsec.
Doc.# DSFP-HV518
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Supertex inc.
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VOH
VOL
HV518
Truth Tables
Output
Input
Data Out
Data In
LE
STR
HV Outputs
H
H
X
X
H
All Low
L
L
H
H
L
High
*
L
H
L
Low
X
L
L
*
Data In
X
CLK
No Change
* Previous state.
* Previous state.
Typical Operating Sequence
CLK
DATA
IN
SR
CONTENTS
● ● ●
VALID
IRRELEVANT
INVALID
VALID
LE
LATCH
CONTENTS
PREVIOUSLY STORED DATA
NEW DATA VALID
STR
HV
OUTPUT
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VALID
5
Supertex inc.
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HV518
Pin Descriptions
40-Lead PDIP
Pin #
Function
Pin #
Function
Pin #
Function
1
VPP
15
HVOUT20
29
HVOUT10
2
SERIAL OUT
16
HVOUT19
30
HVOUT9
3
HVOUT32
17
HVOUT18
31
HVOUT8
4
HVOUT31
18
HVOUT17
32
HVOUT7
5
HVOUT30
19
STR
33
HVOUT6
6
HVOUT29
20
GND
34
HVOUT5
7
HVOUT28
21
CLK
35
HVOUT4
8
HVOUT27
22
LE
36
HVOUT3
9
HVOUT26
23
HVOUT16
37
HVOUT2
10
HVOUT25
24
HVOUT15
38
HVOUT1
11
HVOUT24
25
HVOUT14
39
DATA IN
12
HVOUT23
26
HVOUT13
40
VDD
13
HVOUT22
27
HVOUT12
14
HVOUT21
28
HVOUT11
Pin #
Function
Pin #
Function
44-Lead PLCC
Pin #
Function
1
VPP
16
HVOUT20
31
HVOUT12
2
SERIAL OUT
17
HVOUT19
32
HVOUT11
3
HVOUT32
18
N/C
33
HVOUT10
4
HVOUT31
19
HVOUT18
34
HVOUT9
5
HVOUT30
20
HVOUT17
35
HVOUT8
6
NC
21
STR
36
HVOUT7
7
HVOUT29
22
GND
37
HVOUT6
8
HVOUT28
23
CLK
38
HVOUT5
9
HVOUT27
24
LE
39
HVOUT4
10
HVOUT26
25
HVOUT16
40
HVOUT3
11
HVOUT25
26
HVOUT15
41
HVOUT2
12
HVOUT24
27
HVOUT14
42
HVOUT1
13
HVOUT23
28
N/C
43
DATA IN
14
HVOUT22
29
N/C
44
VDD
15
HVOUT21
30
HVOUT13
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Supertex inc.
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HV518
40-Lead PDIP (.600in Row Spacing) Package Outline (P)
2.095x.580in body (max), .250in height (max), .100in pitch
D
40
E1 E
Note 1
(Index Area)
b1
1
e
D1
b
D1
Top View
View B
A A2
L
View B
A
Seating
Plane
A1
eA
eB
A
Side View
View A - A
Note:
1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or
a printed indicator.
Symbol
Dimension
(inches)
A
A1
A2
b
b1
D
D1
E
E1
MIN
.140*
.015
.125
.014
.030
1.980
.065†
.590†
.485
NOM
-
-
-
-
-
-
-
-
-
MAX
.250
.055*
.195
.023
.070
2.095
.085*
.625
.580
†
e
.100
BSC
eA
.600
BSC
eB
L
.600*
.115
-
-
.700
.200
JEDEC Registration MS-011, Variation AC, Issue B, June, 1988.
* This dimension is not specified in the JEDEC drawing.
† This dimension differs from the JEDEC drawing.
Drawings not to scale.
Supertex Doc. #: DSPD-40DIPP, Version D041009.
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Supertex inc.
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HV518
44-Lead PLCC Package Outline (PJ)
.653x.653in body, .180in height (max), .050in pitch
D
D1
.048/.042
x 45O
1
6
44
.150max
.056/.042
x 45O
40
Note 1
(Index Area)
.075max
E
E1
Note 2
e
.020max
(3 Places)
Top View
Vertical Side View
View
B
b1
A
A1
Base .020min
Plane
A2
Seating
Plane
b
Horizontal Side View
R
View B
Notes:
1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or
a printed indicator.
2. Actual shape of this feature may vary.
Symbol
Dimension
(inches)
A
A1
A2
b
b1
D
D1
E
E1
MIN
.165
.090
.062
.013
.026
.685
.650
.685
.650
NOM
.172
.105
-
-
-
.690
.653
.690
.653
MAX
.180
.120
.083
.021
.036
.695
.656
.695
.656
†
e
.050
BSC
R
.025
.035
.045
JEDEC Registration MS-018, Variation AC, Issue A, June, 1993.
† This dimension differs from the JEDEC drawing.
Drawings not to scale.
Supertex Doc. #: DSPD-44PLCCPJ, Version F031111.
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives
an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)
Supertex inc.
©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited.
Doc.# DSFP-HV518
C072413
8
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
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