HV857L Low Noise, High Voltage EL Lamp Driver IC Features General Description ► ► ► ► ► ► The Supertex HV857L is a low noise, high voltage driver designed for driving Electroluminescent (EL) lamps of up to five square inches. It is the low noise version of the EL lamp driver HV857. The input supply voltage range is from 1.8V to 5.0V. The device uses a single inductor and a minimum number of passive components. The nominal regulated output voltage that is applied to the EL lamp is ±95V. The chip can be enabled/disabled by connecting the resistor on RSW-Osc to VDD/ground. Audible noise reduction 190 VPP output voltage for higher brightness Single cell lithium ion compatible 150nA shutdown current Wide input voltage range 1.8V to 5.0V Separately adjustable lamp and converter frequencies ► Output voltage regulation ► Split supply capability ► Available in DFN-8 and MSOP-8 packages The HV857L has two internal oscillators, a switching MOSFET, and a high voltage EL lamp driver. The frequency for the switching MOSFET is set by an external resistor connected between the RSW-Osc pin and the supply pin, VDD. The EL lamp driver frequency is set by an external resistor connected between the REL-Osc and VDD pins. An external inductor is connected between the LX and VDD pins, or VIN for split supply applications. A 0.003-0.1µF capacitor is connected between CS and ground. The EL lamp is connected between the VA and VB pins. Applications ► ► ► ► ► ► Mobile cellular phones Keypad backlighting LCD backlighting PDAs Handheld wireless communication products Global Positioning Systems (GPS) The switching MOSFET charges the external inductor and discharges it into the capacitor at CS. The voltage at CS will start to increase. Once the voltage at CS reaches a nominal value of 95V, the switching MOSFET is turned OFF to conserve power. The outputs VA and VB are configured as an H bridge, and are switching in opposite states to achieve ±95V across the EL lamp. Typical Application Circuit Enable Signal ON = VDD OFF = 0 + VDD _ + VIN _ CDD CIN 1 VDD VA 8 VB 7 RSW EL Lamp 2 RSW-Osc 3 REL-Osc CS 6 4 GND LX 5 REL D CS HV857LMG LX HV857L Ordering Information Package Options Device 8-Lead DFN (K7) 8-Lead MSOP (MG) HV857LK7-G HV857LMG-G HV857L -G indicates package is RoHS compliant (‘Green’) Pin Configuration Absolute Maximum Ratings Parameter Top View Value Supply Voltage, VDD -0.5V to 6.5V Operating Temperature VDD 1 -40°C to +85°C Storage Temperature 8 VA 7 VB -65°C to +150°C RSW-Osc 2 1.6W REL-Osc 3 6 CS 300mW GND 4 5 LX DFN-8 Power Dissipation MSOP-8 Power Dissipation MSOP-8 -0.5 to +120V Output voltage, VCS HV857LMG Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. VDD 1 RSW-Osc 2 Thermal Resistance DFN-8 8 VA 7 VB REL-Osc 3 6 CS GND 4 5 LX Package θja DFN-8 60OC/W HV857LK7 MSOP-8 O Pads are at the bottom of the package Exposed center pad is at ground potential 330 C/W Mounted on FR4 board, 25mm x 25mm x 1.57mm Recommended Operating Conditions Symbol Parameter Min Typ Max Units VDD Supply voltage 1.8 - 5.0 V --- fEL Operating drive frequency - - 1 kHz --- TA Operating temperature -40 - Conditions O +85 C --- Enable/Disable Function Table Symbol Parameter Min Typ Max Units EN-L EN-H Conditions Logic input low voltage 0 - 0.2 V VDD = 1.8V to 5.0V Logic input high voltage VDD - 0.2 - VDD V VDD = 1.8V to 5.0V Electrical Characteristics DC Characteristics (Over recommended operating conditions unless otherwise specified, T A Symbol Parameter RDS(ON) On-resistance of switching transistor VCS = 25°C) Min Typ Max Units - - 6.0 Ω I = 100mA Max. output regulation voltage 85 95 105 V VDD = 1.8V to 5.0V VA – VB Peak to Peak output voltage 170 190 210 V VDD = 1.8V to 5.0V IDDQ Quiescent VDD supply current - - 150 nA RSW-Osc = Low 2 Conditions HV857L Electrical Characteristics (cont.) Symbol Parameter Min Typ Max Units IDD Conditions Input current going into the VDD pin - - 150 µA VDD = 1.8V to 5.0V. See Figure 1 IIN Input current including inductor current - 25 40 mA See Figure 1* VCS Output voltage on VCS - 92 - V See Figure 1 fEL EL lamp frequency 175 205 235 Hz See Figure 1 fSW Switching transistor frequency 65 77 89 kHz See Figure 1 D Switching transistor duty cycle - 88 - % See Figure 1 * The inductor used is a 220µH Murata inductor, max DC resistance of 8.4Ω, part # LQH32CN221K21. Block Diagram LX VDD RSW-Osc CS Switch Osc Q GND Disable C VA VSENSE + Q High Voltage Level Translators VREF _ VDD Q EL Osc REL-Osc VB Q Figure 1: Typical Application/ Test Circuit ON = VDD Enable Signal OFF = 0V 3.0in2 EL lamp + 560kΩ 0.1µF VDD - 1 VDD VA 8 2 RSW-Osc VB 7 3 REL-Osc CS 6 BAS21 2.0MΩ LX 5 4 GND + HV857LMG 220µH* 4.7µF VIN * Murata Inductor LQH32CN221K21 3 3.3nF, 100V HV857L Typical Performance Device Lamp Size VDD = VIN IIN VCS fEL Brightness HV857LMG-G 3.0in2 3.3V 25.40mA 92V 205Hz 5.70ft-lm Typical Performance Curves for Figure 1 (EL Lamp = 3.0in , V 2 DD = 3.0V) VCS vs VIN IIN vs VIN 95 28 IIN (mA) 33 VCS (V) 105 85 75 65 55 23 18 13 1.5 2.5 3.5 4.5 5.5 1.5 2.5 3.5 Vin (V) 5.5 VIN (V) IIN vs VCS Brightness vs VIN 7 6 5 4 3 2 1 34 IIN (mA) Brightness (ft-lm) 4.5 29 24 19 14 1.5 2.5 3.5 4.5 5.5 55 65 75 85 VCS (V) VIN (V) Typical Waveform on VA, VB and Differential Waveform VA - VB 4 95 105 HV857L External Component Description External Component Description Diode Fast reverse recovery diode, BAS21 diode or equivalent. CS Capacitor 0.003µF to 0.1µF, 100V capacitor to GND is used to store the energy transferred from the inductor. The EL lamp frequency is controlled via an external REL resistor connected between REL-Osc and VDD of the device. The lamp frequency increases as REL decreases. As the EL lamp frequency increases, the amount of current drawn from the battery will increase and the output voltage VCS will decrease. The color of the EL lamp is dependent upon its frequency. REL Resistor A 2MΩ resistor would provide lamp frequency of 205Hz. Decreasing the REL resistor by a factor of 2 will increase the lamp frequency by a factor of 2. fEL = RSW Resistor REL The switching frequency of the converter is controlled via an external resistor, RSW, between RSW-Osc and VDD of the device. The switching frequency increases as RSW decreases. With a given inductor, as the switching frequency increases, the amount of current drawn from the battery will decrease and the output voltage, VCS, will also decrease. fSW = LX Inductor (2MΩ)(205Hz) (560kΩ)(77kHz) RSW The inductor LX is used to boost the low input voltage by inductive flyback. When the internal switch is on, the inductor is being charged. When the internal switch is off, the charge stored in the inductor will be transferred to the high voltage capacitor CS. The energy stored in the capacitor is connected to the internal H-bridge, and therefore to the EL lamp. In general, smaller value inductors, which can handle more current, are more suitable to drive larger size lamps. As the inductor value decreases, the switching frequency of the inductor (controlled by RSW) should be increased to avoid saturation. A 220µH Murata (LQH32CN221) inductor with 8.4Ω series DC resistance is typically recommended. For inductors with the same inductance value, but with lower series DC resistance, a lower RSW resistor value is needed to prevent high current draw and inductor saturation. Lamp As the EL lamp size increases, more current will be drawn from the battery to maintain high voltage across the EL lamp. The input power, (VIN x IIN), will also increase. If the input power is greater than the power dissipation of the package, an external resistor in series with one side of the lamp is recommended to help reduce the package power dissipation. Split Supply Configuration Enable/Disable Configuration The HV857L can also be used for handheld devices operating from a battery where a regulated voltage is available. This is shown in Figure 2. The regulated voltage can be used to run the internal logic of the HV857L. The amount of current necessary to run the internal logic is 150µA maximum at a VDD of 5.0V. Therefore, the regulated voltage could easily provide the current without being loaded down. The HV857L can be easily enabled and disabled via a logic control signal on the RSW and REL resistors as shown in Figure 2 below. The control signal, which can be from a microprocessor, has to track the VDD supply. RSW and REL are typically very high values. Therefore, only 10’s of microamperes will be drawn from the logic signal when it is at a logic high (enable) state. When the microprocessor signal is high, the device is enabled, and when the signal is low, it is disabled. 5 HV857L Figure 2: Split Supply and Enable/Disable Configuration ON = VDD Enable Signal OFF = 0V Regulated Voltage = VDD CDD RSW 1 VDD VA 8 2 RSW-Osc VB 7 3 REL-Osc CS 6 4 GND LX 5 EL Lamp D REL Battery Voltage = VIN CIN HV857LMG LX CS Audible Noise Reduction The EL lamp, when lit, emits an audible noise. This is due to EL lamp construction and it creates a major problem for applications where the EL lamp can be close to the ear such as cellular phones. The HV857L employs a circuit designed to help minimize the EL lamp’s audible noise by slowing down the rise and fall times seen by the EL lamp. 6 HV857L 8-Lead DFN Package Outline (K7) 3x3mm body, 0.80mm height (max), 0.65mm pitch D2 D 8 8 E E2 Note 1 (Index Area D/2 x E/2) Note 1 (Index Area D/2 x E/2) 1 1 View B Top View Bottom View Note 3 θ A A3 e b L Seating Plane L1 Note 2 A1 View B Side View Notes: 1. Details of Pin 1 identifier are optional, but must be located within the indicated area. The Pin 1 identifier may be either a mold, or an embedded metal or marked feature. 2. Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present. 3. The inner tip of the lead may be either rounded or square. Symbol MIN Dimension (mm) A A1 0.70 0.00 NOM 0.75 0.02 MAX 0.80 0.05 A3 0.20 REF b D D2 E E2 0.25 2.85 1.60 2.85 1.35 0.30 3.00 - 3.00 - 0.35 3.15 2.50 3.15 1.75 JEDEC Registration MO-229, Variation WEEC-2, Issue C, Aug. 2003. Drawings not to scale 7 e 0.65 BSC L L1 θ 0.30 - 0O 0.40 - - 0.50 0.15 14O HV857L 8-Lead MSOP Package Outline (MG) 3x3mm body, 1.10mm height (max), 0.65mm pitch D θ1 (x4) 8 E E1 L2 Note 1 (Index Area D1/2 x E1/2) L 1 Top View View B A A Seating Plane θ L1 Gauge Plane View B A2 A1 A Seating Plane b e View A-A Side View Note 1: A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier may be either a mold, or an embedded metal or marked feature. Symbol Dimension (mm) MIN NOM MAX A 0.75 1.10 A1 0.00 0.15 A2 0.75 0.85 0.95 b 0.22 0.38 D 2.80 3.00 3.20 E 4.65 4.90 5.15 E1 e 2.80 3.00 3.20 L L1 L2 0.40 0.65 BSC 0.60 0.80 θ 0 0.95 REF 0.25 BSC O 8 O θ1 5O 15O JEDEC Registration MO-187, Variation AA, Issue E, Dec. 2004. Drawings not to scale. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-HV857L NR111306 8