74F656A Octal buffer/driver with parity; non-inverting; 3-state Rev. 05 — 25 March 2010 Product data sheet 1. General description The 74F656A is an octal buffer and line driver with parity generation/checking. The 74F656A can be used as memory address driver, clock driver and bus-oriented transmitter/receiver. The inclusion of parity generation/checking improves PCB density. 2. Features Combines 74F244 and 74F280A functions in one device High impedance NPN base inputs for reduced input current (40 μA in HIGH and LOW states) IIL = 20 μA compared to 600 μA in FAST family specification For applications with high output drive and light bus loading Non-inverting 3-state output sink capability IOL = 64 mA and source IOH = 15 mA Inputs and outputs on separate sides simplifies board layout Combined functions reduce part count and enhance system performance Industrial temperature range available (−40 °C to +85 °C) 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version N74F656AD 0 °C to 70 °C SO24 SOT137-1 I74F656AD −40 °C to +85 °C plastic small outline package; 24 leads; body width 7.5 mm 74F656A NXP Semiconductors Octal buffer/driver with parity; non-inverting; 3-state 4. Functional diagram 2K 3 3 1 2 23 4 5 6 7 8 9 10 11 D0 D1 D2 D3 D4 D5 D6 D7 ΣE 21 19 18 17 16 15 14 [EVEN] 21 3, 5, 6, 7, 8, 9, 10, 11, 12 [ODD] 22 ΣO 22 ≥1 4 20 EN4 23 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 20 3, 5, 6, 7, 8, 9, 10, 11, 12 1 2 PI OE0 OE1 OE2 P3 13 001aal255 4 Z5 5 Z6 19 6 Z7 18 7 Z8 17 8 Z9 16 9 Z10 15 10 Z11 14 11 Z12 13 001aal256 Fig 1. Logic symbol Fig 2. IEC logic symbol 74F656A_5 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 05 — 25 March 2010 2 of 14 74F656A NXP Semiconductors Octal buffer/driver with parity; non-inverting; 3-state PI D0 D1 D2 D3 D4 D5 D6 D7 OE0 OE1 OE2 Fig 3. 3 21 ΣE 22 ΣO 4 20 5 19 6 18 7 17 8 16 9 15 10 14 11 13 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 1 2 23 001aal253 Logic diagram 74F656A_5 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 05 — 25 March 2010 3 of 14 74F656A NXP Semiconductors Octal buffer/driver with parity; non-inverting; 3-state 5. Pinning information 5.1 Pinning 74F656A OE0 1 24 VCC OE1 2 23 OE2 PI 3 22 ΣO D0 4 21 ΣE D1 5 20 Q0 D2 6 19 Q1 D3 7 18 Q2 D4 8 17 Q3 D5 9 16 Q4 D6 10 15 Q5 D7 11 14 Q6 GND 12 13 Q7 001aal254 Fig 4. Pin configuration 5.2 Pin description Table 2. Pin description Symbol Pin Description Unit load HIGH/LOW Load value[1] HIGH/LOW OE0 1 output enable input (active LOW) 1.0/0.033 20 μA/20 μA OE1 2 output enable input (active LOW) 1.0/0.033 20 μA/20 μA PI 3 parity input 1.0/0.033 20 μA/20 μA D0 to D7 4, 5, 6, 7, 8, 9, 10, 11 data input 2.0/0.066 40 μA/40 μA GND 12 ground (0 V) Q0 to Q7 20, 19, 18, 17, 16, 15, 14, 13 data output 750/106.7 15 mA/64 mA ΣE 21 even parity output 750/106.7 15 mA/64 mA ΣO 22 odd parity output 750/106.7 15 mA/64 mA OE2 23 output enable input (active LOW) 1.0/0.033 20 μA/20 μA VCC 24 supply voltage [1] One FAST Unit Load (UL) is defined as 20 μA in HIGH state, 0.6 μA in LOW state. 74F656A_5 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 05 — 25 March 2010 4 of 14 74F656A NXP Semiconductors Octal buffer/driver with parity; non-inverting; 3-state 6. Functional description 6.1 Function table Table 3. Function selection[1] Input Output OE0 OE1 OE2 Dn Qn L L L L L L L L H H H X X X Z X H X X Z X X H X Z [1] Status transparent disabled H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Table 4. Function parity outputs[1] Inputs State Parity output ΣE ΣO Even number of inputs (0, 2, 4, 6, 8) H H L Odd number of inputs (1, 3, 5, 7, 9) H L H Any OEn H Z Z [1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. 74F656A_5 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 05 — 25 March 2010 5 of 14 74F656A NXP Semiconductors Octal buffer/driver with parity; non-inverting; 3-state 7. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VCC supply voltage Conditions +7.0 V −0.5 +7.0 V [1] −0.5 VCC V −30 +5 mA - 128 mA commercial 0 70 °C industrial −40 +85 °C −65 +150 °C input voltage output voltage output in HIGH-state IIK input clamping current VI < 0 V IO output current output in LOW-state Tstg Unit −0.5 VO ambient temperature Max [1] VI Tamb Min [2] in free-air storage temperature [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 °C. 8. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter VCC VIH Conditions Min Typ Max Unit supply voltage 4.5 5.0 5.5 V HIGH-level input voltage 2.0 - - V VIL LOW-level input voltage - - 0.8 V IIK input clamping current - - −18 mA IOH HIGH-level output current −15 - - mA IOL LOW-level output current - - 64 mA 9. Static characteristics Table 7. Static characteristics Symbol Parameter 25 °C Conditions Min VIK input clamping voltage VCC = 4.5 V; IIK = −18 mA VOH HIGH-level output voltage VCC = 4.5 V; VIL = 0.8 V; VIH = 2.0 V Typ[1] −1.2 −0.73 −40 °C to +85 °C Unit Max Min Max - −1.2 - V IOH = −3 mA VCC = ±10 % - - - 2.4 - V VCC = ±5 % - 3.3 - 2.7 - V - - - 2.0 - V IOH = −15 mA VCC = ±10 % 74F656A_5 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 05 — 25 March 2010 6 of 14 74F656A NXP Semiconductors Octal buffer/driver with parity; non-inverting; 3-state Table 7. Static characteristics …continued Symbol Parameter 25 °C Conditions −40 °C to +85 °C Unit Min Typ[1] Max VOL LOW-level output voltage Min Max VCC = 4.5 V; VIL = 0.8 V; VIH = 2.0 V IOL = 64 mA VCC = ±10 % - - - - 0.55 V VCC = ±5 % - 0.42 - - 0.55 V VCC = 0 V; VI = 7.0 V - - - - 100 μA pin Dn - - - - 40 μA pin PI, OEn - - - - 20 μA pin Dn - - - - 80 μA pin PI, OEn - - - - 40 μA pin Dn - - - - −40 μA pin PI, OEn - - - - −20 μA - - - - 50 μA - - - - −50 μA - - - −100 −225 mA outputs HIGH-state - 50 - - 80 mA outputs LOW-state - 78 - - 110 mA outputs OFF-state - 83 - - 90 mA II input leakage current IIH HIGH-level input current VCC = 5.5 V; VI = 2.7 V; commercial VCC = 5.5 V; VI = 2.7 V; industrial IIL LOW-level input current IOZ VCC = 5.5 V; VI = 0.5 V OFF-state output current VCC = 5.5 V VO = 2.7 V VO = 0.5 V [2] IO output current VCC = 5.5 V ICC supply current VCC = 5.5 V; VI = GND or VCC [1] All typical values are measured at VCC = 5 V. [2] Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 10. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; for test circuit, see Figure 7. 25 °C; VCC = 5.0 V 0 °C to 70 °C; −40 °C to +85 °C; Unit VCC = 5.0 V ± 0.5 V VCC = 5.0 V ± 0.5 V Symbol Parameter Conditions Min Typ Max Min Max Min Max tPLH Dn to Qn; see Figure 5 2.0 4.0 6.5 2.0 7.0 2.0 8.0 ns Dn to ΣE, ΣO; see Figure 5 5.5 10.0 13.0 5.5 14.0 4.5 16.5 ns Dn to Qn; see Figure 5 2.5 5.5 7.0 2.5 7.5 2.5 9.0 ns Dn to ΣE, ΣO; see Figure 5 5.5 11.0 14.5 5.5 16.5 5.5 18.0 ns OEn to Qn; see Figure 6 3.5 7.0 3.5 11.5 3.0 13.0 ns tPHL tPZH LOW to HIGH propagation delay HIGH to LOW propagation delay OFF-state to HIGH propagation delay 10.5 74F656A_5 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 05 — 25 March 2010 7 of 14 74F656A NXP Semiconductors Octal buffer/driver with parity; non-inverting; 3-state Table 8. Dynamic characteristics …continued GND = 0 V; for test circuit, see Figure 7. Symbol Parameter 25 °C; VCC = 5.0 V Conditions 0 °C to 70 °C; −40 °C to +85 °C; Unit VCC = 5.0 V ± 0.5 V VCC = 5.0 V ± 0.5 V Min Typ Max Min Max Min Max tPZL OFF-state to LOW propagation delay OEn to Qn; see Figure 6 4.0 8.0 11.0 4.5 12.0 4.0 13.5 ns tPHZ HIGH to OFF-state propagation delay OEn to Qn; see Figure 6 1.5 4.5 8.0 1.5 9.0 1.5 10.0 ns tPLZ LOW to OFF-state propagation delay OEn to Qn; see Figure 6 2.0 5.0 8.0 2.0 9.0 1.5 10.0 ns 11. Waveforms VI Dn VM VM GND tPLH tPHL VOH ΣE, ΣO, Qn VM VM VOL 001aal257 VM = 1.5 V Fig 5. Propagation delay input Dn to output Qn, ΣE, ΣO VI OEn input VM GND tPZL tPLZ 3.5 V output LOW-to-OFF OFF-to-LOW VM VOL + 0.3 V VOL tPHZ VOH tPZH VOH − 0.3 V output HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs disabled outputs enabled 001aal293 VM = 1.5 V VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. 3-state output enable and disable times 74F656A_5 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 05 — 25 March 2010 8 of 14 74F656A NXP Semiconductors Octal buffer/driver with parity; non-inverting; 3-state VI tW 90 % 90 % negative pulse VM 0V VCC tf tr tr tf VI VI RL VO G DUT RT 90 % positive pulse 0V VEXT VM 10 % CL RL VM VM 10 % mna616 10 % tW 001aac221 a. Input pulse definition b. Test circuit Test data and VEXT levels are given in Table 9. RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = Test voltage for switching times. Fig 7. Table 9. Test circuit for measuring switching times Test data Input Load VEXT VI fI tW tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 3.0 V 1 MHz 500 ns ≤ 2.5 ns 50 pF 500 Ω open open 7.0 V 74F656A_5 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 05 — 25 March 2010 9 of 14 74F656A NXP Semiconductors Octal buffer/driver with parity; non-inverting; 3-state 12. Package outline SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 D E A X c HE y v M A Z 24 13 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 12 e detail X w M bp 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.32 0.23 15.6 15.2 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.01 0.019 0.013 0.014 0.009 0.61 0.60 0.30 0.29 0.05 0.419 0.043 0.055 0.394 0.016 inches 0.1 0.012 0.096 0.004 0.089 0.043 0.039 0.01 0.01 Z (1) 0.9 0.4 0.035 0.004 0.016 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. Fig 8. REFERENCES OUTLINE VERSION IEC JEDEC SOT137-1 075E05 MS-013 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Package outline SOT137-1 (SO24) 74F656A_5 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 05 — 25 March 2010 10 of 14 74F656A NXP Semiconductors Octal buffer/driver with parity; non-inverting; 3-state 13. Abbreviations Table 10. Abbreviations Acronym Description DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model PCB Printed-Circuit Board 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74F656A_5 20100325 Product data sheet - 74F656A_4 74F656A_4 20100205 Product data sheet - 74F656A_3 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • Legal texts have been adapted to the new company name where appropriate. DIP 24 (SOT222-1) package removed from Section 3 “Ordering information” and Section 12 “Package outline” 74F656A_3 20000630 Product specification - 74F656A_2 74F656A_2 19910717 Product specification - - 74F656A_5 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 05 — 25 March 2010 11 of 14 74F656A NXP Semiconductors Octal buffer/driver with parity; non-inverting; 3-state 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 15.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer’s third party customer(s) (hereinafter both referred to as “Application”). It is customer’s sole responsibility to check whether the NXP Semiconductors product is suitable and fit for the Application planned. Customer has to do all necessary testing for the Application in order to avoid a default of the Application and the product. NXP Semiconductors does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 74F656A_5 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 05 — 25 March 2010 12 of 14 74F656A NXP Semiconductors Octal buffer/driver with parity; non-inverting; 3-state 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] 74F656A_5 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 05 — 25 March 2010 13 of 14 74F656A NXP Semiconductors Octal buffer/driver with parity; non-inverting; 3-state 17. Contents 1 2 3 4 5 5.1 5.2 6 6.1 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 25 March 2010 Document identifier: 74F656A_5