INTEGRATED CIRCUITS 74F657 Octal transceiver with 8-bit parit generator/checker Process specification IC15 Data Handbook 1990 Jul 30 Philips Semiconductors Product specification Octal transceiver with 8-bit parity generator/checker FEATURES 74F657 The parity select (ODD/EVEN) input gives the user the option of odd or even parity systems. • Combines 74F245 and 74F280A functions in one package • High impedance base input for reduced loading (70µA in The parity (PARITY) pin is an output from the generator/checker when transmitting from the port A to B (T/R = high) and an input when receiving from port B to A port ( T/R = low). When transmitting (T/R = high) the parity select (ODD/EVEN) input is set, then the A port data is polled to determined the number of high bits. The parity (PARITY) output then goes to the logic state determined by the parity select (ODD/EVEN) setting and by the number of high bits on port A. For example, if the parity select (ODD/EVEN) is set low (even parity), and the number of high bits on port A is odd, then the parity (PARITY) output will be high, transmitting even parity. If the number of high bits on port A is even, then the parity (PARITY) output will be low, keeping even parity. high and low states) • Ideal in applications where high output drive and light bus loading are required (IIL is 70µA vs FAST std of 600µA) • 3–state buffer outputs sink 64mA and source 15mA • Input diodes for termination effects • 24–pin plastic slim DIP (300mil) package • Industrial temperature range available (–40°C to +85°C) DESCRIPTION The 74F657 is an octal transceiver featuring non–inverting buffers with 3–state outputs and an 8–bit parity generator/checker, and is intended for bus–oriented applications. The buffers have a guaranteed current sinking capability of 24mA at the A ports and 64mA at the B ports. The transmit/receive (T/R) input determines the direction of the data flow through the bidirectional transceivers. Transmit (active high) enables data from A ports to B ports; receive (active low) enables data from B ports to A ports. When in receive mode (T/R = low) the B port is polled to determine the number of high bits. If parity select (ODD/EVEN) is low (even parity) and the number of highs on port B is: (1) odd and the parity (PARITY) input is high, then ERROR will be high, significantly no error. (2) even and the parity (PARITY) input is high, then ERROR will be asserted low, indicating an error. The output enable (OE) input disables both the A and B ports by placing them in a high impedance condition when the OE input is high. TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT( TOTAL) 74F657 8.0ns 100mA ORDERING INFORMATION ORDER CODE COMMERCIAL RANGE INDUSTRIAL RANGE VCC = 5V ±10%, PKG DWG # Tamb = 0°C to +70°C VCC = 5V ±10%, Tamb = –40°C to +85°C N74F657N I74F657N SOT222-1 DESCRIPTION 24–pin plastic slim DIP (300mil) 24–pin plastic SOL N74F657D I74F657D SOT137-1 24–pin plastic SSOP N74F657DB I74F657DB SOT340-1 INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW A0 – A7 A ports 3–state inputs 3.5/0.117 70µA/70µA B0 – B7 B ports 3–state inputs 3.5/0.117 70µA/70µA PARITY Parity input 3.5/0.117 70µA/70µA Transmit/receive input 2.0/0.066 40µA/40µA Parity select input 1.0/0.033 20µA/20µA Output enable input (active low) 2.0/0.066 40µA/40µA T/R ODD/EVEN OE A0 – A7 A ports 3–state outputs 150/40 3.0mA/24mA B0 – B7 B ports 3–state outputs 750/106.7 15mA/64mA PARITY Parity output 750/106.7 15mA/64mA ERROR Error output 750/106.7 15mA/64mA Note to input and output loading and fan out table 1. One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state. 90 July 30 2 853 1117 00081 Philips Semiconductors Product specification Octal transceiver with 8-bit parity generator/checker PIN CONFIGURATION T/R 74F657 LOGIC SYMBOL 1 24 OE A0 2 23 B0 A1 3 22 B1 A2 4 21 B2 A3 5 20 B3 A4 6 VCC 7 2 19 GND 24 OE 18 GND 11 ODD/EVEN A6 9 16 B5 A7 10 15 B6 ODD/EVEN 11 14 B7 VCC = Pin 7 GND = Pin 18, 19 SF00414 IEC/IEEE SYMBOL G3 3 EN1/3G5 (REC) 3 EN2 (XMIT) N4 23 1 Z11 2 3 22 4 21 5 20 6 17 8 16 9 15 10 14 11 2k . . . 4, 2 18 4, 1 13 5 12 SF00416 90 July 30 8 9 10 PARITY 13 ERROR 12 22 21 20 17 16 15 14 13 PARITY ERROR 12 2 6 B0 B1 B2 B3 B4 B5 B6 B7 23 11 5 A0 A1 A2 A3 A4 A5 A6 A7 T/R 17 B4 24 4 1 A5 8 1 3 3 SF00415 Philips Semiconductors Product specification Octal transceiver with 8-bit parity generator/checker 74F657 LOGIC DIAGRAM T/R OE A0 A1 A2 A3 A4 A5 A6 A7 ODD/EVEN 1 24 2 23 3 22 4 21 5 20 6 17 8 16 9 15 10 14 B0 B1 B2 B3 B4 B5 B6 B7 13 PARITY 11 12 VCC = Pin 7, GND = Pin 18, 19 90 July 30 ERROR SF00417 4 Philips Semiconductors Product specification Octal transceiver with 8-bit parity generator/checker 74F657 FUNCTION TABLE NUMBER OF INPUTS THAT ARE HIGH INPUTS INPUT/OUTPUT OUTPUTS OE T/R ODD/EVEN PARITY ERROR OUTPUTS MODE 0, 2, 4, 6, 8 L L L L L L H H L L L L H L H H L L H L H L H L Z Z H L L H Transmit Transmit Receive Receive Receive Receive 1, 3, 5, 7 L L L L L L H H L L L L H L H H L L L H H L H L Z Z L H H L Transmit Transmit Receive Receive Receive Receive H X X Z Z Z Don’t care Notes to function table 1. H = High voltage level 2. L = Low voltage level 3. X = Don’t care 4. Z = High impedance ”’off” state ABSOLUTE MAXIMUM RATINGS (Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.) SYMBOL PARAMETER RATING UNIT VCC Supply voltage –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in high output state –0.5 to VCC V IOUT Current applied to output in low output state A0 – A7 48 mA B0 – B7, PARITY, ERROR 128 mA Commercial range 0 to +70 °C Industrial range –40 to +85 °C –65 to +150 °C Tamb Tstg Operating free air temperature range Storage temperature range RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMITS UNIT MIN NOM MAX 5.0 5.5 VCC Supply voltage 4.5 VIH High–level input voltage 2.0 VIL Low–level input voltage 0.8 V IIk Input clamp current –18 mA IOH High–level output current A0 – A7 –3 mA B0 – B7, PARITY, ERROR –15 mA IOL Low–level output current A0 – A7 24 mA B0 – B7, PARITY, ERROR 64 mA Tamb 90 July 30 Operating free air temperature range 5 V V Commercial range 0 +70 °C Industrial range –40 +85 °C Philips Semiconductors Product specification Octal transceiver with 8-bit parity generator/checker 74F657 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST LIMITS CONDITIONS1 All outputs High-level output voltage B0 – B7, VIL = MAX, PARITY, VIH = MIN ERROR 2.4 V ±5%VCC 2.7 V IOH = –12mA5 ±10%VCC 2.0 V ±5%VCC 2.0 V ±10%VCC 2.0 V ±5%VCC 2.0 V –15mA4 IOL = ±10%VCC 0.35 0.50 V ±5%VCC 0.35 0.50 V 48mA4 24mA4,5 VCC = MIN, VOL Low-level output voltage B0 – B7, VIL = MAX, IOL = ±10%VCC 0.38 0.55 V PARITY, VIH = MIN IOL = 48mA5 ±5%VCC 0.42 0.55 V 64mA4 ±5%VCC 0.42 0.55 V –0.73 -1.2 V VCC = 0.0V, VI = 7.0V 100 µA VCC = 5.5V, VI = 5.5V 2 1 mA mA 204 µA 405 µA 404 µA 805 µA –20 µA –40 µA ERROR VIK II Input clamp voltage Input current at maximum input voltage IOL = VCC = MIN, II = IIK OE, T/R, ODD/EVEN A0 – A7 B0 – B7 OOD/EVEN IIH High–level input current VCC = MAX, VI = 2.7V OE, T/R IIL Low–level input current UNIT MAX ±10%VCC IOH = A0 – A7 TYP2 IOH = –3mA4,5 VCC = MIN, VOH MIN OOD/EVEN VCC = MAX, VI = 0.5V OE, T/R IOZH + IIH Off–state output current, high–level voltage applied A0 – A7, B0 – B7, VCC = MAX, VO = 2.7V 70 µA IOZL + IIL Off–state output current, low–level voltage applied PARITY VCC = MAX, VO = 0.5V –70 µA IOZH Off–state output current, High–level voltage applied ERROR VCC = MAX, VO = 2.7V 50 µA IOZL Off–state output current, low–level voltage applied VCC = MAX, VO = 0.5V –50 µA IOS Short circuit output current3 -60 -150 mA -100 -225 mA 90 1254 mA 90 1355 mA 106 1504 mA 106 1605 mA 98 145 A0 – A7 VCC = MAX B0 – B7 ICCH ICC Supply current (total) ICCL VCC = MAX ICCZ mA Notes to DC electrical characteristics 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. 4. For commercial range. 5. For industrial range. 90 July 30 6 Philips Semiconductors Product specification Octal transceiver with 8-bit parity generator/checker 74F657 AC ELECTRICAL CHARACTERISTICS LIMITS Tamb = +25°C SYMBOL PARAMETER TEST CONDITION Tamb = 0°C to +70°C Tamb = –40°C to +85°C VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω VCC = +5.0V CL = 50pF, RL = 500Ω VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω UNIT MIN TYP MAX MIN MAX MIN MAX Waveform 2 2.5 3.0 5.5 6.0 7.5 7.5 2.5 3.0 8.0 8.0 2.0 2.5 9.0 9.0 ns 7.0 7.0 10.0 10.0 14.0 15.0 7.0 7.0 16.0 16.0 5.5 6.5 16.5 19.0 ns 4.5 4.5 7.5 8.0 11.0 11.5 4.5 4.5 12.0 12.5 3.5 4.0 13.0 15.5 tPLH tPHL Propagation delay An to Bn or Bn to An tPLH tPHL Propagation delay An to PARITY Waveform 1, 2 tPLH tPHL Propagation delay ODD/EVEN to PARITY, ERROR Waveform 1, 2 tPLH tPHL Propagation delay Bn to ERROR Waveform 1, 2 8.0 8.0 14.0 14.0 20.5 20.5 7.5 7.5 22.5 22.5 7.5 7.5 24.5 25.0 ns tPLH tPHL Propagation delay PARITY to ERROR Waveform 1, 2 8.0 8.0 11.5 12.0 15.5 15.5 7.5 8.0 16.5 17.0 6.5 6.5 18.5 20.0 ns tPZH tPZL Output enable time1 to high or low level Waveform 3, 4 3.0 4.0 5.5 7.0 8.0 9.5 3.0 4.0 9.0 11.0 2.0 4.0 9.0 13.0 ns ns tPHZ Output disable time 2.0 4.5 7.5 2.0 8.0 1.0 8.0 Waveform 3, 4 ns tPLZ from high or low level 2.0 4.0 6.0 2.0 6.5 1.0 7.5 Note to AC electrical characteristics 1. These delay times reflect the 3-state recovery time only and not the signal through the buffers or the parity check circuitry. To assure VALID information at the ERROR pin, time must be allowed for the signal to propagate through the drivers (B to A), through the parity check circuitry (same as A to PARITY), and to the ERROR output. VALID data at the ERROR pin > (B to A) + (A to PARITY). AC WAVEFORMS An, Bn, ODD/EVEN, PARITY OE VM VM VM tPHL PARITY, ERROR tPZH tPLH VM VM An, Bn, PARITY, ERROR VM tPHZ VM 0V SF00418 SF00419 Waveform 1. Propagation delay for inverting outputs An, Bn, ODD/EVEN, PARITY VM VM tPLH tPHL Waveform 3. 3-state output enable time to high level and output disable time from high level OE VM An, Bn, PARITY, ERROR VM tPZL VM VOH -0.3V tPLZ VM 3.5V An, Bn, PARITY, ERROR SF00420 VM VOL +0.3V Waveform 2. Propagation delay for non-Inverting outputs SF00421 Waveform 4. 3-state output enable time to low level and output disable time from low level Note to AC waveforms 1. For all waveforms, VM = 1.5V. 90 July 30 7 Philips Semiconductors Product specification Octal transceiver with 8-bit parity generator/checker 74F657 TEST CIRCUIT AND WAVEFORMS VCC 7.0V VIN RL VOUT PULSE GENERATOR tw 90% NEGATIVE PULSE VM CL AMP (V) VM 10% D.U.T. RT 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V RL AMP (V) 90% 90% Test Circuit for Open Collector Outputs POSITIVE PULSE VM VM 10% TEST tPLZ tPZL All other SWITCH closed closed open DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 10% tw SWITCH POSITION 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00128 90 July 30 8 Philips Semiconductors Product specification Octal transceiver with 8-bit parity generator/checker DIP24: plastic dual in-line package; 24 leads (300 mil) 1990 Jul 30 9 74F657 SOT222-1 Philips Semiconductors Product specification Octal transceiver with 8-bit parity generator/checker SO24: plastic small outline package; 24 leads; body width 7.5 mm 1990 Jul 30 10 74F657 SOT137-1 Philips Semiconductors Product specification Octal transceiver with 8-bit parity generator/checker SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm 1990 Jul 30 11 74F657 SOT340-1 Philips Semiconductors Product specification Octal transceiver with 8-bit parity generator/checker 74F657 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 12 Date of release: 10-98 9397-750-05171