ICST ICS843071I Femtoclocksâ ¢ crystal-to- lvpecl clock generator Datasheet

ICS843071I
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL
CLOCK GENERATOR
GENERAL DESCRIPTION
FEATURES
The ICS843071I is a Serial ATA (SATA)/Serial
Attached SCSI (SAS) Clock Generator and a
HiPerClockS™
member of the HiPerClocks TM family of high
performance devices from ICS. The ICS843071I
uses an 18pF parallel resonant crystal over
the range of 20.833MHz - 28.3MHz. For SATA/SAS
applications, a 25MHz crystal is used and either 75MHz or
150MHz may be selected with the FREQ_SEL pin. For 10Gb
Fibre Channel applications, a 26.5625MHz crystal is used
for 159.375MHz output. The ICS843071I has excellent
<1ps phase jitter performance, over the 12kHz - 20MHz
integration range. The ICS843071I is packaged in a small
8-pin TSSOP, making it ideal for use in systems with limited
board space.
• One Differential LVPECL output
ICS
• Crystal oscillator interface, 18pF parallel resonant crystal
(20.833MHz - 28.3MHz)
• Output frequency range: 62.5MHz - 170MHz
• VCO range: 500MHz - 680MHz
• RMS phase jitter @ 150MHz, using a 25MHz crystal
(12kHz - 20MHz): 0.64ps (typical) @ 3.3V output
• RMS phase jitter @ 159.375MHz, using a 26.5625MHz
crystal (1.875MHz - 20MHz): 0.40ps (typical) @ 3.3V
output
• 3.3V or 2.5V operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS compliant
packages
COMMON CONFIGURATION TABLE - SERIAL ATA/SERIAL ATTACHED SCSI
Inputs
Output Frequency
(MHz)
25
0
24
4
Multiplication
Value M/N
6
25
1
24
8
3
75
26.5625
0
24
4
6
159.375
Crystal Frequency (MHz)
FREQ_SEL
M
N
150
BLOCK DIAGRAM
PIN ASSIGNMENT
FREQ_SEL Pullup
XTAL_IN
OSC
XTAL_OUT
Phase
Detector
VCO
500MHz - 680MHz
FREQ_SEL N
0
÷4
1
÷8
1
2
3
4
8
7
6
5
VCC
Q
nQ
FREQ_SEL
ICS843071I
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm
package body
G Package
Top View
M = ÷24 (fixed)
843071AGI
Q
nQ
VCCA
XTAL_OUT
XTAL_IN
VEE
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REV. A JANUARY 11, 2006
ICS843071I
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL
CLOCK GENERATOR
TABLE 1. PIN DESCRIPTIONS
Number
Name
1
Power
4
VCCA
XTAL_OUT,
XTAL_IN
VEE
5
FREQ_SEL
Input
6, 7
nQ, Q
Output
Differential clock outputs. LVPECL interface levels.
8
VCC
Power
Core supply pin.
2, 3
Type
Description
Analog supply pin.
Crystal oscillator interface. XTAL_IN is the input,
XTAL_OUT is the output.
Negative supply pin.
Input
Power
Pullup
Frequency select pin. LVCMOS/LVTTL interface levels.
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
Parameter
CIN
Input Capacitance
4
pF
RPULLUP
Input Pullup Resistor
51
kΩ
843071AGI
Test Conditions
Minimum
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2
Typical
Maximum
Units
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ICS843071I
Integrated
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Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL
CLOCK GENERATOR
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD
4.6V
Inputs, VI
-0.5V to VCC + 0.5 V
Outputs, IO (LVDS)
Continuous Current
Surge Current
10mA
15mA
Package Thermal Impedance, θJA
101.7°C/W (0 mps)
Storage Temperature, TSTG
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VCC = VCCA = 3.3V±10%, TA = -40°C TO 85°C
Symbol
Parameter
Minimum
Typical
Maximum
Units
VCC
Positive Supply Voltage
Test Conditions
3.0
3.3
3.63
V
3.0
3.3
VCCA
Analog Supply Voltage
3.63
V
ICC
Power Supply Current
96
mA
ICCA
Analog Supply Current
12
mA
IEE
Power Supply Current
72
mA
TABLE 3B. POWER SUPPLY DC CHARACTERISTICS, VCC = VCCA = 2.5V±10%, TA = -40°C TO 85°C
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
VCC
Positive Supply Voltage
2.25
2.5
2.75
V
VCCA
Analog Supply Voltage
2.25
2.5
2.75
V
ICC
Power Supply Current
72
mA
ICCA
Analog Supply Current
12
mA
IEE
Power Supply Current
72
mA
Maximum
Units
TABLE 3C. LVCMOS/LVTTL DC CHARACTERISTICS, VCC = VCCA = 3.3V±10% OR 2.5V±10%, TA = -40°C TO 85°C
Symbol
Parameter
VIH
Input High Voltage
VIL
Input Low Voltage
IIH
Input High Current
VCC = VIN = 3.63V or 2.75V
IIL
Input Low Current
VCC = 3.63V or 2.75V, VIN = 0V
843071AGI
Test Conditions
Minimum
Typical
3.3V
2
VCC + 0.3
V
2.5V
1.7
VCC + 0.3
V
3.3V
-0.3
0.8
V
2.5V
-0.3
0.7
V
5
µA
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3
-150
µA
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Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL
CLOCK GENERATOR
TABLE 3D. LVPECL DC CHARACTERISTICS, VCC = VCCA = 3.3V±10% OR 2.5V±10%, TA = -40°C TO 85°C
Symbol
Parameter
Test Conditions
VOH
Output High Voltage; NOTE 1
VOL
Output Low Voltage; NOTE 1
VSWING
Peak-to-Peak Output Voltage Swing
Minimum
Typical
Maximum
Units
VCC - 1.4
VCC - 0.9
V
VCC - 2.0
VCC - 1.7
V
0.6
1.0
V
NOTE 1: Outputs terminated with 50Ω to VCC - 2V.
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter
Test Conditions
Minimum
Mode of Oscillation
Typical
Maximum
Units
Fundamental
28.3
MHz
Equivalent Series Resistance (ESR)
Frequency
20.833
50
Ω
Shunt Capacitance
7
pF
Drive Level
1
mW
Maximum
Units
170
MHz
TABLE 5A. AC CHARACTERISTICS, VCC = VCCA = 3.3V±10%, TA = -40°C TO 85°C
Symbol
Parameter
fOUT
Output Frequency
t jit(Ø)
tR / tF
RMS Phase Jitter ( Random);
NOTE 1
Output Rise/Fall Time
Test Conditions
Minimum
Typical
62.5
150MHz @ Integration Range:
12kHz - 20MHz
75MHz @ Integration Range:
12kHz - 20MHz
159.375MHz @ Integration Range:
1.875MHz - 20MHz
20% to 80%
odc
Output Duty Cycle
NOTE 1: Please refer to the Phase Noise Plots following this section.
0.64
ps
0.64
ps
0.40
ps
250
500
ps
48
52
%
Maximum
Units
170
MHz
TABLE 5B. AC CHARACTERISTICS, VCC = VCCA = 2.5V±10%, TA = -40°C TO 85°C
Symbol
Parameter
fOUT
Output Frequency
tjit(Ø)
RMS Phase Jitter ( Random)
tR / tF
Output Rise/Fall Time
odc
Output Duty Cycle
843071AGI
Test Conditions
Minimum
Typical
62.5
150MHz @ Integration Range:
12kHz - 20MHz
75MHz @ Integration Range:
12kHz - 20MHz
159.375MHz @ Integration Range:
1.875MHz - 20MHz
20% to 80%
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4
0.94
ps
0.80
ps
0.42
ps
250
500
ps
48
52
%
REV. A JANUARY 11, 2006
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FEMTOCLOCKS™ CRYSTAL-TO- LVPECL
CLOCK GENERATOR
TYPICAL PHASE NOISE
AT
75MHZ @ 3.3V
➤
0
-10
-20
Filter
-30
-40
75MHz
-50
RMS Phase Noise Jitter
12kHz to 20MHz = 0.64ps (typical)
-70
-80
-90
-100
Raw Phase Noise Data
-110
➤
NOISE POWER dBc
Hz
-60
-120
-130
➤
-140
-150
-160
Phase Noise Result by adding
a Filter to raw data
-170
-180
-190
-200
10
100
1k
10k
100k
1M
10M
100M
OFFSET FREQUENCY (HZ)
TYPICAL PHASE NOISE
-10
-20
150MHZ @ 3.3V
Filter
-30
-40
150MHz
-50
RMS Phase Noise Jitter
12kHz to 20MHz = 0.64ps (typical)
-60
-70
-80
-90
-100
Raw Phase Noise Data
-110
➤
NOISE POWER dBc
Hz
AT
➤
0
-120
-130
➤
-140
-150
Phase Noise Result by adding
a Filter to raw data
-160
-170
-180
-190
-200
10
100
1k
10k
100k
1M
10M
100M
OFFSET FREQUENCY (HZ)
843071AGI
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ICS843071I
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FEMTOCLOCKS™ CRYSTAL-TO- LVPECL
CLOCK GENERATOR
159.375MHZ @ 3.3V
➤
AT
10Gb Fibre Channel Filter
159.375MHz
RMS Phase Noise Jitter
1.875MHz to 20MHz = 0.40ps (typical)
Raw Phase Noise Data
➤
➤
NOISE POWER dBc
Hz
TYPICAL PHASE NOISE
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
-200
10
100
1k
10k
Phase Noise Result by adding
a 10Gb Fibre Channel Filter to
raw data
100k
1M
10M
100M
500M
OFFSET FREQUENCY (HZ)
843071AGI
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ICS843071I
Integrated
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FEMTOCLOCKS™ CRYSTAL-TO- LVPECL
CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
2V
2V
VCC,
VCCA
Qx
SCOPE
VCC,
VCCA
Qx
SCOPE
LVPECL
LVPECL
nQx
nQx
VEE
VEE
-0.5V ± 0.250V
-1.3V ± 0.330V
LVPECL 3.3V OUTPUT LOAD AC TEST CIRCUIT
LVPECL 2.5V OUTPUT LOAD AC TEST CIRCUIT
nQ
80%
80%
Q
VSW I N G
Clock
Outputs
t PW
20%
20%
t
PERIOD
tF
tR
odc =
t PW
x 100%
t PERIOD
OUTPUT RISE/FALL TIME
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
Noise Power
Phase Noise Plot
Phase Noise Mask
f1
Offset Frequency
f2
RMS Jitter = Area Under the Masked Phase Noise Plot
RMS PHASE JITTER
843071AGI
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ICS843071I
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FEMTOCLOCKS™ CRYSTAL-TO- LVPECL
CLOCK GENERATOR
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS843071I provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. VCC and VCCA should
be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10μF and a .01μF bypass
capacitor should be connected to each VCCA pin.
3.3V or 2.5V
VCC
.01μF
10Ω
V CCA
.01μF
10μF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS843071I has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2 below were determined using an 18pF parallel reso-
nant crystal and were chosen to minimize the ppm error. The
optimum C1 and C2 values can be slightly adjusted for different board layouts.
XTAL_IN
C1
22p
X1
18pF Parallel Cry stal
XTAL_OUT
C2
22p
ICS84332
ICS843071I
Figure 2. CRYSTAL INPUt INTERFACE
843071AGI
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FEMTOCLOCKS™ CRYSTAL-TO- LVPECL
CLOCK GENERATOR
TERMINATION FOR 3.3V LVPECL OUTPUT
The clock layout topology shown below is a typical termination for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
drive 50Ω transmission lines. Matched impedance techniques
should be used to maximize operating frequency and minimize
signal distortion. Figures 3A and 3B show two different layouts
which are recommended only as guidelines. Other suitable clock
layouts may exist and it would be recommended that the board
designers simulate to guarantee compatibility across all printed
circuit and clock component process variations.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminating resistors (DC current path to ground) or current sources
must be used for functionality. These outputs are designed to
3.3V
Zo = 50Ω
125Ω
FOUT
FIN
Zo = 50Ω
Zo = 50Ω
FOUT
50Ω
1
RTT =
Z
((VOH + VOL) / (VCC – 2)) – 2 o
FIN
50Ω
Zo = 50Ω
VCC - 2V
RTT
84Ω
FIGURE 3A. LVPECL OUTPUT TERMINATION
843071AGI
125Ω
84Ω
FIGURE 3B. LVPECL OUTPUT TERMINATION
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TERMINATION
FOR
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL
CLOCK GENERATOR
2.5V LVPECL OUTPUT
Figure 4A and Figure 4B show examples of termination for
2.5V LVPECL driver. These terminations are equivalent to terminating 50Ω to VCC - 2V. For VCC = 2.5V, the VCC - 2V is very
close to ground level. The R3 in Figure 4B can be eliminated
and the termination is shown in Figure 4C.
2.5V
VCC=2.5V
2.5V
2.5V
VCC=2.5V
R1
250
Zo = 50 Ohm
R3
250
+
Zo = 50 Ohm
+
Zo = 50 Ohm
-
Zo = 50 Ohm
2,5V LVPECL
Driv er
-
R1
50
2,5V LVPECL
Driv er
R2
62.5
R2
50
R4
62.5
R3
18
FIGURE 4A. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
FIGURE 4B. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
2.5V
VCC=2.5V
Zo = 50 Ohm
+
Zo = 50 Ohm
2,5V LVPECL
Driv er
R1
50
R2
50
FIGURE 4C. 2.5V LVPECL TERMINATION EXAMPLE
843071AGI
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ICS843071I
Integrated
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FEMTOCLOCKS™ CRYSTAL-TO- LVPECL
CLOCK GENERATOR
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS843071I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS843071I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V + 10% = 3.63V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
•
•
Power (core)MAX = VCC_MAX * IEE_TYP = 3.63V * 96mA = 348.5mW
Power (outputs)MAX = 30mW/Loaded Output pair
Total Power_MAX (3.63V, with all outputs switching) = 348.5mW + 30mW = 378.5mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.
The equation for Tj is as follows: Tj = θJA * Pd_total + TA
Tj = Junction Temperature
θJA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming a
moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 90.5°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.379W * 90.5°C/W = 119.3°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 6. THERMAL RESISTANCE θJA FOR 8-PIN TSSOP, FORCED CONVECTION
θJA by Velocity (Meters per Second)
Multi-Layer PCB, JEDEC Standard Test Boards
843071AGI
0
1
2.5
101.7°C/W
90.5°C/W
89.8°C/W
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ICS843071I
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FEMTOCLOCKS™ CRYSTAL-TO- LVPECL
CLOCK GENERATOR
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in Figure 5.
VCC
Q1
VOUT
RL
50
VCC - 2V
FIGURE 5. LVPECL DRIVER CIRCUIT AND TERMINATION
To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination
voltage of V - 2V.
CC
•
For logic high, VOUT = V
OH_MAX
(V
CCO_MAX
•
-V
OH_MAX
OL_MAX
CCO_MAX
-V
OL_MAX
CC_MAX
– 0.9V
) = 0.9V
For logic low, VOUT = V
(V
=V
=V
CC_MAX
– 1.7V
) = 1.7V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
OH_MAX
– (V
CC_MAX
- 2V))/R ] * (V
CC_MAX
L
-V
OH_MAX
) = [(2V - (V
CC_MAX
-V
OH_MAX
))/R ] * (V
CC_MAX
L
-V
OH_MAX
)=
[(2V - 0.9V)/50Ω] * 0.9V = 19.8mW
Pd_L = [(V
OL_MAX
– (V
CC_MAX
- 2V))/R ] * (V
L
CC_MAX
-V
OL_MAX
) = [(2V - (V
CC_MAX
-V
OL_MAX
))/R ] * (V
L
CC_MAX
-V
OL_MAX
)=
[(2V - 1.7V)/50Ω] * 1.7V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW
843071AGI
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FEMTOCLOCKS™ CRYSTAL-TO- LVPECL
CLOCK GENERATOR
RELIABILITY INFORMATION
TABLE 7. θJAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP
θJA by Velocity (Linear Feet per Minute)
Multi-Layer PCB, JEDEC Standard Test Boards
0
1
2.5
101.7°C/W
90.5°C/W
89.8°C/W
TRANSISTOR COUNT
The transistor count for ICS843071I is: 1732
843071AGI
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PACKAGE OUTLINE - G SUFFIX
FOR
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL
CLOCK GENERATOR
8 LEAD TSSOP
TABLE 8. PACKAGE DIMENSIONS
SYMBOL
Millimeters
Minimum
N
Maximum
8
A
--
1.20
A1
0.05
0.15
A2
0.80
1.05
b
0.19
0.30
c
0.09
0.20
D
2.90
E
E1
3.10
6.40 BASIC
4.30
e
4.50
0.65 BASIC
L
0.45
0.75
α
0°
8°
aaa
--
0.10
Reference Document: JEDEC Publication 95, MO-153
843071AGI
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FEMTOCLOCKS™ CRYSTAL-TO- LVPECL
CLOCK GENERATOR
TABLE 9. ORDERING INFORMATION
Part/Order Number
Marking
Package
Shipping Packaging
Temperature
ICS843071AGI
3071A
8 Lead TSSOP
tube
-40°C to 85°C
ICS843071AGIT
3071A
8 Lead TSSOP
2500 tape & reel
-40°C to 85°C
ICS843071AGILF
TBD
8 Lead "Lead-Free" TSSOP
tube
-40°C to 85°C
ICS843071AGILFT
TBD
8 Lead "Lead-Free" TSSOP
2500 tape & reel
-40°C to 85°C
NOTE: Par ts that are ordered with an "LF" suffix to the par t number are the Pb-Free configuration and are RoHS compliant.
The aforementioned trademarks, HiPerClockS and FemtoClocks are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product
for use in life support devices or critical medical instruments.
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