IDT IDT54FCT377CTE Fast cmos octal d flip-flop with clock enable Datasheet

IDT54/74FCT377T/AT/CT/DT
FAST CMOS
OCTAL D FLIP-FLOP
WITH CLOCK ENABLE
Integrated Device Technology, Inc.
FEATURES:
DESCRIPTION:
•
•
•
•
The IDT54/74FCT377T/AT/CT/DT are octal D flip-flops built
using an advanced dual metal CMOS technology. The IDT54/
74FCT377T/AT/CT/DT have eight edge-triggered, D-type flipflops with individual D inputs and O outputs. The common
buffered Clock (CP) input loads all flip-flops simultaneously
when the Clock Enable (CE) is LOW. The register is fully
edge-triggered. The state of each D input, one set-up time
before the LOW-to-HIGH clock transition, is transferred to the
corresponding flip-flop’s O output. The CE input must be
stable only one set-up time prior to the LOW-to-HIGH transition for predictable operation.
•
•
•
•
•
•
Std., A, C and D speed grades
Low input and output leakage ≤1µA (max.)
CMOS power levels
True TTL input and output compatibility
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
High drive outputs (-15mA IOH, 48mA IOL)
Power off disable outputs permit “live insertion”
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation
Enhanced versions
Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
Available in DIP, SOIC, QSOP, CERPACK and LCC
packages
FUNCTIONAL BLOCK DIAGRAM
D0
D1
D2
D3
D4
D5
D6
D7
CE
D Q
D Q
D Q
D Q
D Q
D Q
D Q
D Q
CP
CP
CP
CP
CP
CP
CP
CP
CP
O0
O1
O2
O3
O4
O5
O6
O7
2630 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1995 Integrated Device Technology, Inc.
6.14
APRIL 1995
DSC-4200/3
1
IDT54/74FCT377T/AT/CT/DT
FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
D0
O0
CE
Vcc
O7
PIN CONFIGURATIONS
INDEX
20
2
19
3
4
5
6
7
P20-1
D20-1
SO20-2
SO20-8
&
E20-1
Vcc
O7
D7
D6
O6
O5
D5
D4
O4
CP
18
17
16
15
14
8
13
9
12
10
11
3
D1
O1
O2
D2
D3
2
4
1
5
20 19
18
16
7
15
8
14
9 10 11 12 13
2630 drw 02
DIP/SOIC/QSOP/CERPACK
TOP VIEW
D7
D6
O6
O5
D5
17
L20-2
6
O3
GND
CP
O4
D4
CE
O0
D0
D1
O1
O2
D2
D3
O3
GND
1
2630 drw 03
LCC
TOP VIEW
FUNCTION TABLE(1)
PIN DESCRIPTION
Pin Names
Description
D 0 – D7
Data Inputs
CE
Clock Enable (Active LOW)
Inputs
Outputs
CP
CE
D
O
Load “1”
↑
l
h
H
Operating Mode
O0 – O7
Data Outputs
Load “0”
↑
l
l
L
CP
Clock Pulse Input
Hold
↑
H
h
H
X
X
No Change
No Change
2630 tbl 01
NOTE:
2630 tbl 02
1. H = HIGH Voltage Level
h = HIGH Voltage Level one setup time prior to the LOW-to-HIGH
Clock Transition
L = LOW Voltage Level
l = LOW Voltage Level one setup time prior to the LOW-to-HIGH Clock
Transition
X = Don't Care
↑ = LOW-to-HIGH Clock Transition
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Rating
Commercial
VTERM(2) Terminal Voltage
–0.5 to +7.0
with Respect to
GND
VTERM(3) Terminal Voltage
–0.5 to
with Respect to
VCC +0.5
GND
TA
Operating
0 to +70
Temperature
TBIAS
Temperature
–55 to +125
Under Bias
TSTG
Storage
–55 to +125
Temperature
PT
Power Dissipation
0.5
Military
–0.5 to +7.0
Unit
V
–0.5 to
VCC +0.5
V
–55 to +125
°C
–65 to +135
°C
–65 to +150
°C
0.5
W
I OUT
–60 to +120
mA
DC Output
Current
–60 to +120
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
CIN
Input
Capacitance
COUT
Output
Capacitance
Conditions
VIN = 0V
Typ.
6
VOUT = 0V
8
Max. Unit
10
pF
12
NOTE:
1. This parameter is measured at characterization but not tested.
pF
2630 lnk 04
2630 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
VCC by +0.5V unless otherwise noted.
2. Input and VCC terminals only.
3. Outputs and I/O terminals only.
6.14
2
IDT54/74FCT377T/AT/CT/DT
FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
Guaranteed Logic HIGH Level
2.0
—
—
V
Guaranteed Logic LOW Level
—
—
0.8
V
Parameter
VIH
Input HIGH Level
VIL
Input LOW Level
IIH
Input HIGH Current
(4)
VCC = Max.
VI = 2.7V
—
—
±1
µA
IIL
Input LOW Current(4)
VCC = Max.
VI = 0.5V
—
—
±1
µA
(4)
II
Input HIGH Current
VIK
Clamp Diode Voltage
VCC = Max., VI = VCC (Max.)
—
—
±1
µA
VCC = Min., IN = –18mA
—
–0.7
–1.2
V
–60
–120
–225
mA
2.4
3.3
—
V
2.0
3.0
—
V
—
0.3
0.5
V
—
—
±1
µA
—
200
—
mV
—
0.01
1
mA
(3)
IOS
Short Circuit Current
VCC = Max. , VO = GND
VOH
Output HIGH Voltage
VCC = Min.
IOH = –6mA MIL.
VIN = VIH or VIL
IOH = –8mA COM’L.
IOH = –12mA MIL.
IOH = –15mA COM’L.
VOL
IOFF
Output LOW Voltage
Input/Output Power Off
VCC = Min.
IOL = 32mA MIL.
VIN = VIH or VIL
IOL = 48mA COM’L.
VCC = 0V, VIN or VO ≤ 4.5V
Leakage(5)
VH
Input Hysteresis
ICC
Quiescent Power
VCC = Max.
—
Supply Current
VIN = GND or VCC
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = -55°C.
5. This parameter is guaranted but not tested.
6.14
2630 tbl 05
3
IDT54/74FCT377T/AT/CT/DT
FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
Test Conditions(1)
Parameter
Min.
Typ.(2)
Max.
Unit
—
0.5
2.0
mA
∆ICC
Quiescent Power Supply
Current TTL Inputs HIGH
VCC = Max.
VIN = 3.4V(3)
ICCD
Dynamic Power Supply
Current(4)
VCC = Max., Outputs Open
CE = GND
One Input Toggling
50% Duty Cycle
VIN = VCC
VIN = GND
—
0.15
0.25
mA/
MHz
IC
Total Power Supply
Current(6)
VCC = Max., Outputs Open
fCP = 10MHz
VIN = VCC
VIN = GND
—
1.5
3.5
mA
VIN = 3.4V
VIN = GND
—
2.0
5.5
VIN = VCC
VIN = GND
—
3.8
7.3(5)
VIN = 3.4V
VIN = GND
—
6.0
16.3(5)
CE = GND
One Bit Toggling
fi = 5MHz
50% Duty Cycle
VCC = Max., Outputs Open
fCP = 10MHz, 50% Duty Cycle
CE = GND
Eight Bits Toggling
fi = 2.5MHz
50% Duty Cycle
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
6.14
2639 tbl 05
4
IDT54/74FCT377T/AT/CT/DT
FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT54/74FCT377T
Com'l.
Symbol
tPLH
tPHL
tSU
tH
tSU
tH
tW
Parameter
Propagation Delay
CP to On
Set-Up Time HIGH or LOW
Dn to CP
Hold Time HIGH or LOW
Dn to CP
Set-Up Time HIGH or LOW
CE to CP
Hold Time HIGH or LOW
CE to CP
Clock Pulse Width,
HIGH or LOW
FCT54/74FCT377AT
Mil.
Com'l.
Mil.
Condition(1)
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Unit
CL = 50pF
RL = 500Ω
2.0
13.0
2.0
15.0
2.0
7.2
2.0
8.3
ns
2.5
—
3.0
—
2.0
—
2.0
—
ns
2.0
—
2.5
—
1.5
—
1.5
—
ns
4.0
—
4.0
—
3.5
—
3.5
—
ns
1.5
—
1.5
—
1.5
—
1.5
—
ns
7.0
—
7.0
—
6.0
—
7.0
—
ns
2630 tbl 06
IDT54/74FCT377CT
Com'l.
Symbol
tPLH
tPHL
tSU
tH
tSU
tH
tW
Parameter
Propagation Delay
CP to On
Set-Up Time HIGH or LOW
Dn to CP
Hold Time HIGH or LOW
Dn to CP
Set-Up Time HIGH or LOW
CE to CP
Hold Time HIGH or LOW
CE to CP
Clock Pulse Width,
HIGH or LOW
Condition(1)
Min.(2)
CL = 50pF
RL = 500Ω
2.0
FCT54/74FCT377DT
Mil.
Max.
Min.(2)
5.2
2.0
2.0
—
1.5
Com'l.
Max.
Min.(2)
5.5
2.0
2.0
—
—
1.5
3.5
—
1.5
6.0
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
Mil.
Max.
Min.(2)
Max.
Unit
4.4
—
—
ns
2.0
—
—
—
ns
—
1.0
—
—
—
ns
3.5
—
3.0
—
—
—
ns
—
1.5
—
0.0
—
—
—
ns
—
7.0
—
3.0
—
—
—
ns
2630 tbl 07
6.14
5
IDT54/74FCT377T/AT/CT/DT
FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
SWITCH POSITION
TEST CIRCUITS FOR ALL OUTPUTS
V CC
7.0V
500Ω
Pulse
Generator
Switch
Open Drain
Disable Low
Closed
Enable Low
V OUT
VIN
Test
Open
All Other Tests
D.U.T.
50pF
RT
2630 lnk 08
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
500Ω
CL
2630 drw 04
SET-UP, HOLD AND RELEASE TIMES
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
tH
tSU
tREM
tSU
PULSE WIDTH
3V
1.5V
0V
3V
1.5V
0V
LOW-HIGH-LOW
PULSE
1.5V
tW
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
3V
1.5V
0V
tH
2630 drw 06
2630 drw 05
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE
SAME PHASE
INPUT TRANSITION
tPLH
tPHL
OUTPUT
tPLH
OPPOSITE PHASE
INPUT TRANSITION
tPHL
3V
1.5V
0V
DISABLE
3V
1.5V
0V
CONTROL
INPUT
tPLZ
tPZL
VOH
1.5V
VOL
OUTPUT
NORMALLY
LOW
3V
1.5V
0V
SWITCH
CLOSED
3.5V
1.5V
tPZH
OUTPUT
NORMALLY
HIGH
2630 drw 07
SWITCH
OPEN
3.5V
0.3V
VOL
tPHZ
0.3V
1.5V
0V
VOH
0V
2630 drw 08
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
6.14
6
IDT54/74FCT377T/AT/CT/DT
FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XX
X
XXXX
X
X
Family
Device Type
Package
Process
FCT
Temperature
Range
Blank
B
Commercial
MIL-STD-883, Class B
P
D
SO
L
E
Q
Plastic DIP
CERDIP
Small Outline IC
Leadless Chip Carrier
CERPACK
Quarter-size Small Outline Package
377T
Octal D Flip-Flop w/Clock Enable
377AT
377CT
377DT
Blank
High Drive
54
74
–55°C to +125°C
0°C to +70°C
2630 drw 09
6.14
7
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