IDT IDT74FCT164245TPV Fast cmos 16-bit bidirectional 3.3v to 5v translator Datasheet

FAST CMOS 16-BIT
BIDIRECTIONAL
3.3V TO 5V TRANSLATOR
IDT54/74FCT164245T
Integrated Device Technology, Inc.
FEATURES:
DESCRIPTION:
• 0.5 MICRON CMOS Technology
• Bidirectional interface between 3.3V and 5V busses
• Control inputs can be driven from either 3.3V
or 5V circuits
• ESD >2000V per MIL-STD-883, Method 3015;
>200V using machine model (C = 200pF, R = 0)
• 25 MIL Center SSOP and Cerpack Packages
• Extended commercial range of -40°C to +85°C
• VCC1 = 5V ±10%, VCC2 = 2.7V to 3.6V
• High drive outputs (-32mA IOH, 64mA IOL) on 5V port
• Power-off disable on both ports permits "live insertion"
• Typical VOLP (Output Ground Bounce) < 0.9V at
VCC1 = 5V, VCC2 = 3.3V, TA = 25°C
The FCT164245T 16-bit 3.3V-to-5V translator is built
using advanced dual metal CMOS technology. This highspeed, low-power transceiver is designed to interface between a 3.3V bus and a 5V bus in a mixed 3.3V/5V supply
environment. This enables system designers to interface TTL
compatible 3.3V components with 5V components. The
direction and output enable controls operate these devices as
either two independent 8-bit transceivers or one 16-bit transceiver. The A port interfaces with the 3.3V bus; the B port
interfaces with the 5V bus. The direction control (xDIR) pin
controls the direction of data flow. The output enable (xOE)
overrides the direction control and disables both ports. These
control signals can be driven from either 3.3V or 5V devices.
The FCT164245T is ideally suited for driving high capacitance loads and low impedance backplanes. The output
buffers are designed with Power-Off Disable capability to
allow "hot insertion" of boards when used as backplane
drivers. They also allow interface between a mixed supply
system and external 5V peripherals.
FUNCTIONAL BLOCK DIAGRAM
2 DIR
1 DIR
2OE
1OE
2A1
1A1
1B1
2B1
1A2
2A2
1B2
2B2
1A3
2A3
1A5
1B5
1A6
2A4
5V PORT
1B4
3.3V PORT
1A4
2B3
5V PORT
3.3V PORT
1B3
2B4
2A5
2B5
2A6
1B6
2B6
1A7
2A7
1B7
2B7
1A8
2A8
1B8
2B8
2555 drw 01
2555 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1996 IIntegrated Device Technology, Inc.
8.16
FEBRUARY 1996
DSC-2555/4
1
IDT54/74FCT164245T
FAST CMOS 16-BIT BIDIRECTIONAL 3.3V-TO-5V TRANSLATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
1DIR
1
48
1OE
1A1
1B1
2
47
1A1
46
1A2
1B2
3
46
1A2
4
45
GND
GND
4
45
GND
1B3
5
44
1A3
1B3
5
44
1A3
1B4
6
43
1A4
1B4
6
43
1A4
VCC1
7
42
VCC2
VCC1
7
42
VCC2
1B5
8
41
1A5
1B5
8
41
1A5
1B6
9
40
1A6
1B6
9
40
1A6
GND
10
39
GND
GND
10
39
GND
1B7
11
38
1A7
1B7
11
38
1A7
1B8
12
1A8
1B8
12
37
1A8
2B1
13
SO48-1 37
SO48-2
36
2A1
2B1
13
36
2A1
2B2
14
35
2A2
2B2
14
35
2A2
GND
15
34
GND
GND
15
34
GND
2B3
16
33
2A3
2B3
16
33
2A3
2B4
17
32
2A4
2B4
17
32
2A4
VCC1
18
31
VCC2
VCC1
18
31
VCC2
2B5
19
30
2A5
2B5
19
30
2A5
2B6
20
29
2A6
2B6
20
29
2A6
GND
21
28
GND
GND
21
28
GND
2B7
22
27
2A7
2B7
22
27
2A7
2B8
23
26
2A8
2B8
23
26
2A8
2DIR
24
25
2OE
2DIR
24
25
2OE
1DIR
1
48
1OE
1B1
2
47
1B2
3
GND
E48-1
2555 drw 03
2555 drw 04
SSOP
TSSOP
TOP VIEW
CERPACK
TOP VIEW
POWER SUPPLY SEQUENCING
In the IDT54/74FCT164245T the condition of VCC1 ≥
(VCC2 –0.5V) must be maintained at all times. For the range
of VCC1 = (VCC2 –0.5V) to VCC1 = (VCC2 +0.9V), both the A
and B ports will remain in a high impedance state.
8.16
2
IDT54/74FCT164245T
FAST CMOS 16-BIT BIDIRECTIONAL 3.3V-TO-5V TRANSLATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FUNCTION TABLE(1)
PIN DESCRIPTION
Pin Names
xOE
Inputs
Description
Output Enable Input (Active LOW)
xOE
xDIR
Outputs
Direction Control Input
L
L
Bus B Data to Bus A
xAx
Side A Inputs or 3-State Outputs (3.3V Port)
L
H
Bus A Data to Bus B
xBx
Side B Inputs or 3-State Outputs (5V Port)
H
X
High Z State
xDIR
2555 tbl 01
ABSOLUTE MAXIMUM RATINGS(1)
2555 tbl 03
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol
Rating
(2)
VTERM
Terminal Voltage
with Respect to
GND
VTERM(3) Terminal Voltage
with Respect to
GND
TA
Operating
Temperature
TBIAS
Temperature
Under Bias
TSTG
Storage
Temperature
PT
Power Dissipation
Commercial
–0.5 to +7.0
Military
–0.5 to +7.0
Unit
V
–0.5 to VCC1
+0.5
–0.5 to VCC1
+0.5
V
–40 to +85
–55 to +125
°C
–55 to +125
–65 to +135
°C
–55 to +125
–65 to +150
°C
1.0
1.0
W
I OUT
–60 to +120
–60 to +120
mA
DC Output
Current
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High Impedance
Symbol
Parameter(1)
CIN
Input
Capacitance
CI/O
I/O
Capacitance
Conditions
VIN = 0V
Typ.
3.5
VOUT = 0V
3.5
Max. Unit
6.0
pF
8.0
pF
2555 lnk 04
NOTE:
1. This parameter is measured at characterization but not tested.
2555 lnk 02
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. All device terminals except VCC2.
3. Power supply terminals VCC2.
8.16
3
IDT54/74FCT164245T
FAST CMOS 16-BIT BIDIRECTIONAL 3.3V-TO-5V TRANSLATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE (A PORT - 3.3V)
Following Conditions Apply Unless Otherwise Specified:
VCC1 = 5V ± 10%, VCC2 = 2.7V to 3.6V; Commercial: TA = –40°C to +85°C, Military: TA = –55°C to +125°C,
Symbol
VIH
VIL
II H
II L
Test Conditions(1)
Guaranteed Logic HIGH Level
Min.
2.0
Typ.(2)
—
Max.
5.5
Unit
Guaranteed Logic LOW Level
–0.5
—
0.8
V
VI = 5.5V
—
—
±5
µA
VI = VCC2
—
—
±15
VI = GND
—
—
±5
Parameter
Input HIGH Level
(Input and I/O pins)
Input LOW Level
(Input and I/O pins)
Input HIGH Current (Input pins)
VCC1 = Max.
Input HIGH Current (I/O pins)
VCC2 = Max.
Input LOW Current (Input pins)
—
—
±15
—
–0.7
–1.2
V
VCC2–0.2
—
—
V
IOH = –3mA MIL.
2.4
3.0
—
IOH = –6mA MIL.
IOH = –8mA COM'L.
IOL = 0.1mA
2.4
3.0
—
—
—
0.2
VCC2 = Min.
IOL = 16mA
—
0.2
0.4
VIN = VIH or VIL
IOL = 24mA
—
0.3
0.55
—
0.3
0.50
Input LOW Current (I/O pins)
VI = GND
VIK
Clamp Diode Voltage
VCC2 = Min., IIN = –18mA
VOH
Output HIGH Voltage
VCC1 = VCC2 = Min.
IOH = –0.1mA
VIN = VIH or VIL
VCC2 = 3.0V
VIN = VIH or VIL
VCC1 = Min.
VOL
Output LOW Voltage
V
V
IOFF
Input/Output Power Off Leakage
VCC = 3.0V
IOL = 24mA
VIN = VIH or VIL
VCC1 = 0V, VCC2 = 0V, VIN or VO ≤ 4.5V
—
—
±100
µA
IOS
Short Circuit Current(4)
VCC1 = Max., VCC2 = Max., VO = GND (3)
–70
–105
–150
mA
IO
Output Drive Current
VCC1 = Max., VCC2 = Max., VO = 1.5V(3)
–40
–60
–90
mA
VH
Input Hysteresis
ICC2L
ICC2H
ICC2Z
Quiescent Power Supply Current
—
VCC1 = Max., VIN = GND or VCC2
VCC2 = Max.
—
150
—
mV
—
0.35
2.0
mA
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC1 = 5.0V, VCC2 = 3.3V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
8.16
2555 tbl 05
4
IDT54/74FCT164245T
FAST CMOS 16-BIT BIDIRECTIONAL 3.3V-TO-5V TRANSLATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE (B PORT - 5V)
Following Conditions Apply Unless Otherwise Specified:
VCC1 = 5V ± 10%, VCC2 = 2.7V to 3.6V; Commercial: TA = –40°C to +85°C, Military: TA = –55°C to +125°C,
Symbol
VIH
VIL
II H
II L
Test Conditions(1)
Guaranteed Logic HIGH Level
Min.
2.0
Typ.(2)
—
Max.
5.5
Unit
Guaranteed Logic LOW Level
–0.5
—
0.8
V
VI = VCC1
—
—
±5
µA
—
—
±15
VI = GND
—
—
±5
—
—
±15
Parameter
Input HIGH Level
(Input and I/O pins)
Input LOW Level
(Input and I/O pins)
Input HIGH Current (Input pins)
VCC1 = Max.
Input HIGH Current (I/O pins)
VCC2 = Max.
Input LOW Current (Input pins)
Input LOW Current (I/O pins)
VIK
VOH
VOL
IOFF
IOS
V
Clamp Diode Voltage
VCC1 = Min., IIN = –18mA
—
–0.7
–1.2
V
Output HIGH Voltage
VCC1 = Min.
IOH = –3mA
2.5
3.5
—
V
VCC2 = Min.
IOH = –12mA MIL.
2.4
3.5
—
VIN = VIH or VIL
IOH = –15mA COM'L.
2.0
3.0
—
—
0.2
0.55
V
Output LOW Voltage
Input/Output Power Off Leakage
Short Circuit
Current(4)
IO
Output Drive Current
VH
Input Hysteresis
ICC1L
ICC1H
ICC1Z
Quiescent Power Supply Current
IOH = –24mA MIL.
IOH = –32mA COM'L.(5)
IOL = 48mA MIL.
IOL = 64mA COM'L.
VCC1 = Min.,
VCC2 = Min.
VIN = VIH or VIL
VCC1 = 0V, VCC2 = 0V, VIN or VO ≤ 4.5V
—
—
±100
µA
VCC1 = Max., VCC2 = Max., VO =
GND(3)
–80
–140
–225
mA
VCC1 = Max., VCC2 = Max., VO =
2.5V (3)
–50
–75
–180
mA
—
150
—
mV
—
0.08
1.5
mA
—
VCC1 = Max., VIN = GND or VCC2
VCC2 = Max.
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC1 = 5.0V, VCC2 = 3.3V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5 Duration of the condition can not exceed one second.
8.16
2555 tbl 06
5
IDT54/74FCT164245T
FAST CMOS 16-BIT BIDIRECTIONAL 3.3V-TO-5V TRANSLATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Test Conditions(1)
VCC1 = Max., VCC2 = Max.,
VIN = VCC2 -0.6V(3)
ICCD
Dynamic Power Supply
Current(4)
IC
Total Power Supply Current (6)
Symbol
∆ICC
Min.
—
Typ.(2)
12
Max.
30
Unit
µA
VCC1 = Max., VCC2 = Max. VIN = VCC2
Outputs Open
VIN = GND
xOE = xDIR = GND
One Input Toggling
50% Duty Cycle
—
75
120
µA/
MHz
VCC1 = Max., VCC2 = Max. VIN = VCC2 - 0.6V
Outputs Open
VIN = GND
fi = 10MHz
50% Duty Cycle
xOE = xDIR = GND
One Bit Toggling
—
1.2
4.7
mA
VCC1 = Max., VCC2 = Max
Outputs Open
fi = 2.5MHz
50% Duty Cycle
xOE = xDIR = GND
Sixteen Bits Toggling
—
3.5
8.5 (5)
VIN = VCC2 - 0.6V
VIN = GND
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC1= 5.0V, VCC2= 3.3V, +25°C ambient.
3. Per TTL driven input; all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC1+ ICC2 + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC1= Quiescent Current (ICC1L, ICC1H and ICC1Z)
ICC2= Quiescent Current (ICC2L, ICC2H and ICC2Z)
∆ICC = Power Supply Current for a TTL High Input
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
8.16
2555 tbl 07
6
IDT54/74FCT164245T
FAST CMOS 16-BIT BIDIRECTIONAL 3.3V-TO-5V TRANSLATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Com'l.
Symbol
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
tPLZ
Parameter
Propagation Delay
A to B
Propagation Delay
B to A
Output Enable Time
xOE to B
Output Disable Time
xOE to B
Output Enable Time
xOE to A
Output Disable Time
xOE to A
Output Enable Time
xDIR to B (3)
Output Disable Time
xDIR to B (3)
Output Enable Time
xDIR to A (3)
Output Disable Time
xDIR to A (3)
Condition(1)
CL = 50pF
RL = 500Ω
Mil.
Min.(2)
1.5
Max.
5.0
Min.(2)
—
Max.
—
Unit
ns
1.5
5.0
—
—
ns
1.5
6.5
—
—
ns
1.5
6.0
—
—
ns
1.5
6.5
—
—
ns
1.5
6.0
—
—
ns
1.5
6.5
—
—
ns
1.5
6.0
—
—
ns
1.5
6.5
—
—
ns
1.5
6.0
—
—
ns
2555 tbl 08
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
8.16
7
IDT54/74FCT164245T
FAST CMOS 16-BIT BIDIRECTIONAL 3.3V-TO-5V TRANSLATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
Disable High
Enable High
All Other tests
6V
←
V
CC
500Ω
V
V
IN
Pulse
Generator
Open
GND
OUT
D.U.T.
Switch
6V
GND
Open
2555 lnk 09
50pF
R
T
C
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
500Ω
L
2555 drw 05
SET-UP, HOLD AND RELEASE TIMES
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
tH
tSU
tREM
tSU
PULSE WIDTH
3V
1.5V
0V
3V
1.5V
0V
LOW-HIGH-LOW
PULSE
1.5V
tW
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
3V
1.5V
0V
tH
2555 drw 08
2555 drw 06
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE
SAME PHASE
INPUT TRANSITION
tPLH
tPHL
OUTPUT
tPLH
OPPOSITE PHASE
INPUT TRANSITION
tPHL
3V
1.5V
0V
VOH
1.5V
VOL
DISABLE
3V
CONTROL
INPUT
tPZL
OUTPUT
NORMALLY SWITCH
6V
LOW
tPZH
3V
1.5V
0V
OUTPUT
NORMALLY
HIGH
2555 drw 07
SWITCH
GND
1.5V
0V
tPLZ
3V
1.5V
3V
0.3V
VOL
tPHZ
0.3V
1.5V
0V
VOH
0V
2555 drw 09
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
8.16
8
IDT54/74FCT164245T
FAST CMOS 16-BIT BIDIRECTIONAL 3.3V-TO-5V TRANSLATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
FCT
XX
XXXX
Device Type
Temp. Range
X
Package
X
Process
Blank
B
Commercial
MIL-STD-883, Class B
PV
PA
E
Shrink Small Outline Package (SO48-1)
Thin Shrink Small Outline Package(SO48-2)
Cerpack (E48-1)
164245T
Non-Inverting 16-Bit Bidirectional Translator
54
74
8.16
–55°C to +125°C
–40°C to +85°C
2555 drw 10
9
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