IDT IDT74FCT821ADSO High performance cmos bus interface register Datasheet

IDT54/74FCT821/A/B
HIGH PERFORMANCE CMOS BUS INTERFACE REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT54/74FCT821A/B
HIGH PERFORMANCE
CMOS BUS INTERFACE
REGISTER
FEATURES:
DESCRIPTION:
• Equivalent to AMD’s Am29821-25 bipolar registers in pinout/
function, speed and output drive over full temperature and
voltage supply extremes
• IDT54/74FCT821A equivalent to FAST™ speed
• IDT54/74FCT821B 25% faster than FAST
• IOL = 48mA (commercial) and 32mA (military)
• Clamp diodes on all inputs for ringing suppression
• CMOS power levels (1mW typ. static)
• TTL input and output compatibility
• CMOS output level compatible
• Substantially lower input current levels than AMD’s bipolar
Am29800 series (5µA max.)
• Military product compliant to MIL-STD-883, Class B
• Available in the following packages:
– Commercial: SOIC
– Military: CERDIP, LCC
The FCT821 series is built using an advanced dual metal CMOS
technology. The FCT821 series bus interface registers are designed to
eliminate the extra packages required to buffer existing registers and
provide extra data width for wider address/data paths or buses carrying
parity. The 74FCT821 is a buffered, 10-bit wide version of the popular
FCT374 function.
The FCT821 high-performance interface family is designed for highcapacitance load drive capability, while providing low-capacitance bus
loading at both inputs and outputs. All inputs have clamp diodes and all
outputs are designed for low-capacitance bus loading in high-impedance
state.
FUNCTIONAL BLOCK DIAGRAM
OE
CP
C1
D0
1D
Q
23
Y
TO NINE OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
JUNE 2002
1
© 2002 Integrated Device Technology, Inc.
DSC-5427/2
IDT54/74FCT821/A/B
HIGH PERFORMANCE CMOS BUS INTERFACE REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
23
Y0
D1
3
22
Y1
5
4
3
2
D3
5
20
Y3
D3
6
24
Y3
D4
19
Y4
D4
7
6
23
Y4
NC
8
22
NC
D5
9
21
Y5
D6
10
20
Y6
D7
11
12
1
9
Y7
D6
8
17
Y6
D7
9
16
Y7
10
15
Y8
D9
11
14
Y9
GND
12
13
CP
D8
D8
1
3
1
4
Rating
Terminal Voltage
Terminal Voltage
1
6
1
7
1
8
Y2
LCC
TOP VIEW
LOGIC SYMBOL
Commercial
Military
Unit
–0.5 to +7
–0.5 to +7
V
10
D
D
–0.5 to VCC
–0.5 to VCC
V
0 to +70
–55 to +125
°C
TA
Operating Temperature
TBIAS
Temperature Under Bias
–55 to +125
–65 to +135
°C
TSTG
Storage Temperature
–55 to +125
–65 to +150
°C
PT
Power Dissipation
0.5
0.5
W
IOUT
DC Output Current
120
120
mA
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
6
10
pF
COUT
Output Capacitance
VOUT = 0V
8
12
pF
Y
CP
CP
OE
PIN DESCRIPTION
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Conditions
10
Q
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Outputs and I/O terminals only.
Parameter(1)
1
5
CP
Y5
NC
18
GND
7
D9
D5
1
Y8
Y2
Y9
21
with Respect to GND
Symbol
2
6 25
4
with Respect to GND
VTERM(3)
2
7
D2
ABSOLUTE MAXIMUM RATINGS(1)
VTERM(2)
2
8
D2
CERDIP/ SOIC
TOP VIEW
Symbol
Y1
2
Y0
D0
INDEX
VCC
VCC
NC
24
OE
1
D0
OE
D1
PIN CONFIGURATION
NOTE:
1. This parameter is measured at characterization but not tested.
2
Pin Name
I/O
Description
Dx
I
D Flip-Flop Data Inputs
CP
I
Clock Pulse for the Register. Enters data into the
register on the LOW-to-HIGH transition
Yx
O
Register 3-State Outputs
OE
I
Output Control. When the OE input is HIGH, the Yx
outputs are in the high impedance state. When the
OE input is LOW, the TRUE register data is present
at the Yx outputs.
IDT54/74FCT821/A/B
HIGH PERFORMANCE CMOS BUS INTERFACE REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FUNCTION TABLE(1)
OE
H
H
H
L
H
L
H
H
L
L
Inputs
Dx
L
H
X
X
X
X
L
H
L
H
CP
↑
↑
X
X
X
X
↑
↑
↑
↑
Outputs
Yx
Z
Z
Z
L
Z
NC
Z
Z
L
H
Function
High Z
Clear
Hold
Load
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
NC = No Change
↑ = LOW-to-HIGH transition
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = 0°C to +70°C, VCC = 5.0V ±5%; Military: TA = –55°C to +125°C, VCC = 5.0V ±10%
Symbol
Test Conditions(1)
Parameter
Min.
Typ.(2)
Max.
Unit
VIH
Input HIGH Level
Guaranteed Logic HIGH Level
2
—
—
V
VIL
Input LOW Level
Guaranteed Logic LOW Level
—
—
0.8
V
IIH
Input HIGH Current
VCC = Max.
Input LOW Current
VCC = Max.
Off State (High Impedance)
Output Current
VCC = Max.
Clamp Diode Voltage
VCC = Min., IIN = –18mA
—
—
—
—
—
—
—
—
–0.7
5
5(4)
–5(4)
–5
10
10(4)
–10(4)
–10
–1.2
µA
IIL
—
—
—
—
—
—
—
—
—
–75
VHC
VHC
2.4
2.4
—
—
—
—
–120
VCC
VCC
4.3
4.3
GND
GND
0.3
0.3
—
—
—
—
—
VLC
VLC(4)
0.5
0.5
IOZH
VI = VCC
VI = 2.7V
VI = 0.5V
VI = GND
VO = VCC
VO = 2.7V
VO = 0.5V
VO = GND
IOZL
VIK
IOS
VOH
VOL
Short Circuit Current
Output HIGH Voltage
Output LOW Voltage
GND(3)
VCC = Max., VO =
VCC = 3V, VIN = VLC or VHC, IOH = –32µA
VCC = Min
IOH = –300µA
VIN = VIH or VIL
IOH = –15mA MIL
IOH = –24mA COM
VCC = 3V, VIN = VLC or VHC, IOL = 300µA
VCC = Min
IOL = 300µA
VIN = VIH or VIL
IOL = 32mA MIL
IOL = 48mA COM
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed, but not tested.
3
µA
µA
V
mA
V
V
IDT54/74FCT821/A/B
HIGH PERFORMANCE CMOS BUS INTERFACE REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
VLC = 0.2V, VHC = VCC - 0.2V
Min.
Typ.(2)
Max.
Unit
VCC = Max.
VIN ≥ VHC; VIN ≤ VLC
—
0.2
1.5
mA
Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max.
VIN = 3.4V(3)
—
0.5
2
mA
Dynamic Power Supply
Current(4)
VCC = Max.
Outputs Open
OE = GND
One Input Toggling
50% Duty Cycle
VIN ≥ VHC
VIN ≤ VLC
—
0.15
0.25
mA/
MHz
Total Power Supply Current(6)
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
OE = GND
One Bit Toggling
at fi = 5MHz
50% Duty Cycle
VIN ≥ VHC
VIN ≤ VLC
—
1.7
4
mA
VIN = 3.4V
VIN = GND
—
2.2
6
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
OE = GND
Eight Bits Toggling
at fi = 2.5MHz
50% Duty Cycle
VIN ≥ VHC
VIN ≤ VLC
—
4
7.8(5)
VIN = 3.4V
VIN = GND
—
6.2
16.8(5)
Symbol
Parameter
ICC
Quiescent Power Supply Current
∆ICC
ICCD
IC
Test Conditions(1)
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of ∆ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2+ fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Output Frequency
Ni = Number of Outputs at fi
All currents are in milliamps and all frequencies are in megahertz.
4
IDT54/74FCT821/A/B
HIGH PERFORMANCE CMOS BUS INTERFACE REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT54/74FCT821A
Com’l.
Parameter Description
Conditions(1)
Min.(2)
tPLH
Propagation Delay
CL = 50pF
tPHL
CP to Yx (OE = LOW)
RL = 500Ω
CL = 300pF(3)
IDT54/74FCT821B
Mil.
Max.
Min.(2)
—
10
—
Com’l.
Max.
Min.(2)
—
11.5
20
—
Mil.
Max.
Min.(2)
Max.
Unit
—
7.5
—
8.5
ns
20
—
15
—
16
RL = 500Ω
tSU
Set-up Time HIGH or LOW, Dx to CP
CL = 50pF
4
—
4
—
3
—
3
—
tH
Hold Time HIGH or LOW, Dx to CP
RL = 500Ω
2
—
2
—
1.5
—
1.5
—
ns
tW
CP Pulse Width, HIGH or LOW
Output Enable Time
OE to Yx
7
—
—
12
7
—
—
13
6
—
—
8
6
—
—
9
ns
—
23
—
25
—
15
—
16
CL = 5pF(3)
RL = 500Ω
—
7
—
8
—
6.5
—
7
CL = 50pF
RL = 500Ω
—
8
—
9
—
7.5
—
8
tPZH
tPZL
CL = 50pF
RL = 500Ω
CL = 300pF(3)
RL = 500Ω
tPHZ
tPLZ
Output Disable Time
OE to Yx
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. These parameters are guaranteed but not tested.
5
ns
IDT54/74FCT821/A/B
HIGH PERFORMANCE CMOS BUS INTERFACE REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
V CC
SWITCH POSITION
7.0V
Test
Switch
Open Drain
Disable Low
Enable Low
Closed
All Other Tests
Open
500Ω
V OUT
VIN
Pulse
Generator
D.U.T
.
50pF
RT
500Ω
CL
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Octal link
Test Circuits for All Outputs
DATA
INPUT
tH
tSU
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
3V
1.5V
0V
3V
1.5V
0V
tREM
tSU
LOW-HIGH-LOW
PULSE
1.5V
tW
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
3V
1.5V
0V
tH
Octal link
Pulse Width
Octal link
Set-Up, Hold, and Release Times
ENABLE
SAME PHASE
INPUT TRANSITION
tPLH
tPHL
OUTPUT
tPLH
OPPOSITE PHASE
INPUT TRANSITION
tPHL
3V
1.5V
0V
VOH
1.5V
VOL
DISABLE
3V
1.5V
0V
CONTROL
INPUT
tPLZ
tPZL
OUTPUT
NORMALLY
LOW
3V
1.5V
0V
OUTPUT
NORMALLY
HIGH
Octal link
SWITCH
CLOSED
tPZH
SWITCH
OPEN
3.5V
1.5V
3.5V
0.3V
VOL
tPHZ
0.3V
1.5V
0V
VOH
0V
Octal link
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; ZO ≤ 50Ω; tF ≤ 2.5ns; tR ≤ 2.5ns.
6
IDT54/74FCT821/A/B
HIGH PERFORMANCE CMOS BUS INTERFACE REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
XXXX
FCT
IDT
XX
Temp. Range
Device Type
XX
Package
X
Process
Blank
B
Commercial
MIL-STD-883, Class B
SO
Commercial Options
Small Outline IC
D
L
Military Options
CERDIP
Leadless Chip Carrier
821A
821B
High Performance CMOS Bus Interface Register, 10-Bit
54
74
– 55°C to +125°C
0°C to +70°C
DATA SHEET DOCUMENT HISTORY
6/25/2002 Updated as per PDNs Logic-00-07 and Logic-01-04
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7
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