IMP IMP706SCPA 3/3.3/4.0v î¼p supervisor circuit Datasheet

IMP706P/R/S/T/J, IMP708R/S/T/J
POWER MANAGEMENT
Key Features
3/3.3/4.0V µP Supervisor Circuits
–
–
–
Lo w suppl y cur r ent
Watc hdog timer
Br o wnout det ection
◆ Lower power, pin compatible replacements for
Maxim MAX706P/R/S/T, MAX708R/S/T
– 30% lower supply current:140µA vs. 200µA
◆ Precision power supply monitor
– 2.63V threshold (IMP706P/R, IMP708R)
– 2.93V threshold (IMP706S, IMP708S)
– 3.08V threshold (IMP706T, IMP708T)
– New 4.00V threshold (IMP706J, IMP708J)
◆ Debounced manual reset input
◆ Auxiliary voltage monitor comparator
– 1.25V threshold
– Battery monitor/auxiliary supply monitor
◆ Watchdog timer (IMP706P/R/S/T/J)
– Watchdog can be disabled by floating WDI
◆ 200ms reset time delay
◆ Three reset signal options
– Active HIGH: IMP706P
– Active LOW: IMP706R/S/T/J
– Active HIGH & LOW outputs: IMP708R/S/T/J
◆ DIP, SO and MicroSO packages
◆ Guaranteed RESET assertion to VCC = 1.1V
The IMP706P/R/S/T/J and IMP708R/S/T/J CMOS supervisor circuits
monitor power-supply and battery voltage level, and µP/µC operation.
A reset is generated when the supply drops below 2.63V (IMP706P/R,
IMP708R), 2.93V (IMP706S, IMP708S), 3.08V (IMP706T, IMP708T) or 4.00
(IMP706J, IMP708J).
The family offers several functional options. Each device generates a
reset signal during power-up, power-down and during brownout
conditions.
In addition, the IMP706P/R/S/T/J feature a 1.6 second watchdog timer.
The watchdog timer output will trigger a reset if connected to MR.
Unlike competitive devices, floating the WDI input pin disables the
watchdog timer.
The IMP708R/S/T/J have both active-HIGH and active-LOW reset outputs but no watchdog function. The IMP706P has the same pin-out and
functions as the IMP706R but has an active-HIGH reset output.
A versatile power-fail circuit, useful in checking battery levels and
non-5V supplies, has a 1.25V threshold. All devices have a manual
reset input.
Applications
All devices are available in 8-pin DIP, SO and the compact MicroSO
packages. The MicroSO package requires 50% less PC board area than
the conventional SO package.
◆
◆
◆
◆
◆
◆
◆
Block Diagrams
Transition
Detector
WDI
Watchdog
Timer
Computers and controllers
CTI applications
Embedded controllers
Battery operated systems
Intelligent instruments
Wireless communication systems
PDAs and handheld equipment
WDO
RESET
VCC
VCC
Timebase
20kΩ
20kΩ
RESET
Generator
MR
RESET
(RESET) IMP706P
+
VCC
+
RESET
Generator
+
1.25V
RESET
+
VCC
–
2.63V (IMP706P/R)
2.93V (IMP706S)
3.08V (IMP706T)
4.00V (IMP706J)
PFI
MR
–
2.63V (IMP708R)
2.93V (IMP708S)
3.08V (IMP708T)
4.00V (IMP708J)
+
PFO
–
+
PFI
PFO
1.25V
–
IMP708R/S/T/J
IMP706P/R/S/T/J
706P_02.eps
GND
© 1999 IMP, Inc.
GND
706P_01.eps
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1
IMP706P/R/S/T/J, IMP708R/S/T/J
Pin Configuration
MicroSO
DIP/SO
MR
1
VCC
2
GND
3
PFI
4
8
RESET
MR
1
7
RESET
VCC
2
6
NC
GND
3
5
PFO
PFI
4
IMP708R/S/T/J
(RESET) RESET
(IMP706P)
WDO
1
WDI
MR
3
PFO
VCC
4
8
WDO
7
RESET
3
6
4
5
8
WDO
MR
1
7
RESET
VCC
2
6
WDI
GND
5
PFO
PFI
IMP706P
IMP706R/S/T/J
2
IMP706P
IMP706R/S/T/J
8
WDI
RESET
1
7
PFO
RESET
2
6
PFI
MR
5
GND
VCC
8
NC
7
PFO
3
6
PFI
4
5
GND
IMP708R/S/T/J
706P_03.eps
Ordering Information
Part Number
IMP706PCPA
IMP706PCSA
IMP706PCUA
IMP706PEPA
IMP706PESA
IMP706RCPA
IMP706RCSA
IMP706RCUA
IMP706REPA
IMP706RESA
IMP706SCPA
IMP706SCSA
IMP706SCUA
IMP706SEPA
IMP706SESA
IMP706TCPA
IMP706TCSA
IMP706TCUA
IMP706TEPA
IMP706TESA
IMP706JCPA
IMP706JCSA
IMP706JCUA
IMP706JEPA
IMP706JESA
IMP708RCPA
IMP708RCSA
IMP708RCUA
IMP708REPA
IMP708RESA
IMP708SCPA
IMP708SCSA
IMP708SCUA
IMP708SEPA
IMP708SESA
IMP708TCPA
IMP708TCSA
IMP708TCUA
IMP708TEPA
IMP708TESA
IMP708JCPA
IMP708JCSA
IMP708JCUA
IMP708JEPA
IMP708JESA
2
Package
Operating
Temperature Range
Reset Threshold
Reset Polarity
Watchdog Timer
8-Plastic DIP
8-SO
8-MicroSO
8-Plastic DIP
8-SO
8-Plastic DIP
8-SO
8-MicroSO
8-Plastic DIP
8-SO
8-Plastic DIP
8-SO
8-MicroSO
8-Plastic DIP
8-SO
8-Plastic DIP
8-SO
8-MicroSO
8-Plastic DIP
8-SO
8-Plastic DIP
8-SO
8-MicroSO
8-Plastic DIP
8-SO
8-Plastic DIP
8-SO
8-MicroSO
8-Plastic DIP
8-SO
8-Plastic DIP
8-SO
8-MicroSO
8-Plastic DIP
8-SO
8-Plastic DIP
8-SO
8-MicroSO
8-Plastic DIP
8-SO
8-Plastic DIP
8-SO
8-MicroSO
8-Plastic DIP
8-SO
0°C to +70°C
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
2.63
2.63
2.63
2.63
2.63
2.63
2.63
2.63
2.63
2.63
2.93
2.93
2.93
2.93
2.93
3.08
3.08
3.08
3.08
3.08
4.00
4.00
4.00
4.00
4.00
2.63
2.63
2.63
2.63
2.63
2.93
2.93
2.93
2.93
2.93
3.08
3.08
3.08
3.08
3.08
4.00
4.00
4.00
4.00
4.00
HIGH
HIGH
HIGH
HIGH
HIGH
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
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© 1999 IMP, Inc.
IMP706P/R/S/T/J, IMP708R/S/T/J
Absolute Maximum Ratings
Pin Terminal Voltage with Respect to Ground
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 6.0V
All other inputs . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to (VCC + 0.3V)
Input Current at VCC and GND . . . . . . . . . . 20mA
Output Current: All outputs . . . . . . . . . . . . . 20mA
Rate of Rise at VCC . . . . . . . . . . . . . . . . . . . . . 100V/µs
Plastic DIP Power Dissipation . . . . . . . . . . . 700mW
(Derate 9mW/°C above 70°C)
SO Power Dissipation . . . . . . . . . . . . . . . . . . 470mW
(Derate 5.9mW/°C above 70°C)
MicroSO Power Dissipation . . . . . . . . . . . . . 330mW
(Derate 4.1mW/°C above 70°C)
Operating Temperature Range
IMP706xE, IMP708xE . . . . . . . . . . . . . . . . . . –40°C to +85°C
IMP706xC, IMP708xC . . . . . . . . . . . . . . . . . . 0°C to +70°C
Storage Temperature Range . . . . . . . . . . . . . . –65°C to +160°C
Lead Temperature Soldering (10 sec) . . . . . . 300°C
These are stress ratings only and functional operation is not implied.
Exposure to absolute maximum ratings for prolonged time periods may
affect device reliability.
Electrical Characteristics
Unless otherwise noted, specifications are over the operating temperature range and VCC supply voltages are 2.7V to 5.5V (IMP706P,
IMP708R), 3.0V to 5.5V (IMP706/8S), 3.15V to 5.5V (IMP706/8T) and 4.1V to 5.5V (IMP706/8J).
Parameter
Symbol
Conditions
Min
1.1
1.2
Typ
Max
Units
5.5
5.5
V
µA
Operating Voltage
Range
VCC
IMP706xC, IMP708xC
IMP706xE, IMP708xE
Supply Current
VCC < 3.6V
ICC
IMP706xC, IMP706xE, MR = VCC, WDI Floating
75
140
IMP708xC, IMP708xE, MR = VCC, WDI Floating
50
140
Supply Current
VCC < 5.5V
ICC
IMP706xC, IMP706xE, MR = VCC, WDI Floating
75
140
RESET Threshold
VRT
P and R devices
S devices
T devices
J devices
IMP708xC, IMP708xE, MR = VCC, WDI Floating
2.55
2.85
3.00
3.89
RESET Threshold
Hysteresis
RESET Pulse Width
MR to RESET Out Delay
MR Input Threshold
MR Pull-up Resistor
RESET Output Voltage
(All R/S/T/J devices)
© 1999 IMP, Inc.
140
2.70
3.00
3.15
4.10
40
tRS
VCC = 3V (IMP706/8, P/R devices),
VCC = 3.3V (IMP706/8, S/T devices)
VCC = 4.4V (IMP706/8, J devices)
140
VCC = 5V
MR Pulse Width
50
2.63
2.93
3.08
4.00
tMR
tMD
VIH
200
µA
V
mV
280
ms
200
4.5V < VCC < 5.5V
150
3.6V < VCC < 4.5V (IMP706/8J devices)
VRST (MAX) < VCC < 3.6V (IMP706/8P/R/S/T devices)
500
ns
3.6V < VCC < 4.5V (IMP706/8J devices)
VRST(MAX) < VCC < 3.6V (IMP706/8P/R/S/T devices)
750
4.5V < VCC < 5.5V
250
VIL
VRST (MAX) < VCC < 4.5V
VRST (MAX) < VCC < 4.5V
VIH
4.5V < VCC < 5.5V
VIL
4.5V < VCC < 5.5V
RP
0.7VCC
V
0.6
2.0
0.8
10
20
40
VOH
ISOURCE = 800µA, 4.5V < VCC < 5.5V
VOL
ISINK = 3.2mA, 4.5V < VCC < 5.5V
VOH
ISOURCE = 500µA, VRST (MAX) < VCC < 4.5V
VOL
ISINK = 1.2mA, VRST (MAX) < VCC < 4.5V
0.3
VOL
ISINK = 50µA, VCC = 1.1V (IMP706xC, IMP708xC devices)
0.3
ISINK = 100µA, VCC = 1.2V (IMP706xE, IMP708xE devices)
0.3
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ns
VCC–1.5V
kΩ
V
0.4
0.8 VCC
3
IMP706P/R/S/T/J, IMP708R/S/T/J
Electrical Characteristics (cont.)
Unless otherwise noted, specifications are over the operating temperature range and VCC supply voltages are 2.7V to 5.5V (IMP706P,
IMP708R), 3.0V to 5.5V (IMP706/8S), 3.15V to 5.5V (IMP706/8T) and 4.1V to 5.5V (IMP706/8J).
Parameter
RESET Output Voltage
IMP706P
RESET Output Voltage,
IMP708R/S/T/J
Symbol
Conditions
VOH
ISOURCE = 800µA, 4.5V < VCC < 5.5V
VOL
ISINK = 3.2mA, 4.5V < VCC < 5.5V
VOH
VOL
ISOURCE = 500µA, VRST (MAX) < VCC < 3.6V
ISINK = 1.2mA, VRST (MAX) < VCC < 3.6V
VOH
ISOURCE = 800µA, 4.5V < VCC < 5.5V
VOL
ISINK = 3.2mA, 4.5V < VCC < 5.5V
VOH
ISOURCE = 500µA, VRST (MAX) < VCC < 4.5V
ISINK = 1.2mA, VRST (MAX) < VCC < 4.5V
VOL
Min
Typ
Max
VCC–1.5V
Units
V
0.4
0.8VCC
0.3
VCC–1.5V
V
0.4
0.8VCC
0.3
Watchdog Timeout Period
tWD
VCC = 3V (IMP706, P/R devices)
VCC = 3.3V (IMP706, S/T devices)
VCC = 4.4V (IMP706, J devices)
1.0
WDI Pulse Width
tWP
VIL = 0.4V, VIH = 0.8VCC, VRST (MAX) < VCC < 4.5V
100
ns
WDI Pulse Width
tWP
VIL = 0.4V, VIH = 0.8VCC, 4.5V < VCC < 5.5V
50
ns
WDI Input Threshold
VIH
VCC = 5V
3.5
V
1.6
VIL
VIH
VRST (MAX) < VCC < 4.5V
0.7VCC
VIL
0.6
WDI = VCC, IMP706 Only
WDI Input Current
WDI = 0V, IMP706 Only
VOH
ISOURCE = 800µA, 4.5V < VCC < 5.5V
VOL
ISINK = 1.2mA, 4.5V < VCC < 5.5V
VOH
ISOURCE = 500µA, VRST (MAX) < VCC < 4.5V
VOL
ISINK = 500µA, VRST (MAX) < VCC < 4.5V
PFI Input Threshold
PFI falling. For P/R devices VCC = 3V. For S/T
devices VCC = 3.3V. For J devices VCC = 4.4V.
PFI Input Current
PFO Output Voltage
VOH
ISOURCE = 800µA, 4.5V < VCC < 5.5V
VOL
ISINK = 3.2mA, 4.5V < VCC < 5.5V
VOH
ISOURCE = 500µA, VRS (MAX) < VCC < 4.5V
ISINK = 1.2mA, VRS (MAX) < VCC < 4.5V
VOL
4
s
0.8
WDI Input Current
WDO Output Voltage
2.25
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50
–150
150
µA
µA
–50
VCC–1.5V
V
0.4
0.8VCC
0.3
1.2
1.25
1.3
V
–25
0.01
25
nA
VCC–1.5V
V
0.4
0.8VCC
0.3
© 1999 IMP, Inc.
IMP706P/R/S/T/J, IMP708R/S/T/J
Pin Descriptions
Pin Number
IMP706P
IMP706R/S/T/J IMP708R/S/T/J
DIP/SO MicroSO DIP/SO MicroSO DIP/SO MicroSO Name
1
3
1
3
1
3
MR
2
3
4
5
2
3
4
5
2
3
4
5
VCC
GND
4
6
4
6
4
6
PFI
5
7
5
7
5
7
PFO
6
8
6
8
—
—
WDI
—
—
—
—
6
8
NC
—
—
7
1
7
1
RESET
8
2
8
2
—
—
WDO
7
1
—
—
8
2
RESET
Function
Manual reset input. The active LOW input triggers
a reset pulse. It is pulled HIGH by a 20kΩ pull-up
resistor. It is compatible with TTL/CMOS signals
when VCC = 5V. It can be shorted to ground
through a mechanical switch. Leave floating or
connect to VCC if the function is not used.
Monitored power supply input.
Ground
Power-fail input voltage monitor. With PFI less than
1.25V, PFO goes LOW. Connect PFI to ground
when not used.
Power-fail output. The output is active LOW and
sinks current when PFI is less than 1.25V. If not
used, leave the pin unconnected.
Watchdog input. WDI controls the internal watchdog
timer. A HIGH or LOW signal for 1.6 sec at WDI
allows the internal timer to run-out, setting WDO low.
A rising or falling edge must occur at WDI within
1.6 seconds or WDO goes LOW. The watchdog
function is disabled by floating WDI. The internal
watchdog timer clears when: RESET is asserted;
WDI is three-stated; or WDI sees a rising or falling edge.
Not connected.
Active-LOW reset output. Pulses LOW for 200ms
when triggered, and stays LOW whenever VCC is
below the reset threshold. RESET remains LOW for
200ms after VCC rises above the RESET threshold
or MR goes from HIGH to LOW. A watchdog timeout
will not trigger RESET unless WDO is connected to MR.
Watchdog output. WDO goes LOW when the 1.6
second internal watchdog timer times-out and does
not go HIGH until a transition occurs at WDI. In
addition, when VCC falls below the reset threshold,
WDO goes LOW. Unlike RESET, WDO does not have
a minimum pulse width and as soon as VCC exceeds
the reset threshold, WDO becomes HIGH with no delay.
Active-HIGH reset output. RESET is the inverse of
RESET.
Feature Summary
IMP706P IMP706R IMP706S IMP706T IMP706J IMP708R IMP708S IMP708T IMP708J
Power-fail detector
■
■
■
■
■
■
■
■
■
Brownout detection
■
■
■
■
■
■
■
■
■
Debounced manual RESET input
■
■
■
■
■
■
■
■
■
Power-up/down RESET
■
■
■
■
■
■
■
■
■
Watchdog timer
■
■
■
■
■
Active-HIGH RESET
■
Active-LOW RESET
■
■
■
■
Active-LOW and HIGH RESETs
■
■
■
■
RESET threshold
2.63V
2.63V
2.93V
3.08V
4.00V
2.63V
2.93V
3.08V
4.00V
© 1999 IMP, Inc.
408-432-9100/www.impweb.com
5
IMP706P/R/S/T/J, IMP708R/S/T/J
Detail Descriptions
RESET/RESET Operation
The RESET/RESET signals are designed to start or return a
µP/µC to a known state.
With VCC above 1.2V, RESET and RESET are guaranteed to be
asserted. During a power-up sequence, the reset outputs remain
asserted until the supply rises above the threshold level. The
resets are deasserted approximately 200ms after crossing the
threshold.
In a brownout situation where VCC falls below the threshold level,
the reset outputs are asserted. If a brownout occurs during an
already initiated reset period, the reset period will extend for an
additional reset period of 200ms.
The IMP708 devices have dual reset outputs, one active LOW and
one active HIGH. The IMP706P has a single active HIGH reset and
the IMP706/R/S/T/J devices have an active LOW reset output.
IMP Part
RESET Polarity Threshold Watchdog Timer
IMP706P
HIGH
2.63V
Yes
IMP706R
LOW
2.63V
Yes
IMP706S
LOW
2.93V
Yes
IMP706T
LOW
3.08V
Yes
IMP706J
LOW
4.00V
Yes
IMP708R
Both: HIGH & LOW
2.63V
No
IMP708S
Both: HIGH & LOW
2.93V
No
IMP708T
Both: HIGH & LOW
3.08V
No
IMP708J
Both: HIGH & LOW
4.00V
No
width is 0.5µs with a 3V VCC input and 0.15µs with a 5V VCC
input. If not used, tie MR to VCC or leave floating.
By connecting the watchdog output (WDO) and MR, a watchdog
timeout forces a RESET to be generated.
Watchdog Timer
A watchdog timer available on the IMP706P/R/S/T/J monitors
µP/µC activity. If activity is not detected within 1.6 seconds on the
Watchdog Input (WDI), the internal timer puts the Watchdog
Output (WDO) into a LOW state. WDO will remain LOW until
activity is detected at WDI.
The watchdog function is disabled, meaning it is cleared and not
counting, if WDI is floated or connected to a three-stated circuit.
The watchdog timer is also disabled if RESET is asserted. When
RESET becomes inactive and the WDI input sees a high or low
transition as short as 100ns (VCC = 2.7V)/50ns (VCC = 4.5V), the
watchdog timer will begin a 1.6 second countdown. Additional
transitions at WDI will reset the watchdog timer and initiate a
new countdown sequence.
WDO will also become LOW and remain so, whenever the supply
voltage, VCC, falls below the device threshold level. WDO goes HIGH
as soon as VCC transitions above the threshold. There is no minimum
pulse width for WDO as there is for the RESET outputs. If WDI is floated, WDO essentially acts as a low supply voltage output indicator.
Power-failure detection with auxiliary comparator
Manual Reset (MR)
The active-LOW manual reset input is pulled high by an internal
20kΩ pull-up resistor and can be driven low by CMOS/TTL logic
or a mechanical switch to ground. An external debounce circuit is
unnecessary since the 140ms minimum reset time will debounce
mechanical pushbutton switches. The minimum MR input pulse
All devices have an auxiliary comparator with 1.25V trip point.
The output, PFO, is active LOW and the noninverting input is PFI.
This comparator can be used as a supply voltage monitor with an
external resistor voltage divider. As the monitored voltage level
falls, PFI is reduced causing the PFO output to go LOW.
Normally PFO interrupts the processor so the system can be shut
down in a controlled manner.
5V
VCC
0V
vRT
tRS
tRS
5V
5V
RESET
WDI
0V
0V
tWD
tWD
tWP
5V
5V
MR
WDO
0V
0V
0V
tMD
tWD
tMR
5V
5V
RESET
MR externally
set low
WDO
0V
RESET triggered by MR
706P_04.eps
Watchdog Timing
6
706P_05.eps
WDI Three-state operation
408-432-9100/www.impweb.com
© 1999 IMP, Inc.
IMP706P/R/S/T/J, IMP708R/S/T/J
Application Information
Bi-directional Reset Pin Interfacing
Ensuring That RESET is Valid Down to VCC = 0V
The IMP706/8 can interface with µP/µC bi-directional reset pins
by connecting a 4.7kΩ resistor in series with the RESET output
and the µP/µC bi-directional reset pin.
When VCC falls below 1.2V, the IMP706R/S/T/J and
IMP708R/S/T/J RESET reset outputs no longer pull down; it
becomes indeterminate. To avoid the possibility that stray charges
could build up and force RESET to the wrong state, a pull-down
resistor should be connected to the RESET pin, thus draining such
charges to ground. The resistor value is not critical. A 100kΩ resistor will pull RESET to ground without loading it.
BUF
Buffered
RESET
Monitoring Voltages Other Than VCC
The IMP706/708 can monitor voltages other than VCC using the
Power Fail circuitry. If a resistive divider is connected from the
voltage to be monitored to the PFI input, the PFO (output) will go
LOW if the divider voltage goes below its 1.25V reference. Should
hysteresis be desired, connect a resistor (equal to approximately
10 times the sum of the two resistors in the divider) between the
PFI and PFO pins. A capacitor between PFI and GND will reduce
circuit sensitivity to input high frequency noise. If it is desired to
assert a reset in addition to the PFO flag, this may be achieved by
connecting the PFO output to MR.
VCC
IMP70x
Supply
Voltage
mC or mP
4.7kW
RESET
Input
RESET
GND
GND
Bi-directional I/O Pin
(Example: 68HC11)
706P_06.eps
Package Dimensions
MicroSO (8-Pin)
Inches
Min
a
Millimeters
Max
Min
Max
MicroSO (8-Pin)*
* JEDEC Drawing MO-187AA
© 1999 IMP, Inc.
––––
1.10
0.050
0.15
0.75
0.95
0.25
0.40
0.13
0.23
2.90
3.10
0.65 BSC
4.90 BSC
2.90
3.10
0.40
0.70
0°
6°
706P_t02a.at3
E1 E
+
–––––
0.0433
0.0020
0.0059
0.0295
0.0374
0.0098
0.0157
0.0051
0.0091
0.1142
0.1220
0.0256 BSC
0.193 BSC
0.1142
0.1220
0.0157
0.0276
0°
6°
L
D
A
e
b
408-432-9100/www.impweb.com
C
A2
D
A
A1
A2
b
C
D
e
E
E1
L
a
0.10mm
0.004in
MicroSO (8-Pin).eps
A1
7
IMP706P/R/S/T/J, IMP708R/S/T/J
Package Dimensions
SO (8-Pin)
0°– 8°
Inches
Millimeters
Min
Max
Min
Max
0.069
0.010
0.020
0.010
1.35
0.10
0.33
0.19
1.75
0.25
0.51
0.25
0.157
0.244
0.050
0.197
3.80
5.80
0.40
4.80
L
SO (8-Pin)**
A
A1
B
C
e
E
H
L
D
0.053
0.004
0.013
0.007
0.050
0.150
0.228
0.016
0.189
H
E
1.27
4.00
6.20
1.27
2.00
C
D
A
Plastic DIP (8-Pin)***
A
A1
A2
b
b2
b3
D
D1
E
E1
e
eA
eB
eC
L
–––––
0.015
0.115
0.014
0.045
0.030
0.355
0.005
0.300
0.240
0.100
0.300
–––––
–––––
0.115
0.210
–––––
0.195
0.022
0.070
0.045
0.400
–––––
0.325
0.280
–––––
–––––
0.430
0.060
0.150
––––
0.38
2.92
0.36
1.14
0.80
9.02
0.13
7.62
6.10
5.33
–––––
4.95
0.56
1.78
1.14
10.16
–––––
8.26
7.11
e
B
A1
Plastic DIP (8-Pin)
D1
E
D
2.54
7.62
–––––
10.92
2.92
3.81
SO (8-Pin).eps
E1
A A2
L A1
0°–15°
706P_t02b.at3
** JEDEC Drawing MS-112AA
*** JEDEC Drawing MS-001BA
e
C
b2
b
eA
eB
Plastic DIP (8-Pin)a.eps
IMP, Inc.
Corporate Headquarters
2830 N. First Street
San Jose, CA 95134-2071
Tel: 408-432-9100
Tel: 800-438-3722
Fax: 408-434-0335
e-mail: [email protected]
http://www.impweb.com
The IMP logo is a registered trademark of IMP, Inc.
All other company and product names are trademarks of their respective owners.
© 1999 IMP, Inc.
Printed in USA
Publication #: 1020
Revision:
B
Issue Date:
12/15/99
Type:
Preliminary
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