TI INA149AID High common-mode voltage difference amplifier Datasheet

INA149
SBOS579A – SEPTEMBER 2011 – REVISED NOVEMBER 2011
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High Common-Mode Voltage Difference Amplifier
FEATURES
DESCRIPTION
•
•
•
The INA149 is a precision unity-gain difference
amplifier with a very high input common-mode
voltage range. It is a single, monolithic device that
consists of a precision op amp and an integrated
thin-film resistor network. The INA149 can accurately
measure small differential voltages in the presence of
common-mode signals up to ±275 V. The INA149
inputs are protected from momentary common-mode
or differential overloads of up to 500 V.
1
2
•
•
•
Common-Mode Voltage Range: ±275 V
Minimum CMRR: 90 dB from –40°C to +125°C
DC Specifications:
– Maximum Offset Voltage: 1100 μV
– Maximum Offset Voltage Drift: 15 μV/°C
– Maximum Gain Error: 0.02%
– Maximum Gain Error Drift: 10 ppm/°C
– Maximum Gain Nonlinearity: 0.001% FSR
AC Performance:
– Bandwidth: 500 kHz
– Typical Slew Rate: 5 V/μs
Wide Supply Range: ±2.0 V to ±18 V
– Maximum Quiescent Current: 900 μA
– Output Swing on ±15-V Supplies: ±13.5 V
Input Protection:
– Common-Mode: ±500 V
– Differential: ±500 V
In many applications, where galvanic isolation in not
required, the INA149 can replace isolation amplifiers.
This ability can eliminate costly isolated input side
power supplies and the associated ripple, noise, and
quiescent current. The excellent 0.0005% nonlinearity
and 500-kHz bandwidth of the INA149 are superior to
those of conventional isolation amplifiers.
The INA149 is pin-compatible with the INA117 and
INA148 type high common-mode voltage amplifiers
and offers improved performance over both devices.
The INA149 is available in the SOIC-8 package with
operation specified over the extended industrial
temperature range of –40°C to +125°C.
APPLICATIONS
High-Voltage Current Sensing
Battery Cell Voltage Monitoring
Power-Supply Current Monitoring
Motor Controls
Replacement for Isolation Circuits
Common−Mode Rejection Ratio (dB)
•
•
•
•
•
120
INA149
Competitor A
110
100
90
80
70
60
50
40
10
100
1k
Frequency (Hz)
10k
100k
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
INA149
SBOS579A – SEPTEMBER 2011 – REVISED NOVEMBER 2011
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION (1)
(1)
PRODUCT
PACKAGE-LEAD
PACKAGE DESIGNATOR
PACKAGE MARKING
INA149
SOIC-8
D
INA149AID
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range, unless otherwise noted.
INA149
UNIT
Supply voltage
(V+) – (V–)
40
V
Input voltage range
Continuous
300
V
500
V
(V–) – 0.3 to (V+) + 0.3
V
10
mA
Common-mode and differential, 10 s
Maximum Voltage on REFA and REFB
Input current on any input pin
(2)
Output short-circuit current duration
Indefinite
Operating temperature range
–55 to +150
°C
Storage temperature range
–65 to +150
°C
+150
°C
Human body model (HBM)
1500
V
Charged device model (CDM)
1000
V
Machine model (MM)
100
V
Junction temperature
ESD rating
(1)
(2)
2
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
REFA and REFB are diode clamped to the power-supply rails. Signals applied to these pins that can swing more than 0.3 V beyond the
supply rails should be limited to 10 mA or less.
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ELECTRICAL CHARACTERISTICS: V+ = +15 V and V– = –15 V
At TA = +25°C, RL = 2 kΩ connected to ground, and VCM = REFA = REFB = GND, unless otherwise noted.
INA149
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
±0.02
%FSR
GAIN
Initial
VOUT = ±10.0 V
1
Gain error
VOUT = ±10.0 V
±0.005
Gain
vs temperature, TA = –40°C to +125°C
Nonlinearity
V/V
±1.5
±10
ppm/°C
±0.0005
±0.001
%FSR
350
1100
3
15
OFFSET VOLTAGE
Initial offset
vs temperature, TA = –40°C to +125°C
vs supply (PSRR), VS = ±2 V to ±18 V
90
µV
µV/°C
120
dB
Differential
800
kΩ
Common-mode
200
INPUT
Impedance
Voltage range
Common-mode rejection
(CMRR)
Differential
–13.5
Common-mode
–275
At dc, VCM = ±275 V
90
vs temperature, TA = –40°C to +125°C, at dc
90
At ac, 500 Hz, VCM = 500 VPP
90
At ac, 1 kHz, VCM = 500 VPP
kΩ
13.5
V
275
V
100
dB
dB
dB
90
dB
OUTPUT
–13.5
Voltage range
Short-circuit current
Capacitive load drive
No sustained oscillations
13.5
V
±25
mA
10
nF
OUTPUT NOISE VOLTAGE
0.01 Hz to 10 Hz
10 kHz
20
µVPP
550
nV/√Hz
DYNAMIC RESPONSE
Small-signal bandwidth
Slew rate
VOUT = ±10-V step
Full-power bandwidth
VOUT = 20 VPP
Settling time
0.01%, VOUT = 10-V step
1.7
500
kHz
5
V/µs
32
kHz
7
µs
POWER SUPPLY
±2
Voltage range
Quiescent current
VS = ±18 V, VOUT = 0 V
810
vs temperature, TA = –40°C to +125°C
±18
V
900
µA
1.1
mA
TEMPERATURE RANGE
Specified
–40
+125
°C
Operating
–55
+150
°C
Storage
–65
+150
°C
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ELECTRICAL CHARACTERISTICS: V+ = 5 V and V– = 0 V
At TA = +25°C, RL = 2 kΩ connected to 2.5 V, and VCM= REFA = REFB = 2.5 V, unless otherwise noted.
INA149
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
GAIN
Initial
VOUT = 1.5 V to 3.5 V
1
Gain error
VOUT = 1.5 V to 3.5 V
±0.005
%FSR
Gain
vs temperature, TA = –40°C to +125°C
±1.5
ppm/°C
±0.0005
%FSR
Nonlinearity
V/V
OFFSET VOLTAGE
µV
350
Initial offset
vs temperature, TA = –40°C to +125°C
µV/°C
3
vs supply (PSRR), VS = 4 V to 5 V
120
dB
Differential
800
kΩ
Common-mode
200
INPUT
Impedance
Voltage range
Common-mode rejection
Differential
1.5
Common-mode
–20
kΩ
3.5
25
V
V
At dc, VCM = –20 V to 25 V
100
dB
vs temperature, TA = –40°C to +125°C, at dc
100
dB
At ac, 500 Hz, VCM = 49 VPP
100
dB
90
dB
At ac, 1 kHz, VCM = 49 VPP
OUTPUT
Voltage range
1.5
Short-circuit current
Capacitive load drive
No sustained oscillations
3.5
V
±15
mA
10
nF
OUTPUT NOISE VOLTAGE
0.01 Hz to 10 Hz
10 kHz
20
µVPP
550
nV/√Hz
DYNAMIC RESPONSE
Small-signal bandwidth
Slew rate
VOUT = 2 VPP step
Full-power bandwidth
VOUT = 2 VPP
Settling time
0.01%, VOUT = 2 VPP step
500
kHz
5
V/µs
32
kHz
7
µs
POWER SUPPLY
Voltage range
Quiescent current
4
VS = 5 V
vs temperature, TA = –40°C to +125°C
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5
V
810
µA
1
mA
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SBOS579A – SEPTEMBER 2011 – REVISED NOVEMBER 2011
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THERMAL INFORMATION
INA149
THERMAL METRIC (1)
D (SOIC)
UNITS
8 PINS
θJA
Junction-to-ambient thermal resistance
110
θJCtop
Junction-to-case (top) thermal resistance
57
θJB
Junction-to-board thermal resistance
54
ψJT
Junction-to-top characterization parameter
11
ψJB
Junction-to-board characterization parameter
53
θJCbot
Junction-to-case (bottom) thermal resistance
N/A
(1)
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
PIN CONFIGURATION
D PACKAGE
SOIC-8
(TOP VIEW)
20 kΩ
380 kΩ
REFB 1
8
NC
7
V+
6
VOUT
5
REFA
380 kΩ
−IN 2
380 kΩ
+
+IN 3
19 kΩ
V− 4
PIN DESCRIPTIONS
(1)
NAME
NO.
–IN
2
Inverting input
DESCRIPTION
+IN
3
Noninverting input
NC
8
No internal connection
REFA
5
Reference input
REFB
1
Reference input
V–
4
Negative power supply
V+
7
Positive power supply (1)
VOUT
6
Output
In this document, (V+) – (V–) is referred to as VS.
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TYPICAL CHARACTERISTICS
At TA = +25°C, RL = 2 kΩ connected to ground, and VS = ±15 V, unless otherwise noted.
CMRR vs FREQUENCY
COMMON-MODE REJECTION
−40°C
+25°C
+125°C
80
60
40
20
2
0
−2
−4
10
100
1k
10k
100k
Frequency (Hz)
1M
10M
−6
−400
G001
−300
−200 −100
0
100
200
Common−Mode Input Voltage (V)
300
400
G066
Figure 1.
Figure 2.
COMMON-MODE OPERATING RANGE
vs POWER-SUPPLY VOLTAGE
TYPICAL GAIN ERROR FOR RL = 10 kΩ
(Curves Offset for Clarity)
400
VS = ±18 V
VS = ±15 V
350
300
250
200
150
100
VS = ±12 V
VS = ±10 V
50
0
0
2
4
6
8
10
12
14
Power−Supply Voltage (±V)
16
18
−20 −16 −12
20
−8
G002
−4
0
4
8
Output Voltage (V)
12
Figure 4.
TYPICAL GAIN ERROR FOR RL = 2 kΩ
(Curves Offset for Clarity)
TYPICAL GAIN ERROR FOR RL = 1 kΩ
(Curves Offset for Clarity)
20
VS = ±12 V
VS = ±10 V
Output Error (2 mV/div)
VS = ±18 V
VS = ±15 V
Output Error (2 mV/div)
VS = ±12 V
VS = ±10 V
16
G003
Figure 3.
VS = ±18 V
VS = ±15 V
−20 −16 −12
−8
−4
0
4
8
Output Voltage (V)
12
16
20
−20 −16 −12
G004
Figure 5.
6
VS = ±18 V
VS = ±15 V
VS = ±10 V
VS = ±5 V
4
Output Voltage (mV)
100
0
Common−Mode Operating Range (±V)
6
Output Error (2 mV/div)
Common−Mode Rejection Ratio (dB)
120
−8
−4
0
4
8
Output Voltage (V)
12
16
20
G005
Figure 6.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, RL = 2 kΩ connected to ground, and VS = ±15 V, unless otherwise noted.
TYPICAL GAIN ERROR FOR LOW SUPPLY VOLTAGES
(Curves Offset for Clarity)
GAIN NONLINEARITY
10
VS = ±5 V
VS = ±5 V
VS = ±5 V
VS = ±2.5 V
6
RL = 10 kΩ
Output Error (2 mV/div)
VS = ±15 V
RL = 10 kΩ
8
Error (ppm)
4
RL = 2 kΩ
RL = 1 kΩ
2
0
−2
−4
−6
−8
RL = 1 kΩ
−5
−4
−3
−2
−1
0
1
2
Output Voltage (V)
3
4
−10
−12 −10 −8
5
−6
−4 −2 0
2
4
Output Voltage (V)
G006
Figure 7.
GAIN NONLINEARITY
VS = ±15 V
RL = 2 kΩ
G014
8
6
6
4
4
Error (ppm)
Error (ppm)
12
GAIN NONLINEARITY
2
0
−2
2
0
−2
−4
−4
−6
−6
−8
−8
−6
−4 −2 0
2
4
Output Voltage (V)
6
8
10
VS = ±15 V
RL = 1 kΩ
−10
−12 −10 −8
12
−6
−4 −2 0
2
4
Output Voltage (V)
G015
Figure 9.
6
8
10
12
G016
Figure 10.
GAIN NONLINEARITY
OUTPUT VOLTAGE vs LOAD CURRENT
20
10
VS = ±12 V
RL = 10 kΩ
8
−45°C
+25°C
+85°C
+130°C
15
Output Voltage (V)
6
4
Error (ppm)
10
10
8
2
0
−2
−4
−6
10
5
0
−5
−10
−15
−8
−10
−12 −10 −8
8
Figure 8.
10
−10
−12 −10 −8
6
−6
−4 −2 0
2
4
Output Voltage (V)
6
8
10
12
−20
0
G062
Figure 11.
5
10
15
20
25
Output Current (mA)
30
35
G017
Figure 12.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, RL = 2 kΩ connected to ground, and VS = ±15 V, unless otherwise noted.
GAIN vs FREQUENCY
NOISE SPECTRAL DENSITY vs FREQUENCY
1000
Noise Spectral Density (nV/ Hz)
20
Gain (dB)
0
−20
−40
25 °C
−40 °C
125 °C
−60
−80
100
1k
10k
100k
Frequency (Hz)
1M
900
800
700
600
500
400
10M
1
10
100
1k
Frequency (Hz)
G010
Figure 13.
Noise (10 µV/div)
Power−Supply Rejection Ratio (dB)
POSITIVE PSRR vs FREQUENCY
20
10
0
Time (10 s/div)
−40°C
+25°C
+125°C
10
1k
Frequency (Hz)
10k
100k
G009
Figure 16.
NEGATIVE PSRR vs FREQUENCY
MAXIMUM POWER DISSIPATION vs TEMPERATURE
2
−40°C
+25°C
+125°C
10
100
1k
Frequency (Hz)
10k
Maximum Power Dissipation (W)
Power−Supply Rejection Ratio (dB)
100
Figure 15.
100k
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
−60 −40 −20
G064
Figure 17.
8
G008
120
110
100
90
80
70
60
50
40
30
G070
120
110
100
90
80
70
60
50
40
30
20
10
0
100k
Figure 14.
0.01 Hz TO 10 Hz NOISE
−50
−50
10k
0
20 40 60 80 100 120 140 160
Ambient Temperature (°C)
G013
Figure 18.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, RL = 2 kΩ connected to ground, and VS = ±15 V, unless otherwise noted.
LARGE-SIGNAL STEP RESPONSE
SMALL-SIGNAL STEP RESPONSE
CL = 1000 pF
RL = 2 kΩ
Output Voltage (5 V/div)
Output Voltage (25 mV/div)
CL = 1000 pF
RL = 2 kΩ
Time (4 µs/div)
Time (4 µs/div)
G011
G012
Figure 19.
Figure 20.
−60
−80
−100
0 nF
1 nF
3 nF
5 nF
10 nF
1.2
4
Error Voltage
Output Voltage 2
1
0
0.8
−2
0.6
−4
0.4
−6
0.2
−8
0
−10
−0.2
0
20
40
60
80
Time (µs)
100
−12
Time (5 us/div)
120
G018
G065
Figure 21.
Figure 22.
CMRR HISTOGRAM
20
0
10
18
−0.2
8
−0.4
6
−0.6
4
−0.8
2
−1
0
Error Voltage
−2
Output Voltage
−4
16
14
12
10
8
6
4
2
0
Time (5 us/div)
G063
−30
−27
−24
−21
−18
−15
−12
−9
−6
−3
0
3
6
9
12
15
18
21
24
27
30
−1.4
Percent of Population (~5 kU)
12
Output Voltage (V)
Error Voltage (mV)
SETTLING TIME
0.2
−1.2
Output Voltage (V)
SETTLING TIME
1.4
Error Voltage (mV)
Voltage (mV)
SMALL-SIGNAL RESPONSE vs CAPACITIVE LOAD
140
120
100
80
60
40
20
0
−20
−40
CMRR (µV/V)
Figure 23.
G019
Figure 24.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, RL = 2 kΩ connected to ground, and VS = ±15 V, unless otherwise noted.
OFFSET VOLTAGE HISTOGRAM
DIFFERENTIAL GAIN ERROR HISTOGRAM
12
20
Percent of Population (~5 kU)
Percent of Population (~5 kU)
18
10
8
6
4
2
16
14
12
10
8
6
4
2
0
Offset Voltage (µV)
−20
−18
−16
−14
−12
−10
−8
−6
−4
−2
0
2
4
6
8
10
12
14
16
18
20
−1000
−900
−800
−700
−600
−500
−400
−300
−200
−100
0
100
200
300
400
500
600
700
800
900
1000
0
Differential Gain Error (m%)
G022
Figure 25.
GAIN NONLINEARITY HISTOGRAM
35
35
30
30
Percent of Population (~5 kU)
Percent of Population (~5 kU)
PSRR HISTOGRAM
25
20
15
10
5
25
20
15
10
5
0.10
0.11
0.12
0.13
0.14
0.15
0.16
0.17
0.18
0.19
0.20
0.21
0.22
0.23
0.24
0.25
0.26
0.27
0.28
0.29
0.30
0
−1.50
−1.35
−1.20
−1.05
−0.90
−0.75
−0.60
−0.45
−0.30
−0.15
0.00
0.15
0.30
0.45
0.60
0.75
0.90
1.05
1.20
1.35
1.50
0
PSRR (µV/V)
Nonlinearity Error (m%)
G025
Figure 27.
50
1600
40
1200
30
800
20
CMRR (µV/V)
Offset Voltage (µV)
CMRR vs TEMPERATURE
2000
400
0
−400
10
0
−10
−800
−20
−1200
−30
−1600
−40
−2000
−75 −50 −25
0
G026
Figure 28.
OFFSET VOLTAGE vs TEMPERATURE
25
50
75 100 125 150 175
Temperature (°C)
G027
−50
−75 −50 −25
Figure 29.
10
G024
Figure 26.
0
25
50
75 100 125 150 175
Temperature (°C)
G028
Figure 30.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, RL = 2 kΩ connected to ground, and VS = ±15 V, unless otherwise noted.
GAIN ERROR vs TEMPERATURE
50
1.6
40
1.2
30
0.8
20
Gain Error (m%)
PSRR (µV/V)
PSRR vs TEMPERATURE
2
0.4
0
−0.4
−0.8
10
0
−10
−20
−1.2
−30
−1.6
−40
−2
−75 −50 −25
0
−50
−75 −50 −25
25
50
75 100 125 150 175
Temperature (°C)
G029
0
Figure 31.
25
50
75 100 125 150 175
Temperature (°C)
G030
Figure 32.
GAIN NONLINEARITY vs TEMPERATURE
SLEW RATE vs TEMPERATURE
5
8
4
7
2
Slew Rate (V/µs)
Linearity Error (m%)
3
1
0
−1
−2
−3
6
5
4
3
−4
−5
−75 −50 −25
0
2
−75
25
50
75 100 125 150 175
Temperature (°C)
G031
−25
25
75
Temperature (°C)
Figure 33.
175
G071
Figure 34.
SLEW RATE vs POWER-SUPPLY VOLTAGE
QUIESCENT CURRENT vs TEMPERAUTRE
5
1200
4
1000
Current (µA)
Slew Rate (V/µs)
125
3
2
800
600
1
Negative Slew Rate
Positive Slew Rate
0
0
5
10
15
20
25
Supply Voltage (V)
30
35
40
400
−75 −50 −25
G038
Figure 35.
0
25
50
75 100 125 150 175
Temperature (°C)
G043
Figure 36.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, RL = 2 kΩ connected to ground, and VS = ±15 V, unless otherwise noted.
FREQUENCY RESPONSE vs CAPACITIVE LOAD
QUIESCENT CURRENT vs SUPPLY VOLTAGE
1200
10
0
1000
Quiescent Current (µA)
VOUT / VIN (dB)
−10
−20
−30
−40
−50
0 nF
1 nF
3 nF
5 nF
10 nF
−60
−70
−80
−90
100
800
600
400
−45°C
+25°C
+85°C
+130°C
200
1k
10k
100k
Frequency (Hz)
1M
0
10M
0
G044
Figure 37.
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
6
8
10
12
14
Supply Voltage (±V)
16
18
20
G056
OVERLOAD RECOVERY
16
Input
Output
25
12
20
Voltage (V)
Maximum Output Voltage (±V)
4
Figure 38.
30
15
8
4
10
0
5
0
1k
10k
100k
Frequency (Hz)
−4
1M
Time (1 µs/div)
G057
Figure 39.
G058
Figure 40.
OVERLOAD RECOVERY
QUIESCENT CURRENT HISTOGRAM
4
50
Input
Output
Percent of Population (~5 kU)
45
0
Voltage (V)
2
−4
−8
−12
40
35
30
25
20
15
10
5
−16
G067
0.70
0.71
0.72
0.73
0.74
0.75
0.76
0.77
0.78
0.79
0.80
0.81
0.82
0.83
0.84
0.85
0.86
0.87
0.88
0.89
0.90
0
Time (1 µs/div)
Quiescent Current (mA)
Figure 41.
12
G059
Figure 42.
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APPLICATION INFORMATION
BASIC INFORMATION
Figure 43 shows the basic connections required for dual-supply operation. Applications with noisy or
high-impedance power-supply lines may require decoupling capacitors placed close to the device pins. The
output voltage is equal to the differential input voltage between pins 2 and 3. The common-mode input voltage is
rejected. Figure 44 shows the basic connections required for single-supply operation.
−15 V
100 nF
1 F
15 V
4
1
−IN
2
+IN
3
20 kΩ
30 V
1 F
7
100 nF
4
380 kΩ
1
+
19 kΩ
6
VOUT = (+IN) − (−IN)
−IN
2
+IN
3
5
GND
380 kΩ
380 kΩ
100 nF
380 kΩ
GND
380 kΩ
380 kΩ
20 kΩ
1 F
7
+
19 kΩ
6
5
VOUT = (+IN) – (–IN) + VREF
VREF
Figure 43. Basic Power and Signal Connections for Figure 44. Basic Power and Signal Connections for
Dual-Supply Operation
Single-Supply Operation
TRANSFER FUNCTION
Most applications use the INA149 as a simple unity-gain difference amplifier. The transfer function is given in
Equation 1:
VOUT = (+IN) – (–IN)
(1)
Some applications, however, apply voltages to the reference terminals (REFA and REFB). The complete transfer
function is given in Equation 2:
VOUT = (+IN) – (–IN) + 20 × REFA – 19 × REFB
(2)
COMMON-MODE RANGE
The high common-mode range of the INA149 is achieved by dividing down the input signal with a high precision
resistor divider. This resistor divider brings both the positive input and the negative input within the input range of
the internal operational amplifier. This input range depends on the supply voltage of the INA149.
Both Figure 2 and Figure 3 can be used to determine the maximum common-mode range for a specific supply
voltage. The maximum common-mode range can also be calculated by ensuring that both the positive and the
negative input of the internal amplifier are within 1.5 V of the supply voltage.
In case the voltage at the inputs of the internal amplifier exceeds the supply voltage, the internal ESD diodes
start conducting current. This current must be limited to 10 mA to make sure not to exceed the absolute
maximum ratings for the device.
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COMMON-MODE REJECTION
Common-mode rejection (CMR) of the INA149 depends on the input resistor network, which is laser-trimmed for
accurate ratio matching. To maintain high CMR, it is important to have low source impedance driving the two
inputs. A 75-Ω resistance in series with pins 2 or 3 decreases the common-mode rejection ratio (CMRR) from
100 dB (typical) to 74 dB.
Resistance in series with the reference pins also degrades CMR. A 4-Ω resistance in series with pins 1 or 5
decreases CMRR from 100 dB to 74 dB.
Most applications do not require trimming. Figure 45 shows an optional circuit that may be used for trimming
offset voltage and common-mode rejection.
−15 V
15 V
4
15 V
1
100 µA
½ REF200
100 Ω
+
−IN
2
+IN
3
20 kΩ
7
380 kΩ
380 kΩ
380 kΩ
+
19 kΩ
(1)
6
VOUT = (+IN) − (−IN)
5
10 kΩ
100 Ω
100 µA
½ REF200
−15 V
(1) The OPA171 (a 36-V, low-power, RRO, general-purpose operational amplifier) can be used for this application.
Figure 45. Offset Voltage Trim Circuit
14
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MEASURING CURRENT
The INA149 can be used to measure a current by sensing the voltage drop across a series resistor, RS.
Figure 46 shows the INA149 used to measure the supply currents of a device under test.
The sense resistor imbalances the input resistor matching of the INA149, thus degrading its CMR. Also, the input
impedance of the INA149 loads RS, causing gain error in the voltage-to-current conversion. Both of these errors
can be easily corrected.
The CMR error can be corrected with the addition of a compensation resistor (RC), equal to the value of RS, as
shown in Figure 46. If RS is less than 5 Ω, degradation in the CMR is negligible and RC can be omitted. If RS is
larger than approximately 1 kΩ, trimming RC may be required to achive greater than 90-dB CMR. This error is
caused by the INA149 input impedance mismatch.
V−
V+
(+275 V max)
+VS
4
1
2
20 kΩ
380 kΩ
RS
3
RC
7
380 kΩ
380 kΩ
+
6
(1)
19 kΩ
IDUT+
V−
Device
Under
Test
1
5
V+
4
20 kΩ
VO = RS × IDUT+
7
380 kΩ
IDUT−
2
380 kΩ
RS
3
RC
380 kΩ
+
6
(1)
19 kΩ
VO = RS × IDUT−
5
−VS
(−275 V max)
Figure 46. Measuring Supply Currents of a Device Under Test
If RS is more than approximately 50 Ω, the gain error is greater than the 0.02% specification of the INA149. This
gain error can be corrected by slightly increasing the value of RS. The corrected value (RS') can be calculated by
RS' = RS × 380 kΩ/(380 kΩ – RS)
(3)
Example: For a 1-V/mA transfer function, the nominal, uncorrected value for RS would be 1 kΩ. A slightly larger
value (RS' = 1002.6 Ω), compensates for the gain error as a result of loading.
The 380-kΩ term in the equation for RS' has a tolerance of 25%, thus sense resistors above approximately 400 Ω
may require trimming to achive gain accuracy better than 0.02%.
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NOISE PERFORMANCE
The wideband noise performane of the INA149 is dominated by the internal resistor network. The thermal or
Johnson noise of these resistors measures approximately 550 nV/√Hz. The internal op amp contributes virtually
no excess noise at frequencies above 100 Hz.
Many applications may be satisfied with less than the full 500-kHz bandwidth of the INA149. In these cases, the
noise can be reduced with a low-pass filter on the output. The two-pole filter shown in Figure 47 limits bandwidth
and reduces noise. Because the INA149 has a 1/f noise corner frequency of approximately 100 Hz, a cutoff
frequency below 100 Hz does not further reduce noise.
Component values for different filter frequencies are shown in Table 1.
V−
V+
4
1
–IN
2
+IN
3
7
20 kΩ
380 kΩ
380 kΩ
C2
+
380 kΩ
19 kΩ
6
R1
R2
+
VOUT = (+IN) – (–IN)
(1)
5
C1
(1) For most applications, the OPA171 can be used as an operational amplifier. For directly driving successive-approximation register (SAR)
data converters, the OPA140 is a good choice.
Figure 47. Output Filter for Noise Reduction
Table 1. Components Values for Different Filter Bandwidths
BUTTERWORTH
LOW-PASS (f–3 dB)
OUTPUT NOISE
(mVPP)
200 kHz
1.8
100 kHz
1.1
11 kΩ
11.3 kΩ
10 kHz
0.35
11 kΩ
11.3 kΩ
1 nF
2 nF
1 kHz
0.11
11 kΩ
11.3 kΩ
10 nF
20 nF
100 Hz
0.05
11 kΩ
11.3 kΩ
0.1 µF
0.2 µF
16
R1
R2
C1
C2
100 pF
200 pF
No filter
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ERROR BUDGET ANALYSIS
The following error budget analysis demonstrates the importance of a high common-mode rejection ratio when
measuring small differential signals in the presence of high common-mode voltages. Figure 48 shows a typical
current measurement application.
V− = −15 V
V+ = +15 V
4
1
2
7
20 kΩ
380 kΩ
380 kΩ
RS = 10 Ω
3
(1)
RC = 10 Ω
380 kΩ
+
6
19 kΩ
VOUT
5
IMAX = 1 A
VCM = 265 V
(1) See the Measuring Current section for details about RC.
Figure 48. Typical Current Measurement Application
The maximum current through the shunt resistor (RS) is 1 A and generates a full-scale voltage drop of 10 V. All
error sources in this calculation are shown in relation to this full-scale voltage. The common-mode voltage in this
scenario is 265 V and the temperature range is from room temperature (+25°C) to +85°C. Table 2 shows the
dominant error sources for the INA149 and a competitor device.
Table 2. Error Budget Analysis
ERROR
SOURCE
ERROR (ppm of FS)
INA149
COMPETIOR A
INA149
COMPETITOR A
0.02% FS
0.05% FS
200
500
1100 µV
1000 µV
110
100
265 V/90 dB = 8380 µV
265 V/77 dB = 37432 µV
838
3743
1148
4343
600
600
60
120
Accuracy, TA = +25°C
Initial gain error
Offset voltage
Common mode
Total acuracy error
Temperature drift
Gain
Offset voltage
10 ppm/°C × 60°C
10 ppm/°C × 60°C
10 µV/°C × 60°C
20 µV/°C × 60°C
Total drift error
660
720
Total error
1808
5063
If a smaller shunt resistor is used, the full-scale voltage drop is also smaller. A shunt resistor of 1 Ω causes a 1-V
voltage drop with a current of 1 A flowing through it. The error of 1808 ppm for a full-scale voltage of 10 V
becomes 18080 ppm (1.6%) for a full-scale voltage of only 1 V.
This example demonstrates that the dominate source of error, even over temperature, comes from the CMRR
specification of the devices. The common-mode error is 46% of the total error for the INA149 and 74% of the
total error for the competitor device.
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BATTERY CELL VOLTAGE MONITOR
The INA149 can be used to measure the voltages of single cells in a stacked battery pack. Figure 49 shows an
examples for such an application.
(+275 V max)
+VS
2
3
INA149
+
2
3
INA149
+
Repeat
for each
cell
ADS8638
12-bit, 8-Channel,
Bipolar SAR ADC
MSP430
16-Bit Ultra-LowPower Microcontroller
2
3
INA149
+
2
3
INA149
+
−VS
(−275 V max)
Figure 49. Battery Cell Voltage Monitor
18
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PACKAGE OPTION ADDENDUM
www.ti.com
12-Dec-2011
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
INA149AID
ACTIVE
SOIC
D
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
INA149AIDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Samples
(Requires Login)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Dec-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
INA149AIDR
Package Package Pins
Type Drawing
SOIC
D
8
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2500
330.0
12.4
Pack Materials-Page 1
6.4
B0
(mm)
K0
(mm)
P1
(mm)
5.2
2.1
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Dec-2011
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
INA149AIDR
SOIC
D
8
2500
346.0
346.0
29.0
Pack Materials-Page 2
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