Infineon IPD320N20N3G Optimostm3 power-transistor Datasheet

IPD320N20N3 G
OptiMOSTM3 Power-Transistor
Product Summary
Features
• N-channel, normal level
• Excellent gate charge x R DS(on) product (FOM)
V DS
200
V
R DS(on),max
32
mΩ
ID
34
A
• Very low on-resistance R DS(on)
• 175 °C operating temperature
• Pb-free lead plating; RoHS compliant
• Qualified according to JEDEC1) for target application
• Halogen-free according to IEC61249-2-21
• Ideal for high-frequency switching and synchronous rectification
Type
IPD320N20N3 G
Package
PG-TO252-3
Marking
320N20N
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol Conditions
Continuous drain current
ID
Value
T C=25 °C
34
T C=100 °C
24
Unit
A
Pulsed drain current2)
I D,pulse
T C=25 °C
136
Avalanche energy, single pulse
E AS
I D=34 A, R GS=25 Ω
190
mJ
Gate source voltage
V GS
±20
V
Power dissipation
P tot
136
W
Operating and storage temperature
T j, T stg
-55 ... 175
°C
T C=25 °C
IEC climatic category; DIN IEC 68-1
1)
2)
Rev. 2.2
55/175/56
J-STD20 and JESD22
See figure 3
page 1
2009-10-22
IPD320N20N3 G
Parameter
Values
Symbol Conditions
Unit
min.
typ.
max.
-
-
1.1
minimal footprint
-
-
75
6 cm2 cooling area 3)
-
-
50
200
-
-
Thermal characteristics
Thermal resistance, junction - case
R thJC
Thermal resistance, junction ambient
R thJA
K/W
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0 V, I D=1 mA
Gate threshold voltage
V GS(th)
V DS=V GS, I D=90 µA
2
3
4
Zero gate voltage drain current
I DSS
V DS=160 V, V GS=0 V,
T j=25 °C
-
0.1
1
V DS=160 V, V GS=0 V,
T j=125 °C
-
10
100
V
µA
Gate-source leakage current
I GSS
V GS=20 V, V DS=0 V
-
1
100
nA
Drain-source on-state resistance
R DS(on)
V GS=10 V, I D=34 A
-
27
32
mΩ
Gate resistance
RG
-
2.5
-
Ω
Transconductance
g fs
28
55
-
S
|V DS|>2|I D|R DS(on)max,
I D=34 A
3)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 2.2
page 2
2009-10-22
IPD320N20N3 G
Parameter
Values
Symbol Conditions
Unit
min.
typ.
max.
-
1770
2350
-
135
180
Dynamic characteristics
Input capacitance
C iss
Output capacitance
C oss
Reverse transfer capacitance
C rss
-
4
-
Turn-on delay time
t d(on)
-
11
-
Rise time
tr
-
9
-
Turn-off delay time
t d(off)
-
21
-
Fall time
tf
-
4
-
Gate to source charge
Q gs
-
8
-
Gate to drain charge
Q gd
-
3
-
-
5
-
V GS=0 V, V DS=100 V,
f =1 MHz
V DD=100 V,
V GS=10 V, I D=17 A,
R G=1.6 Ω
pF
ns
Gate Charge Characteristics 4)
V DD=100 V, I D=17 A,
V GS=0 to 10 V
nC
Switching charge
Q sw
Gate charge total
Qg
-
22
29
Gate plateau voltage
V plateau
-
4.4
-
Output charge
Q oss
-
54
72
nC
-
-
34
A
-
-
136
-
1
1.2
V
-
110
-
ns
-
500
-
nC
V DD=100 V, V GS=0 V
V
Reverse Diode
Diode continous forward current
IS
Diode pulse current
I S,pulse
Diode forward voltage
V SD
Reverse recovery time
t rr
Reverse recovery charge
Q rr
4)
Rev. 2.2
T C=25 °C
V GS=0 V, I F=34 A,
T j=25 °C
V R=100 V, I F=17A ,
di F/dt =100 A/µs
See figure 16 for gate charge parameter definition
page 3
2009-10-22
IPD320N20N3 G
1 Power dissipation
2 Drain current
P tot=f(T C)
I D=f(T C); V GS≥10 V
160
40
140
120
30
I D [A]
P tot [W]
100
80
20
60
40
10
20
0
0
0
50
100
150
200
0
50
T C [°C]
100
150
200
T C [°C]
3 Safe operating area
4 Max. transient thermal impedance
I D=f(V DS); T C=25 °C; D =0
Z thJC=f(t p)
parameter: t p
parameter: D =t p/T
103
1 µs
102
10 µs
100
0.5
Z thJC [K/W]
I D [A]
100 µs
1 ms
101
0.2
0.1
10 ms
10
10
-1
0.05
0.02
0
DC
0.01
single pulse
10-2
10-1
10
-1
10
0
10
1
10
2
10
3
10-4
10-3
10-2
10-1
100
t p [s]
V DS [V]
Rev. 2.2
10-5
page 4
2009-10-22
IPD320N20N3 G
5 Typ. output characteristics
6 Typ. drain-source on resistance
I D=f(V DS); T j=25 °C
R DS(on)=f(I D); T j=25 °C
parameter: V GS
parameter: V GS
60
60
10 V
7V
50
50
4.5 V
5V
5V
40
R DS(on) [mΩ]
I D [A]
40
30
20
7V
30
10 V
20
4.5 V
10
10
0
0
0
1
2
3
4
5
0
10
20
V DS [V]
30
40
50
60
70
I D [A]
7 Typ. transfer characteristics
8 Typ. forward transconductance
I D=f(V GS); |V DS|>2|I D|R DS(on)max
g fs=f(I D); T j=25 °C
parameter: T j
50
80
70
40
60
50
I D [A]
g fs [S]
30
40
20
30
20
175 °C
10
10
25 °C
0
0
0
2
4
6
8
Rev. 2.2
0
25
50
75
I D [A]
V GS [V]
page 5
2009-10-22
IPD320N20N3 G
9 Drain-source on-state resistance
10 Typ. gate threshold voltage
R DS(on)=f(T j); I D=34 A; V GS=10 V
V GS(th)=f(T j); V GS=V DS
parameter: I D
100
4
3.5
80
900 µA
3
V GS(th) [V]
R DS(on) [mΩ]
90 µA
2.5
60
98%
40
2
1.5
typ
1
20
0.5
0
0
-60
-20
20
60
100
140
180
-60
-20
20
60
100
140
180
T j [°C]
T j [°C]
11 Typ. capacitances
12 Forward characteristics of reverse diode
C =f(V DS); V GS=0 V; f =1 MHz
I F=f(V SD)
parameter: T j
104
103
Ciss
103
Coss
10
2
25 °C
175 °C
I F [A]
C [pF]
102
25°C, 98%
101
Crss
101
175°C, 98%
100
0
40
80
120
160
0.5
1
1.5
2
V SD [V]
V DS [V]
Rev. 2.2
0
page 6
2009-10-22
IPD320N20N3 G
13 Avalanche characteristics
14 Typ. gate charge
I AS=f(t AV); R GS=25 Ω
V GS=f(Q gate); I D=17 A pulsed
parameter: T j(start)
parameter: V DD
100
10
8
160 V
25 °C
100 V
V GS [V]
I AS [A]
6
100 °C
10
125 °C
40 V
4
2
1
0
1
10
100
1000
0
5
10
15
20
25
Q gate [nC]
t AV [µs]
15 Drain-source breakdown voltage
16 Gate charge waveforms
V BR(DSS)=f(T j); I D=1 mA
230
V GS
Qg
V BR(DSS) [V]
220
210
V g s(th)
200
190
Q g(th)
Q sw
Q gs
180
-60
-20
20
60
100
140
Q g ate
Q gd
180
T j [°C]
Rev. 2.2
page 7
2009-10-22
IPD320N20N3 G
PG-TO252-3: Outline
Rev. 2.2
page 8
2009-10-22
IPD320N20N3 G
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2009 Infineon Technologies AG
All Rights Reserved.
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conditions or characteristics. With respect to any examples or hints given herein, any typical
values stated herein and/or any information regarding the application of the device,
Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind,
including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please
contact the nearest Infineon Technologies Office ( www.infineon.com).
on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with
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reasonably be expected to cause the failure of that life-support device or system or to affect
the safety or effectiveness of that device or system. Life support devices or systems are
intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user
or other persons may be endangered.
Rev. 2.2
page 9
2009-10-22
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