IRF IR2520DSTRPBF Adaptive ballast control ic Datasheet

Data Sheet No. PD60212 revC
IR2520D(S) & (PbF)
ADAPTIVE BALLAST CONTROL IC
Packages
Features
•
•
•
•
•
•
•
•
•
•
600V Half Bridge Driver
Integrated Bootstrap FET
Adaptive zero-voltage switching (ZVS)
Internal Crest Factor Over-Current Protection
0 to 6VDC Voltage Controlled Oscillator
Programmable minimum frequency
Micropower Startup Current (80uA)
Internal 15.6V zener clamp on Vcc
Small DIP8/SO8 Package
Also available LEAD-FREE (PbF)
8 Lead SOIC
IR2520DS
8-Lead PDIP
IR2520D
Description
The IR2520D(S) is a complete adaptive ballast controller and 600V half-bridge driver integrated into a single
IC for fluorescent lighting applications. The IC includes adaptive zero-voltage switching (ZVS), internal crest
factor over-current protection, as well as an integrated bootstrap FET. The heart of this IC is a voltage controlled oscillator with externally programmable minimum frequency. All of the necessary ballast features are
integrated in a small 8-pin DIP or SOIC package.
Typical Application Diagram
RSUPPLY
DCP2
SPIRAL
CFL
BR1
MHS
LF
CVCC
L1
CBUS
CF
FMIN
RFMIN
L2
COM
2
3
VCO
4
CVCO
VB
IR2520D
F1
VCC
1
8
7
LRES
HO
VS
CBS
CSNUB
CDC
6
5
CRES
LO
MLS
DCP1
www.irf.com
1
IR2520D(S)& (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions.
Symbol
Definition
Min.
Max.
Units
VB
High side floating supply voltage
-0.3
625
VS
High side floating supply offset voltage
VB - 25
VB + 0.3
VHO
High side floating output voltage
VS - 0.3
VB + 0.3
VLO
Low side output voltage
-0.3
VCC + 0.3
IVCO
Voltage controlled oscillator input current (Note 1)
-5
+5
ICC
dVS/dt
PD
RthJA
V
mA
Supply current (Note 2)
-25
25
mA
Allowable offset voltage slew rate
-50
50
V/ns
Package power dissipation @ TA ≤ +25°C
8-Lead PDIP
—
1
PD=(TJMAX-TA)RthJA
8-Lead SOIC
—
0.625
8-Lead PDIP
—
125
8-Lead SOIC
—
200
Thermal resistance, junction to ambient
TJ
Junction temperature
-55
150
TS
Storage temperature
-55
150
TL
Lead temperature (soldering, 10 seconds)
—
300
W
°C/W
°C
Note 1: This IC contains a zener clamp structure between the chip VCO and COM, which has a nominal breakdown voltage
of 6V. Please note that this pin should not be driven by a DC, low impedance power source greater than 6V.
Note 2: This IC contains a zener clamp structure between the chip VCC and COM, which has a nominal breakdown voltage
of 15.6V. Please note that this supply pin should not be driven by a DC, low impedance power source greater than the
VCLAMP specified in the Electrical Characteristics section.
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.
Symbol
VBS
VS
Definition
High side floating supply voltage
Steady state high side floating supply offset voltage
Min.
Max.
VCC - 0.7
VCLAMP
Units
-1
600
V
VCC
Supply voltage
VCCUV+
VCLAMP
ICC
Supply current
Note 3
10
mA
20
140
kΩ
0
5
V
-25
125
°C
RFMIN
Minimum frequency setting resistance
VVCO
VCO pin voltage
TJ
Junction temperature
Note 3: Enough current should be supplied into the VCC pin to keep the internal 15.6V zener clamp diode on this pin
regulating its voltage, VCLAMP.
2
www.irf.com
IR2520D(S) & (PbF)
Electrical Characteristics
VCC = VBS = VBIAS = 14V +/- 0.25V, CLO=CHO=1000pF, RFMIN = 82kΩ and TA = 25°C unless otherwise specified.
Symbol
Definition
Min. Typ. Max. Units Test Conditions
Supply Characteristics
VCCUV+
11.4
12.6
13.8
9.0
10.0
11.0
VUVHYS
VCC and VBS supply undervoltage positive going
threshold
VCC and VBS supply undervoltage negative going
threshold
VCC supply undervoltage lockout hysteresis
—
2.7
—
IQCCUV
IQCCFLT
ICCHF
ICCLF
VCLAMP
UVLO quiescent current
Fault mode quiescent current
VCC supply current f=85KHz
VCC supply current f=35KHz
VCC Zener clamp voltage
—
—
—
—
14.4
45
100
4.5
2.0
15.4
80
—
—
—
—
—
—
7.7
6.8
—
80
20
9.0
8.0
—
150
40
10.3
9.2
50
29.6
67
—
—
—
—
0.8
—
—
34
86
50
2.0
2.0
50
1.3
1.1
6
38.2
96
—
—
—
—
1.7
—
—
VCCUV-
VCC rising from OV
V
µA
mA
V
VCC = 10V
VVCO=0V
VVCO=6V
ICC = 10mA
Floating Supply Characteristics
IQBS0
IQBSUV
VBSUV+
VBSUVILK
Quiescent VBS supply current
Quiescent VBS supply current
VBS supply undervoltage positive going threshold
VBS supply undervoltage negative going threshold
Offset supply leakage current
µA
V
V
µA
VCC=10V, VBS=14V
VCC=10V, VBS=7V
VB = VS = 600V
Oscillator I/O Characteristics
f(min)
f(max)
D
DTLO
DTHO
IVCOQS
IVCOFS
IVCO_5V
VVCO_max
Minimum oscillator frequency (Note 4)
Maximum oscillator frequency (Note 4)
Oscillator duty cycle
LO output deadtime
HO output deadtime
IVCO quick start
IVCO frequency sweep
IVCO when VCO is at 5V
Maximum VCO voltage
kHz
VVCO=6V
VVCO=0V
%
µS
µA
VVCO=0V
VVCO=2V
V
Gate Driver Output Characteristics
VLO=LOW
LO output voltage when LO is low
—
COM
—
VHO=LOW
VLO=HIGH
VHO=HIGH
TRISE
TFALL
IO+
IO-
HO output voltage when HO is low
LO output voltage when LO is high
HO output voltage when HO is high
Turn on rise time
Turn off fall time
Output source short circuit pulsed current
Output sink short circuit pulse current
—
—
—
—
—
—
—
COM
VCC
VCC
150
75
140
230
—
—
—
230
120
—
—
mV
nS
mA
mA
Note 4: Frequency shown is nominal for RFMIN=82kΩ. Frequency can be programmed higher or lower with the value of RFMIN.
www.irf.com
3
IR2520D(S)& (PbF)
Electrical Characteristics
VCC = VBS = VBIAS = 14V +/- 0.25V, CLO=CHO=1000pF, RFMIN = 82kΩ and TA = 25°C unless otherwise specified.
Symbol
Definition
Min. Typ. Max. Units Test Conditions
Protection Characteristics
VVCO_RUN
VCO voltage when entering run mode
—
4.8
—
V
CSCF
Crest factor peak-to-average fault factor
—
5.0
—
N/A
VS_
Maximum crest factor VS offset voltage
—
3.0
—
V
0.74
0.82
0.91
V
FMIN lead voltage during normal operation
4.8
5.1
5.4
V
FMIN lead voltage during fault mode
—
0
—
V
VS offset = 0.5V
OFFSET_MAX
VVCOSD
VVCO shutdown voltage
Minimum Frequency Setting Characteristics
VFMIN
VFMINFLT
Bootstrap FET
IBS1
VB current
30
70
—
IBS2
VB current
10
20
—
mA
CBS=0.1uF,
VS=0V
VBS = 10V
Lead Definitions
Symbol
Description
Supply voltage
COM
IC power and signal ground
FMIN
Minimum frequency setting
VCO
Voltage controlled oscillator input
LO
Low-side gate driver output
VS
High-side floating return
HO
High-side gate driver output
VB
High-side gate driver floating supply
4
VCC 1
COM
2
FMIN 3
VCO
4
8
IR2520D(S)
VCC
VB
7 HO
6
VS
5
LO
www.irf.com
IR2520D(S) & (PbF)
Block Diagram
Bootstrap
FET
VCC 1
Bootstrap
FET
Control
15.6V
COM 2
IFMAX
IFMIN
IVCO
S
5V
IQS
R1
UVLO
1V
8
VB
7
HO
6
VS
5
LO
Q
R2
High-Voltage Well
VCO 4
5.1V
IDT
T
Q
R
Q
Driver
Logic
HIN
Level
Shift
PGEN
VS-Sensing
FET
SET
RST
Level-Shift
FETs
VCC
LIN
CT
300ns
PGEN
Fault
Logic
0.8V
VCC
4.8V
S
Q
R
Q
S1 Q
S2
R1
R2 Q
1us
blank
Averaging
Circuit
x5
UVLO
120uA
5V
IFMIN=
FMIN 3
5V
RRFMIN
All values are typical
www.irf.com
5
IR2520D(S)& (PbF)
State Diagram
Power Turned
On
VCCUV Mode
1
/2 -Bridge Off
IQCC ≅ 45 µA
VCC < 10V
(VCCUV-)
FAULT
Mode
1
/2-Bridge Off
V VCO = 0V
IQCCFLT ≅100µA
VFMIN = 0V
VVCO = 0V
VFMIN = 0V
VCC > 12.6V
(VCCUV+)
Frequency Sweep Mode
Crest Factor > 5.0
(CSCF)
or
V VCO < 0.82V
(VVCOSD)
VFMIN = 5.1V
VCC < 10V
(VCCUV-)
VCO ramps up, frequency ramps down
Crest Factor Disabled
ZVS Disabled
VVCO >4.8V
(VVCO _RUN)
RUN Mode
VVCO = 6.0V, Frequency = fmin
Crest Factor Enabled
ZVS Enabled
If non-ZVS detected then VVCO decreases
and frequency increases to maintain ZVS
All values are typical
6
www.irf.com
IR2520D(S) & (PbF)
Functional Description
Under-voltage Lock-Out Mode
The under-voltage lock-out mode (UVLO) is defined as the
state the IR2520D is in when VCC is below the turn-on
threshold of the IC. The IR2520D UVLO is designed to maintain an ultra-low supply current (IQCCUV <80uA), and to
guarantee that the IR2520D is fully functional before the
high- and low-side output gate drivers are activated. The
VCC capacitor, CVCC, is charged by current through supply resistor, RSUPPLY, minus the start-up current drawn by
the IR2520D (Figure 1). This resistor is chosen to provide
sufficient current to supply the IR2520D from the DC bus.
Once the capacitor voltage on VCC reaches the start-up
threshold, VCCUV+, the IR2520D turns on and HO and LO
start oscillating. Capacitor CVCC should be large enough to
hold the voltage at VCC above the VCCUV+ threshold for
one half-cycle of the line voltage or until the external auxiliary supply can maintain the required supply voltage and
current to the IC.
DCBUS(+)
RSUPPLY
DCP2
MHS
VCC
1
CVCC
COM
2
15.6V
CLAMP
FMIN
3
RFMIN
VCO
4
CVCO
VB
Bootstrap
FET
Driver
VCC
UVLO
8
Highand
Lowside
Driver
HO
TO LOAD
7
VS
CBS
CSNUB
6
LO
5
high-side driver is enabled. During UVLO mode, the high- and
low-side gate driver outputs, HO and LO, are both low and
pin VCO is pulled down to COM for resetting the starting
frequency to the maximum.
Frequency Sweep Mode
When VCC exceeds VCCUV+ threshold, the IR2520D enters
frequency sweep mode. An internal current source (Figure
2) charges the external capacitor on pin VCO, CVCO, and
the voltage on pin VCO starts ramping up linearly. An additional quick-start current (IVCOQS) is also connected to the
VCO pin and charges the VCO pin initially to 0.85V. When the
VCO voltage exceeds 0.85V, the quick-start current is then
disconnected internally and the VCO voltage continues to
charge up with the normal frequency sweep current source
(IVCOFS) (Figure 3). This quick-start brings the VCO voltage
quickly to the internal range of the VCO. The frequency ramps
down towards the resonance frequency of the high-Q ballast output stage causing the lamp voltage and load current to
increase. The voltage on pin VCO continues to increase and
the frequency keeps decreasing until the lamp ignites. If the
lamp ignites successfully, the voltage on pin VCO continues
to increase until it internally limits at 6V (VVCO_MAX). The
frequency stops decreasing and stays at the minimum frequency as programmed by an external resistor, RFMIN, on
pin FMIN. The minimum frequency should be set below the
high-Q resonance frequency of the ballast output stage to
ensure that the frequency ramps through resonance for lamp
ignition (Figure 4). The desired preheat time can be set by
adjusting the slope of the VCO ramp with the external capacitor CVCO.
MLS
DCBUS(+)
DCP1
RSUPPLY
DCP2
LOAD RETURN
DCBUS(-)
MHS
Fig. 1 Start-up circuitry
An internal bootstrap MOSFET between VCC and VB and
external supply capacitor, CBS, determine the supply voltage for the high-side driver circuitry. An external charge
pump circuit consisting of capacitor CSNUB and diodes DCP1
and DCP2, comprises the auxiliary supply voltage for the
low-side driver circuitry. To guarantee that the high-side
supply is charged up before the first pulse on pin HO, the
first pulse from the output drivers comes from the LO pin.
LO may oscillate several times until VB-VS exceeds the
high-side UVLO rising threshold, VBSUV+ (9 Volts), and the
www.irf.com
VCC
1
CVCC
COM
2
15.6V
CLAMP
FMIN
3
RFMIN
VCO
8
Highand
Lowside
Driver
HO
TO LOAD
7
VS
CBS
CSNUB
6
LO
VCO
4
CVCO
VB
Bootstrap
FET
Driver
5
MLS
DCP1
DCBUS(-)
LOAD RETURN
Fig. 2 Frequency sweep circuitry mode circuitry
7
IR2520D(S)& (PbF)
Run Mode
VVCO
6V
4.8V
0.85V
Frequency Sweep Mode
Run Mode
Freq
fmax
fmin
The IR2520D enters RUN mode when the voltage on pin
VCO exceeds 4.8V (VVCO_RUN). The lamp has ignited and
the ballast output stage becomes a low-Q, series-L, parallel-RC circuit. Also, the VS sensing and fault logic blocks
(Figure 5) both become enabled for protection against nonZVS and over-current fault conditions. The voltage on the
VCO pin continues to increase and the frequency deceases
further until the VCO pin voltage limits at 6V (VVCO_MAX)
and the minimum frequency is reached. The resonant inductor, resonant capacitor, DC bus voltage and minimum
frequency determine the running lamp power. The IC stays
at this minimum frequency unless non-ZVS occurs at the
VS pin, a crest factor over-current condition is detected at
the VS pin, or VCC decreases below the UVLO- threshold
(see State Diagram).
DCBUS(+)
RSUPPLY
Fig. 3 IR2520D Frequency sweep mode timing
diagram.
DCP2
MHS
VCC
1
CVCC
COM
2
15.6V
CLAMP
FMIN
3
RFMIN
VB
Bootstrap
FET
Driver
VCO
8
Highand
Lowside
Driver
High -Q
Vout
Vin
Ignition
6
LO
5
Fault
Logic
VS
Sense
MLS
LOAD RETURN
Fig. 5 IR2520D Run mode circuitry.
t
Non Zero-Voltage Switching (ZVS) Protection
Start
fmax
Frequency
Fig. 4 Resonant tank Bode plot with lamp operating
points.
8
CSNUB
DCBUS(-)
Low -Q
fmin
TO LOAD
CBS
DCP1
ea
eh
Pr
Run
VS
VCO
4
CVCO
HO
7
During run mode, if the voltage at the VS pin has not slewed
entirely to COM during the dead-time such that there is
voltage between the drain and source of the external lowside half-bridge MOSFET when LO turns-on, then the system
is operating too close to, or, on the capacitive side of,
resonance. The result is non-ZVS capacitive-mode
switching that causes high peak currents to flow in the
half-bridge MOSFETs that can damage or destroy them
(Figure 6). This can occur due to a lamp filament failure(s),
www.irf.com
IR2520D(S) & (PbF)
lamp removal (open circuit), a dropping DC bus during a
mains brown-out or mains interrupt, lamp variations over
time, or component variations. To protect against this, an
internal high-voltage MOSFET is turned on at the turn-off of
HO and the VS-sensing circuit measures VS at each rising
edge of LO. If the VS voltage is non-zero, a pulse of current
is sinked from the VCO pin (Figures 5 and 6) to slightly
discharge the external capacitor, CVCO, causing the
frequency to increase slightly. The VCO capacitor then
charges up during the rest of the cycle slowly due to the
internal current source.
open circuit (Figure 7). This will cause capacitive switching
(hard-switching) resulting in high peak MOSFET currents
that can damage them. The IR2520D will increase the frequency in attempt to satisfy ZVS until the VCO pin decreases below 0.82V (VVCOSD). The IC will enter Fault
Mode and latch the LO and HO gate driver outputs ‘low’ for
turning the half-bridge off safely before any damage can
occur to the MOSFETs.
RUN MODE
FAULT MODE
VLO
VLO
VHO
VHO
!
VVS
!
VVS
!
IMLS
IL
IMHS
!
IMLS
VVCO
IMHS
0.85V
!
VVCO
!
Too close to resonance.
Hard-switching and high
peak MOSFET currents!
Frequency shifted higher
to maintain ZVS.
Capacitive switching. Hard-switching
and high peak MOSFET currents!
Frequency shifted higher
until VCO < 0.82V. LO and
HO are latched low before
damage occurs to MOSFETs.
Fig. 7 Lamp removal or open filament fault
condition timing diagram
Fig. 6 IR2520D non-ZVS protection timing diagram.
The frequency is trying to decrease towards resonance
by charging the VCO capacitor and the adaptive ZVS circuit “nudges” the frequency back up slightly above resonance each time non-ZVS is detected at the turn-on of LO.
The internal high-voltage MOSFET is then turned off at the
turn-off of LO and it withstands the high-voltage when VS
slews up to the DC bus potential. The circuit then remains in
this closed-loop adaptive ZVS mode during running and
maintains ZVS operation with changing line conditions, component tolerance variations and lamp/load variations. During a lamp removal or filament failure, the lamp resonant
tank will be interrupted causing the half-bridge output to go
www.irf.com
Crest Factor Over-current Protection
During normal lamp ignition, the frequency sweeps through
resonance and the output voltage increases across the
resonant capacitor and lamp until the lamp ignites. If the
lamp fails to ignite, the resonant capacitor voltage, the inductor
voltage and inductor current will continue to increase until
the inductor saturates or the output voltage exceeds the
maximum voltage rating of the resonant capacitor or inductor.
The ballast must shutdown before damage occurs. To
protect against a lamp non-strike fault condition, the IR2520D
uses the VS-sensing circuitry (Figure 5) to also measure
the low-side half-bridge MOSFET current for detecting an
9
IR2520D(S)& (PbF)
over-current fault. By using the RDSon of the external lowside MOSFET for current sensing and the VS-sensing
circuitry, the IR2520D eliminates the need for an additional
current sensing resistor, filter and current-sensing pin. To
cancel changes in the RDSon value due to temperature and
MOSFET variations, the IR2520D performs a crest factor
measurement that detects when the peak current exceeds
the average current by a factor of 5 (CSCF). Measuring the
crest factor is ideal for detecting when the inductor saturates
due to excessive current that occurs in the resonant tank
when the frequency sweeps through resonance and the
lamp does not ignite. When the VCO voltage ramps up for
the first time from zero, the resonant tank current and
voltages increase as the frequency decreases towards
resonance (Figure 8). If the lamp does not ignite, the inductor
current will eventually saturate but the crest factor fault
protection is not active until the VCO voltage exceeds 4.8V
(VVCO_RUN) for the first time. The frequency will continue
decreasing to the capacitive side of resonance towards
the minimum frequency setting and the resonant tank current
and voltages will decrease again. When the VCO voltage
exceeds 4.8V (VVCO_RUN), the IC enters Run Mode and
the non-ZVS protection and crest factor protection are both
enabled. The non-ZVS protection will increase the
frequency again cycle-by-cycle towards resonance from
the capacitive side. The resonant tank current will increase
again as the frequency nears resonance until the inductor
saturates again.
The crest factor protection is now enabled and measures
the instantaneous voltage at the VS pin only during the time
when LO is ‘high’ and after an initial 1us blank time from the
rising edge of LO. The blank time is necessary to prevent
the crest factor protection circuit from reacting to a nonZVS condition. An internal averaging circuit averages the
instantaneous voltage at the VS pin over 10 to 20 switching
cycles of LO. During Run Mode, the first time the inductor
saturates when LO is ‘high’ (after the 1us blank time) and
the peak current exceeds the average by 5 (CSCF), the
IR2520D will enter Fault Mode and both LO and HO outputs
will be latched ‘low’. The half-bridge will be safely disabled
before any damage can occur to the ballast components.
The crest factor peak-to-average fault factor varies as a
function of the internal average (Figure 20). The maximum
internal average should be below 3.0 volts. Should the
average exceed this amount, the multiplied average voltage
can exceed the maximum limit of the VS sensing circuit and
the VS sensing circuit will no longer detect crest factor
10
faults. This can occur when a half-bridge MOSFET is
selected that has an RDSon that is too large for the application
causing the internal average to exceed the maximum limit.
FAULT MODE
During Run Mode, should the VCO voltage decrease below
0.82V (VVCOSD) or a crest factor fault occur, the IR2520D
will enter Fault Mode (see State Diagram). The LO and HO
gate driver outputs are both latched ‘low’ so that the halfbridge is disabled. The VCO pin is pulled low to COM and
the FMIN pin decreases from 5V to COM. VCC draws
micro-power current (I CCFLT) so that VCC stays at the
clamp voltage and the IC remains in Fault Mode without the
need for the charge-pump auxiliary supply. To exit Fault
Mode and return to Frequency Sweep Mode, VCC must be
cycled below the UVLO- threshold and back above the
UVLO+ threshold.
LO
AVG*5
Inductor
saturation
IMLS
INDUCTIVE SIDE
OF RESONANCE
CAPACITIVE SIDE
OF RESONANCE
IL
4.6V
VVCO
FREQUENCY SWEEP MODE
RUN MODE
FAULT MODE
Fig. 8 Crest factor protection timing diagram
www.irf.com
IR2520D(S) & (PbF)
16
50
40
VCCUV+
IQCCUV(uA)
VCCUV+,-(V
14
12
10
VCCUV-
30
20
10
8
0
-25
6
-25
0
25
50
75
100
125
0
25
50
75
100
125
Temperature(C)
Temperature(°C)
Fig. 10 IQCCUV vs TEMP
VCC=10V, VCO=0V
Fig. 9 VCCUV+/- vs TEMP
12
100
IQBSUV(uA)
VBSUV+,-(V)
80
10
VBSUV+
VBSUV-
8
60
40
20
6
-25
0
0
25
50
75
Temperature(°C)
Fig. 11 VBSUV+/- vs TEMP
www.irf.com
100
125
-25
0
25
50
75
100
125
Temperature(°C)
Fig. 12 IQBSUV vs TEMP
11
IR2520D(S)& (PbF)
100
90
90
80
VVCO=0V
70
Freq(KHz)
Frequency(kHz)
80
60
50
40
20 K
60
40 K
50
60 K
80 K
40
100 K
30
VVCO=5V
30
70
120 K
20
20
140 K
10
10
0
0
-25
0
25
50
75
100
-25
125
0
75 100 125
Temperature(C)
Temperature(C)
Fig. 13
25 50
Frequency vs TEMP
REMIN=82K
Fig. 14
Frequency vs RFMIN vs TEMP
VVCO=6V
100
93
90
80
25
70
75
92
-25
Frequency(kHz))
Frequency(kHz)
-25
125
60
50
40
30
20
75
90
125
89
88
87
10
86
0
1
2
3
4
5
VCO(V)
Fig. 15 FREQ VS VVCO vs TEMP
VCC=14V
12
25
91
6
12
13
14
15
16
Temperature(C)
Fig. 16 FREQ VS VCC vs TEMP
VVCO=0V
www.irf.com
IR2520D(S) & (PbF)
2
2.5
1.8
TDHO
1.6
TDLO
1.5
TD (uS)
IVCOFS(uA)
2
1
1.4
1.2
1
0.8
0.6
0.4
0.5
0.2
0
0
-25
-25
0
25
50
75
100
125
0
25
50
75
100
125
Temperature(°C)
Temperature(°C)
Fig. 17 DTHO, DTLO vs TEMP
VCO=0V
Fig. 18 IVCO_FS vs TEMP
7
10
9
7
VCSCF
VVCO_MAX (V)
8
6.5
6
6
5
4
3
2
5.5
1
0
5
-25
0.2
0
25
50
75
100
125
0.4
0.6
0.8
1
VS OFFSET(V)
Temperature(C)
Fig. 19 VVCOMAX vs TEMP
www.irf.com
Fig. 20 CSCF vs OFFSET
13
IR2520D(S)& (PbF)
1.5
10
1.25
VVCO_SD (V)
8
CSCF
6
4
1
0.75
0.5
0.25
2
0
-25
0
-25
0
25
50
75
100
0
125
25
50
75
100
125
100
125
Temperature (°C)
Temperature(°C)
Fig. 22 VVCO_SD vs TEMP
Fig. 21 CSCF vs TEMP
VS_OFFSET=0.5V
6
100
5
IBS1(mA)
VFMIN(V)
80
4
3
2
1
0
25
50
75
100
Temperature(C)
(
Fig. 23 VFMIN vs TEMP
VCO=0V, RFMIN=82K
14
40
20
0
-25
60
125
0
-25
0
25
50
75
Temperature(°C)
)
Fig. 24 IBS1 vs TEMP
www.irf.com
IR2520D(S) & (PbF)
30
IBS2(mA)
25
20
15
10
5
0
-25
0
25
50
75
100
125
Temperature(°C)
Fig. 26 IBS2 vs TEMP
www.irf.com
15
IR2520D(S)& (PbF)
Case outlines
01-6014
01-3003 01 (MS-001AB)
IR2520D 8-Lead PDIP
D
DIM
B
5
A
FOOTPRINT
8
6
7
6
5
H
E
1
6X
2
3
0.25 [.010]
4
e
A
6.46 [.255]
3X 1.27 [.050]
e1
0.25 [.010]
A1
.0688
1.35
1.75
A1 .0040
.0098
0.10
0.25
b
.013
.020
0.33
0.51
c
.0075
.0098
0.19
0.25
D
.189
.1968
4.80
5.00
.1574
3.80
4.00
E
.1497
e
.050 BASIC
e1
MAX
1.27 BASIC
.025 BASIC
0.635 BASIC
H
.2284
.2440
5.80
6.20
K
.0099
.0196
0.25
0.50
L
.016
.050
0.40
1.27
y
0°
8°
0°
8°
y
0.10 [.004]
8X L
8X c
7
C A B
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
4. OUTLINE C ONFORMS TO JEDEC OUTLINE MS-012AA.
IR2520DS
16
MIN
.0532
K x 45°
A
C
8X b
8X 1.78 [.070]
MILLIMETERS
MAX
A
8X 0.72 [.028]
INCHES
MIN
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
8-Lead SOIC
01-6027
01-0021 11 (MS-012AA)
www.irf.com
IR2520D(S) & (PbF)
LEADFREE PART MARKING INFORMATION
Part number
IRxxxxxx
YWW?
Date code
Pin 1
Identifier
?
P
MARKING CODE
Lead Free Released
Non-Lead Free
Released
IR logo
?XXXX
Lot Code
(Prod mode - 4 digit SPN code)
Assembly site code
Per SCOP 200-002
ORDER INFORMATION
Basic Part (Non-Lead Free)
8-Lead PDIP IR2520D order IR2520D
8-Lead SOIC IR2520DS order IR2520DS
Leadfree Part
8-Lead PDIP IR2520D order IR2520DPbF
8-Lead SOIC IR2520DS order IR2520DSPbF
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
This product has been qualified per industrial level MSL-3
Data and specifications subject to change without notice. 3/1/2005
www.irf.com
17
Similar pages