Vishay IRF640STRR Power mosfet Datasheet

IRF640S, IRF640L, SiHF640S, SiHF640L
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
•
•
•
•
•
•
•
•
200
RDS(on) (Ω)
VGS = 10 V
0.18
Qg (Max.) (nC)
70
Qgs (nC)
13
Qgd (nC)
39
Configuration
Single
D
D2PAK
(TO-263)
I2PAK
(TO-262)
G
Surface Mount
Low-Profile Through-Hole
Available in Tape and Reel
Dynamic dV/dt Rating
150 °C Operating Temperature
Fast Switching
Fully Avalanche Rated
Lead (Pb)-free Available
Available
RoHS*
COMPLIANT
DESCRIPTION
Third generation Power MOSFETs from Vishay provide the
designer with the best combinations of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The D2PAK is a surface mount power package capable of
accommodating die size up to HEX-4. It provides the highest
power capability and the last lowest possible on-resistance in
any existing surface mount package. The D2PAK is suitable
for high current applications because of its low internal
connection resistance and can dissipate up to 2.0 W in a
typical surface mount application. The through-hole version
(IRF640L/SiHF640L) is available for low-profile applications.
G
D
S
S
N-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free
SnPb
D2PAK (TO-263)
IRF640SPbF
SiHF640S-E3
IRF640S
SiHF640S
D2PAK (TO-263)
IRF640STRLPbFa
SiHF6340STL-E3a
IRF640STRLa
SiHF640STLa
D2PAK (TO-263)
IRF640STRRPbFa
SiHF640STR-E3a
IRF640STRRa
SiHF640STRa
I2PAK (TO-262)
IRF640LPbF
SiHF640L-E3
IRF640L
SiHF640L
Note
a. See device orientation.
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
SYMBOL
VDS
VGS
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed Drain Currenta, e
Linear Derating Factor
Single Pulse Avalanche Energyb, e
Avalanche Currenta
Repetiitive Avalanche Energya
Maximum Power Dissipation
Peak Diode Recovery dV/dtc, e
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
ID
IDM
EAS
IAR
EAR
TC = 25 °C
TA = 25 °C
PD
dV/dt
TJ, Tstg
for 10 s
LIMIT
200
± 20
18
11
72
1.0
580
18
13
3.1
130
5.0
- 55 to + 150
300d
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 50 V, starting TJ = 25 °C, L = 2.7 mH, RG = 25 Ω, IAS = 18 A (see fig. 12).
c. ISD ≤ 18 A, dI/dt ≤ 150 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
e. Uses IRF640/SiHF640 data and test conditions.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91037
S-81241-Rev. A, 07-Jul-08
www.vishay.com
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IRF640S, IRF640L, SiHF640S, SiHF640L
Vishay Siliconix
THERMAL RESISTANCE RATINGS
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
(PCB Mounted, Steady-State)a
PARAMETER
RthJA
-
40
Maximum Junction-to-Case (Drain)
RthJC
-
1.0
UNIT
°C/W
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
VDS
VGS = 0 V, ID = 250 µA
200
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mAc
-
0.29
-
V/°C
VGS(th)
VDS = VGS, ID = 250 µA
2.0
-
4.0
V
Gate-Source Leakage
IGSS
VGS = ± 20 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 200 V, VGS = 0 V
-
-
25
VDS = 160 V, VGS = 0 V, TJ = 125 °C
-
-
250
Drain-Source On-State Resistance
Forward Transconductance
RDS(on)
gfs
ID = 11 Ab
VGS = 10 V
VDS = 50 V, ID = 11 Ad
µA
-
-
0.18
Ω
6.7
-
-
S
-
1300
-
-
430
-
-
130
-
-
-
70
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
-
-
13
Gate-Drain Charge
Qgd
-
-
39
Turn-On Delay Time
td(on)
-
14
-
tr
-
51
-
-
45
-
-
36
-
-
-
18
-
-
72
Rise Time
Turn-Off Delay Time
Fall Time
td(off)
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5d
VGS = 10 V
ID = 18 A, VDS = 160 V,
see fig. 6 and 13b, c
VDD = 100 V, ID = 18 A,
RG = 9.1 Ω, RD = 5.4 Ω, see fig. 10b, c
tf
pF
nC
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Currenta
Body Diode Voltage
IS
ISM
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = 18 A, VGS = 0
S
Vb
TJ = 25 °C, IF = 18 A, dI/dt = 100 A/µsb, c
-
-
2.0
V
-
300
610
ns
-
3.4
7.1
µC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
c. Uses IRF640/SiHF640 data and test conditions.
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Document Number: 91037
S-81241-Rev. A, 07-Jul-08
IRF640S, IRF640L, SiHF640S, SiHF640L
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Fig. 1 - Typical Output Characteristics, TJ = 25 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 2 - Typical Output Characteristics, TJ = 175 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91037
S-81241-Rev. A, 07-Jul-08
www.vishay.com
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IRF640S, IRF640L, SiHF640S, SiHF640L
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
Document Number: 91037
S-81241-Rev. A, 07-Jul-08
IRF640S, IRF640L, SiHF640S, SiHF640L
Vishay Siliconix
RD
VDS
VGS
D.U.T.
RG
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
VDS
90 %
10 %
VGS
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(on)
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS
15 V
tp
L
VDS
D.U.T.
RG
IAS
20 V
tp
Driver
+
A
- VDD
IAS
0.01 Ω
Fig. 12a - Unclamped Inductive Test Circuit
Document Number: 91037
S-81241-Rev. A, 07-Jul-08
Fig. 12b - Unclamped Inductive Waveforms
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IRF640S, IRF640L, SiHF640S, SiHF640L
Vishay Siliconix
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
Document Number: 91037
S-81241-Rev. A, 07-Jul-08
IRF640S, IRF640L, SiHF640S, SiHF640L
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
RG
•
•
•
•
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test
Driver gate drive
P.W.
+
Period
D=
+
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
VDD
Body diode forward drop
Inductor current
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?91037.
Document Number: 91037
S-81241-Rev. A, 07-Jul-08
www.vishay.com
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Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
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Document Number: 91000
Revision: 18-Jul-08
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