IRF IRF6727MPBF Directfet power mosfet Datasheet

PD - 96122
IRF6727MPbF
IRF6727MTRPbF
DirectFET™ Power MOSFET ‚
l
l
l
l
l
l
l
l
l
l
RoHS Compliant Containing No Lead and Bromide 
Low Profile (<0.7 mm)
Dual Sided Cooling Compatible 
Ultra Low Package Inductance
Optimized for High Frequency Switching 
Ideal for CPU Core DC-DC Converters
Optimized for both Sync.FET and some Control FET
application
Low Conduction and Switching Losses
Compatible with existing Surface Mount Techniques 
100% Rg tested
Typical values (unless otherwise specified)
VDSS
VGS
RDS(on)
RDS(on)
30V max ±20V max 1.22mΩ@ 10V 1.84mΩ@ 4.5V
Qg
Qgd
Qgs2
Qrr
Qoss
Vgs(th)
16nC
5.3nC
45nC
28nC
1.8V
tot
49nC
DirectFET™ ISOMETRIC
MX
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
MQ
MT
MX
MP
Description
The IRF6727MPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFET TM packaging to achieve
the lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is
compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection
soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6727MPbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and
switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies. The IRF6727MPbF has been optimized for parameters that are critical in synchronous buck
operating from 12 volt bus converters including Rds(on) and gate charge to minimize losses.
Absolute Maximum Ratings
Parameter
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC = 25°C
IDM
EAS
IAR
g
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
g
h
Typical RDS(on) (mΩ)
4
ID = 32A
3
2
T J = 125°C
1
T J = 25°C
0
0
5
10
15
20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
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e
e
f
VGS, Gate-to-Source Voltage (V)
VDS
Max.
Units
30
±20
32
26
180
260
250
25
V
A
mJ
A
5.0
ID= 25A
4.0
VDS= 24V
VDS= 15V
3.0
2.0
1.0
0.0
0
5
10 15 20 25 30 35 40 45 50 55
QG, Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs. Gate-to-Source Voltage
„ TC measured with thermocouple mounted to top (Drain) of part.
Repetitive rating; pulse width limited by max. junction temperature.
† Starting TJ = 25°C, L = 0.77mH, RG = 25Ω, IAS = 25A.
1
08/14/07
IRF6727MPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
VGS = 0V, ID = 250µA
mV/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 32A
VGS = 4.5V, ID = 25A
Drain-to-Source Breakdown Voltage
30
–––
–––
∆ΒVDSS/∆TJ
RDS(on)
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
–––
–––
22
1.22
–––
1.7
VGS(th)
Gate Threshold Voltage
–––
1.35
1.84
1.8
2.4
2.35
∆VGS(th)/∆TJ
IDSS
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
–––
–––
-6.5
–––
–––
1.0
Gate-to-Source Forward Leakage
–––
–––
–––
–––
150
100
Gate-to-Source Reverse Leakage
Forward Transconductance
–––
160
–––
–––
-100
–––
Total Gate Charge
Pre-Vth Gate-to-Source Charge
–––
–––
49
12
74
–––
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
–––
–––
5.3
16
–––
–––
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
–––
16
21.3
–––
–––
Output Charge
Gate Resistance
–––
–––
28
1.5
–––
2.5
Turn-On Delay Time
Rise Time
–––
–––
21
31
–––
–––
Turn-Off Delay Time
Fall Time
–––
–––
24
16
–––
–––
Input Capacitance
Output Capacitance
–––
–––
6190
1280
–––
–––
Reverse Transfer Capacitance
–––
610
–––
Min.
Typ. Max. Units
–––
–––
IGSS
gfs
Qg
Qgs1
Qgs2
Qgd
Qgodr
Qsw
Qoss
RG
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Conditions
Typ. Max. Units
BVDSS
V
V
i
i
VDS = VGS, ID = 100µA
mV/°C
µA VDS = 24V, VGS = 0V
VDS = 24V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
VGS = -20V
S
VDS = 15V, ID = 25A
nC
VDS = 15V
VGS = 4.5V
ID = 25A
See Fig. 15
nC
VDS = 16V, VGS = 0V
Ω
i
VDD = 15V, VGS = 4.5V
ns
ID = 25A
RG = 1.8Ω
See Fig. 17
VGS = 0V
pF
VDS = 15V
ƒ = 1.0MHz
Diode Characteristics
Parameter
IS
Continuous Source Current
ISM
(Body Diode)
Pulsed Source Current
VSD
trr
Qrr
g
A
–––
–––
Conditions
MOSFET symbol
110
260
(Body Diode)
Diode Forward Voltage
–––
0.77
1.0
V
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
27
45
41
68
ns
nC
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 25A, VGS = 0V
TJ = 25°C, IF = 25A
di/dt = 250A/µs
i
i
Notes:
‡ Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
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IRF6727MPbF
Absolute Maximum Ratings
e
e
f
Max.
Units
2.8
1.8
89
270
-40 to + 150
W
Parameter
Power Dissipation
Power Dissipation
Power Dissipation
Peak Soldering Temperature
Operating Junction and
Storage Temperature Range
PD @TA = 25°C
PD @TA = 70°C
PD @TC = 25°C
TP
TJ
TSTG
°C
Thermal Resistance
Parameter
el
jl
kl
fl
RθJA
RθJA
RθJA
RθJC
RθJ-PCB
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
Junction-to-PCB Mounted
Linear Derating Factor
e
Typ.
Max.
Units
–––
12.5
20
–––
1.0
45
–––
–––
1.4
–––
°C/W
0.022
W/°C
Thermal Response ( Z thJA )
100
10
1
D = 0.50
0.20
0.10
0.05
0.02
0.01
τJ
0.1
R1
R1
τJ
τ1
R2
R2
R3
R3
τA
τ1
τ2
τ2
τ3
τ4
τ3
Ci= τi/Ri
Ci= τi/Ri
0.01
0.001
1E-006
0.0001
τA
1.1959
0.000163
3.1186
0.009223
22.998
0.9465
17.704
41.2
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
SINGLE PULSE
( THERMAL RESPONSE )
1E-005
τ4
τi (sec)
Ri (°C/W)
R4
R4
0.001
0.01
0.1
1
10
100
1000
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient ƒ
Notes:
ˆ Used double sided cooling , mounting pad with large heatsink.
‰ Mounted on minimum footprint full size board with metalized
Š Rθ is measured at TJ of approximately 90°C.
back and with small clip heatsink.
ƒ Surface mounted on 1 in. square Cu
(still air).
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‰ Mounted to a PCB with
small clip heatsink (still air)
‰ Mounted on minimum
footprint full size board with
metalized back and with small
clip heatsink (still air)
3
IRF6727MPbF
1000
ID, Drain-to-Source Current (A)
TOP
100
BOTTOM
10
VGS
10V
5.0V
4.5V
3.5V
3.0V
2.7V
2.5V
2.3V
1
2.3V
0.1
TOP
ID, Drain-to-Source Current (A)
1000
100
BOTTOM
10
2.3V
≤60µs PULSE WIDTH
≤60µs PULSE WIDTH
Tj = 25°C
0.01
0.1
1
Tj = 150°C
1
10
100
0.1
1
10
100
V DS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
Fig 5. Typical Output Characteristics
1000
2.0
VDS = 15V
≤60µs PULSE WIDTH
ID = 32A
Typical RDS(on) (Normalized)
ID, Drain-to-Source Current (A)
VGS
10V
5.0V
4.5V
3.5V
3.0V
2.7V
2.5V
2.3V
100
T J = 150°C
T J = 25°C
T J = -40°C
10
1
1.5
1.0
V GS = 10V
V GS = 4.5V
0.1
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Fig 7. Normalized On-Resistance vs. Temperature
Fig 6. Typical Transfer Characteristics
7
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
Typical RDS(on) ( mΩ)
C, Capacitance(pF)
Ciss
Coss
1000
Crss
TJ = 25°C
Vgs = 3.5V
Vgs = 4.0V
Vgs = 4.5V
Vgs = 5.0V
Vgs = 8.0V
Vgs = 10V
6
C oss = C ds + C gd
10000
20 40 60 80 100 120 140 160
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
100000
-60 -40 -20 0
5
4
3
2
1
0
100
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
0
50
100
150
200
250
ID, Drain Current (A)
Fig 9. Typical On-Resistance vs.
Drain Current and Gate Voltage
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IRF6727MPbF
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
100
T J = 150°C
100
OPERATION IN THIS AREA
LIMITED BY R DS(on)
T J = 25°C
T J = -40°C
10
1
100µsec
1msec
10
10msec
1
0.1
VGS = 0V
DC
T A = 25°C
T J = 150°C
Single Pulse
0
0.01
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
0.01
VSD, Source-to-Drain Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
ID, Drain Current (A)
160
140
120
100
80
60
40
20
100
100.00
2.5
2.0
1.5
125
ID = 100µA
ID = 150µA
ID = 250µA
1.0
ID = 1.0mA
ID = 1.0A
0.5
0
75
10.00
3.0
Typical VGS(th) Gate threshold Voltage (V)
180
50
1.00
Fig11. Maximum Safe Operating Area
200
25
0.10
VDS, Drain-to-Source Voltage (V)
-75 -50 -25
150
0
25
50
75 100 125 150
T J , Temperature ( °C )
T C , Case Temperature (°C)
Fig 12. Maximum Drain Current vs. Case Temperature
Fig 13. Typical Threshold Voltage vs. Junction
Temperature
EAS , Single Pulse Avalanche Energy (mJ)
1000
ID
2.6A
3.7A
BOTTOM 25A
TOP
800
600
400
200
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy vs. Drain Current
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5
IRF6727MPbF
Id
Vds
Vgs
L
VCC
DUT
0
20K
1K
Vgs(th)
S
Qgodr
Fig 15a. Gate Charge Test Circuit
Qgd
Qgs2 Qgs1
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
D.U.T
V
RGSG
20V
DRIVER
L
VDS
tp
+
- VDD
IAS
A
I AS
0.01Ω
tp
Fig 16b. Unclamped Inductive Waveforms
Fig 16a. Unclamped Inductive Test Circuit
VDS
VGS
RG
RD
VDS
90%
D.U.T.
+
- V DD
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
10%
VGS
td(on)
Fig 17a. Switching Time Test Circuit
6
tr
t d(off) tf
Fig 17b. Switching Time Waveforms
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IRF6727MPbF
Driver Gate Drive
D.U.T
ƒ
+
‚
RG
*
•
•
•
•
„
P.W.
Period
***
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D=
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-

P.W.
+
V DD
**
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
* Use P-Channel Driver for P-Channel Measurements
** Reverse Polarity for P-Channel
ISD
*** VGS = 5V for Logic Level Devices
Fig 18. Diode Reverse Recovery Test Circuit for HEXFET® Power MOSFETs
DirectFET™ Board Footprint, MX Outline
(Medium Size Can, X-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
G = GATE
D = DRAIN
S = SOURCE
D
D
S
G
S
D
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D
7
IRF6727MPbF
DirectFET™ Outline Dimension, MX Outline
(Medium Size Can, X-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes
all recommendations for stencil and substrate designs.
DIMENSIONS
METRIC
CODE
A
B
C
D
E
F
G
H
J
K
L
M
R
P
MIN
6.25
4.80
3.85
0.35
0.68
0.68
1.38
0.80
0.38
0.88
2.28
0.616
0.020
0.08
MAX
6.35
5.05
3.95
0.45
0.72
0.72
1.42
0.84
0.42
1.01
2.41
0.676
0.080
0.17
IMPERIAL
MIN
0.246
0.189
0.152
0.014
0.027
0.027
0.054
0.032
0.015
0.035
0.090
0.0235
0.0008
0.003
MAX
0.250
0.201
0.156
0.018
0.028
0.028
0.056
0.033
0.017
0.039
0.095
0.0274
0.0031
0.007
DirectFET™ Part Marking
GATE MARKING
LOGO
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
8
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IRF6727MPbF
DirectFET™ Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF6727MTRPBF). For 1000 parts on 7"
reel, order IRF6727MTR1PBF
REEL DIMENSIONS
STANDARD OPTION (QTY 4800)
TR1 OPTION (QTY 1000)
IMPERIAL
IMPERIAL
METRIC
METRIC
MIN
MIN
MAX
MAX
MIN
CODE
MIN
MAX
MAX
12.992
A
6.9
N.C
N.C
N.C
177.77 N.C
330.0
0.795
B
0.75
N.C
N.C
19.06
20.2
N.C
N.C
0.504
C
0.53
13.5
12.8
0.50
0.520
13.2
12.8
0.059
D
0.059
N.C
N.C
1.5
1.5
N.C
N.C
3.937
E
2.31
58.72
100.0
N.C
N.C
N.C
N.C
F
N.C
N.C
0.53
0.724
N.C
N.C
18.4
13.50
0.488
G
0.47
11.9
12.4
N.C
0.567
14.4
12.01
0.469
H
0.47
11.9
11.9
0.606
N.C
15.4
12.01
LOADED TAPE FEED DIRECTION
NOTE: CONTROLLING
DIMENSIONS IN MM
CODE
A
B
C
D
E
F
G
H
DIMENSIONS
METRIC
IMPERIAL
MAX
MIN
MIN
MAX
0.311
0.319
7.90
8.10
0.154
0.161
3.90
4.10
0.469
0.484
11.90
12.30
0.215
0.219
5.45
5.55
0.201
0.209
5.10
5.30
0.256
0.264
6.50
6.70
0.059
N.C
1.50
N.C
0.059
1.50
0.063
1.60
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.08/2007
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9
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