IRF IRF7306 Hexfet power mosfet Datasheet

PD - 9.1241C
IRF7306
HEXFET® Power MOSFET
l
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Generation V Technology
Ultra Low On-Resistance
Dual P-Channel Mosfet
Surface Mount
Available in Tape & Reel
Dynamic dv/dt Rating
Fast Switching
S1
G1
S2
G2
Description
1
8
2
7
3
6
4
5
D1
VDSS = -30V
D1
D2
D2
RDS(on) = 0.10Ω
To p V ie w
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient device for use in a wide
variety of applications.
The SO-8 has been modified through a customized
leadframe for enhanced thermal characteristics and
multiple-die capability making it ideal in a variety of
power applications. With these improvements, multiple
devices can be used in an application with dramatically
reduced board space. The package is designed for
vapor phase, infra red, or wave soldering techniques.
Power dissipation of greater than 0.8W is possible in
a typical PCB mount application.
S O -8
Absolute Maximum Ratings
Parameter
I D @ TA = 25°C
I D @ TA = 25°C
I D @ TA = 70°C
I DM
PD @TA = 25°C
VGS
dv/dt
TJ, TSTG
Max.
10 Sec. Pulsed Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ -10V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt ‚
Junction and Storage Temperature Range
Units
-4.0
-3.6
-2.9
-14
2.0
0.016
±20
-5.0
-55 to + 150
A
W
W/°C
V
V/ns
°C
Thermal Resistance Ratings
Parameter
RθJA
Maximum Junction-to-Ambient„
Typ.
Max.
Units
–––
62.5
°C/W
8/25/97
IRF7306
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Qg
Q gs
Q gd
t d(on)
tr
t d(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
-30
–––
–––
–––
-1.0
2.5
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
RDS(ON)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
V(BR)DSS
I GSS
Typ. Max. Units
Conditions
––– –––
V
VGS = 0V, ID = -250µA
-0.037 ––– V/°C Reference to 25°C, I D = -1mA
––– 0.10
VGS = -10V, ID = -1.8A ƒ
Ω
––– 0.16
VGS = -4.5V, ID = -1.5A ƒ
––– –––
V
VDS = VGS, ID = -250µA
––– –––
S
VDS = -24V, I D = -1.8A
––– -1.0
VDS = -24V, VGS = 0V
µA
––– -25
VDS = -24V, VGS = 0V, TJ = 125°C
––– -100
V GS = -20V
nA
––– 100
VGS = 20V
––– 25
ID = -1.8A
––– 2.9
nC VDS = -24V
––– 9.0
VGS = -10V, See Fig. 6 and 12 ƒ
11 –––
VDD = -15V
17 –––
I D = -1.8A
ns
25 –––
RG = 6.0Ω
18 –––
RD = 8.2Ω, See Fig. 10 ƒ
D
4.0
–––
LS
Internal Source Inductance
–––
6.0
–––
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
440
200
93
–––
–––
–––
nH
Between lead tip
and center of die contact
pF
VGS = 0V
VDS = -25V
ƒ = 1.0MHz, See Fig. 5
G
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD
t rr
Q rr
t on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– -2.5
showing the
A
G
integral reverse
––– ––– -14
p-n junction diode.
S
––– ––– -1.0
V
TJ = 25°C, IS = -1.8A, VGS = 0V ƒ
––– 53
80
ns
TJ = 25°C, IF = -1.8A
––– 66
99
µC di/dt = 100A/µs ƒ
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
‚ ISD ≤ -1.8A, di/dt ≤ 90A/µs, VDD ≤ V(BR)DSS,
TJ ≤150°C
ƒ Pulse width ≤ 300µs; duty cycle ≤ 2%.
„ Surface mounted on FR-4 board, t ≤ 10sec.
IRF7306
100
100
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTT OM - 4. 5V
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTT OM - 4.5V
TOP
10
-I D , D ra i n -to -S o u rc e C u rre n t (A )
-ID , D ra in -to -S o u rc e C u rre n t (A )
TOP
-4 .5V
20 µs P U LSE W IDTH
TJ = 25 °C
A
1
0.1
1
10
10
-4.5 V
2 0µ s PU L SE W ID TH
T J = 1 50 °C
1
100
0.1
1
-VD S , Drain-to-Source Voltage (V)
Fig 2. Typical Output Characteristics
R D S (o n ) , Drain-to-S ource On Resistance
(N ormalized)
-I D , D ra in-to -S ou rce C urr ent ( A )
100
TJ = 2 5 °C
T J = 1 5 0 °C
10
V D S = - 15 V
2 0 µ s P U L S E W ID TH
4
5
6
7
8
9
-V G S , G ate-to-S o urce V oltage ( V )
Fig 3. Typical Transfer Characteristics
A
100
-V D S , Drain-to-Source V oltage (V )
Fig 1. Typical Output Characteristics
1
10
10
A
2.0
I D = -3 .0A
1.5
1.0
0.5
VG S = -10V
0.0
-60
-40
-20
0
20
40
60
80
A
100 120 140 160
T J , Junction T emperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRF7306
1000
600
-VG S , G a te -to -S o u rc e V o lta g e (V )
800
C, C apacitance (pF)
20
V G S = 0 V,
f = 1MH z
C iss = C g s + C gd , C ds SH O R TED
C rs s = C gd
C os s = C ds + C g d
C iss
C o ss
400
C rss
200
0
10
16
12
8
4
FOR TE ST C IR C U IT
S EE FIG U R E 12
0
A
1
ID = -3.0 A
VDS = -24 V
100
0
-V D S , Drain-to-S ource V oltage (V )
10
15
20
A
25
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
-II D , Drain Current (A)
-IS D , Reverse Drain Current (A)
5
10
TJ = 1 50 °C
TJ = 25°C
1
VG S = 0 V
0.1
0.0
0.3
0.6
0.9
1.2
-VS D , Source-to-D rain V oltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
A
1.5
100us
10
1ms
TC = 25 °C
TJ = 150 ° C
Single Pulse
1
1
10ms
10
100
-VDS, Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
IRF7306
4.0
VDS
-I D , Drain Current (A)
VGS
3.0
RD
D.U.T.
RG
+
VDD
-10 V
2.0
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
1.0
VDS
90%
0.0
25
50
75
100
T C , Case Temperature
125
150
( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Ambient Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
(Z thJA )
100
D = 0.50
0.20
10
Thermal Response
0.10
0.05
0.02
1
PDM
0.01
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D = t1 / t 2
2. Peak T J = P DM x Z thJA + TA
0.1
0.0001
0.001
0.01
0.1
1
10
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
100
IRF7306
Current Regulator
Same Type as D.U.T.
50KΩ
QG
-10 V
QGS
.2µF
12V
.3µF
QGD
D.U.T.
+VDS
VGS
VG
-3mA
Charge
Fig 12a. Basic Gate Charge Waveform
IG
ID
Current Sampling Resistors
Fig 12b. Gate Charge Test Circuit
IRF7306
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
ƒ
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
‚
-
-
„
+
**

• dv/dt controlled by RG
• I SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
RG
VGS*
+
-
*
VDD
*
Reverse Polarity for P-Channel
** Use P-Channel Driver for P-Channel Measurements
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[ VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 13. For P-Channel HEXFETS
[ISD ]
IRF7306
Package Outline
SO-8 Outline
Dimensions are shown in millimeters (inches)
DIM
D
-B-
5
E
-A-
5
8
7
6
5
1
2
3
4
e
6X
H
0.25 (.010)
M
A M
A
-C-
0.10 (.004)
A1
B 8X
0.25 (.010)
L
8X
6
C
8X
MAX
.0688
1.35
1.75
A1
.0040
.0098
0.10
0.25
B
.014
.018
0.36
0.46
C
.0075
.0098
0.19
0.25
D
.189
.196
4.80
4.98
E
.150
.157
3.81
3.99
.050 BASIC
1.27 BASIC
.025 BASIC
0.635 BASIC
H
.2284
.2440
5.80
K
.011
.019
0.28
0.48
L
0.16
.050
0.41
1.27
8°
0°
8°
θ
M C A S B S
MIN
.0532
e1
θ
MILLIMETERS
MAX
A
e
K x 45°
e1
INCHES
MIN
0°
6.20
RECOMMENDED FOOTPRINT
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M-1982.
2. CONTROLLING DIMENSION : INCH.
3. DIMENSIONS ARE SHOWN IN MILLIMETERS (INCHES).
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS
MOLD PROTRUSIONS NOT TO EXCEED 0.25 (.006).
6 DIMENSIONS IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE..
0.72 (.028 )
8X
6.46 ( .255 )
1.78 (.070)
8X
1.27 ( .050 )
3X
Part Marking Information
SO-8
E X A M P LE : T H IS IS A N IR F 7101
312
IN T E R N A T IO N A L
R E C T IF I E R
LO G O
D A TE C O DE (Y W W )
Y = L A S T D IG IT O F T H E Y E A R
W W = W EEK
XX X X
F 7 101
TOP
P A R T N UM B E R
W AFER
LO T C O D E
(L A S T 4 D IG IT S )
B O T TO M
IRF7306
Tape & Reel Information
SO-8
Dimensions are shown in millimeters (inches)
2 .05 (.080)
1 .95 (.077)
T ERM IN ATIO N
N UM BE R 1
1.85 (.072)
4.10 ( .161 )
1.65 (.065)
3.90 ( .154 )
1.60 (.062)
1.50 (.059)
0.35 (.013)
0.25 (.010)
5.55 (.218)
5.45 (.215)
1
FE ED D IRE CTIO N
5.30 ( .208)
5.10 ( .201)
2.60 (.102)
1.50 (.059)
8.10 (.318)
7.90 (.311)
2.20 ( .08 6)
2.00 ( .07 9)
6.50 (.255)
6.30 (.248)
13.20 (.519)
12.80 (.504)
1 2.30 (.484)
1 1.70 (.461)
15.40 (.607)
11.90 (.469)
2
50.00
( 1.96 9)
M IN.
33 0.00
( 13.000)
M AX .
N O TES :
1 CO N FO RM S TO EIA -48 1-1
2 INC LUD ES FLA NG E D IST O RTIO N @ O U TER E DG E
3 DIM E NS IO NS M E AS URE D @ HUB
4 CO N TRO LLING DIM E NSIO N : M ETR IC
14.40 (.5 66)
12.40 (.4 48)
3
18.4 0 ( .7 24)
M AX 3
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
8/97
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