Vishay IRFB16N50KPBF Power mosfet Datasheet

IRFB16N50K, SiHFB16N50K
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Low Gate Charge Qg Results in Simple Drive
Requirement
500
RDS(on) (Ω)
VGS = 10 V
0.285
Qg (Max.) (nC)
89
Qgs (nC)
27
Qgd (nC)
43
Configuration
Available
RoHS*
• Improved Gate, Avalanche and Dynamic dV/dt COMPLIANT
Ruggedness
• Fully Characterized Capacitance and Avalanche Voltage
and Current
Single
• Low RDS(on)
D
• Lead (Pb)-free Available
TO-220
APPLICATIONS
G
• Switch Mode Power Supply (SMPS)
• Uninterruptible Power Supply
S
G
D
• High Speed Power Switching
S
N-Channel MOSFET
• Hard Switched and High Frequency Circuits
ORDERING INFORMATION
Package
TO-220
IRFB16N50KPbF
SiHFB16N50K-E3
IRFB16N50K
SiHFB16N50K
Lead (Pb)-free
SnPb
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
VDS
VGS
500
± 30
17
11
68
2.3
310
17
28
280
11
- 55 to + 150
300d
10
1.1
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
VGS at 10 V
Pulsed Drain Currenta
Linear Derating Factor
Single Pulse Avalanche Energyb
Repetitive Avalanche Currenta
Repetitive Avalanche Energya
Maximum Power Dissipation
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque
TC = 25 °C
TC = 100 °C
ID
IDM
TC = 25 °C
EAS
IAR
EAR
PD
dV/dt
TJ, Tstg
for 10 s
6-32 or M3 screw
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
lbf · in
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature.
b. Starting TJ = 25 °C, L = 2.2 mH, RG = 25 Ω, IAS = 17 A.
c. ISD ≤ 17 A, dI/dt ≤ 500 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91096
S-80567-Rev. A, 20-Jun-08
WORK-IN-PROGRESS
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IRFB16N50K, SiHFB16N50K
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
62
Case-to-Sink, Flat, Greased Surface
RthCS
0.50
-
Maximum Junction-to-Case (Drain)
RthJC
-
0.44
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
VDS
VGS = 0 V, ID = 250 µA
500
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.58
-
V/°C
VGS(th)
VDS = VGS, ID = 250 µA
3.0
-
5.0
V
Gate-Source Leakage
IGSS
VGS = ± 30 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 500 V, VGS = 0 V
-
-
50
VDS = 400 V, VGS = 0 V, TJ = 125 °C
-
-
250
Drain-Source On-State Resistance
Forward Transconductance
RDS(on)
gfs
ID = 10 Ab
VGS = 10 V
VDS = 50 V, ID = 10 A
µA
-
0.285
0.350
Ω
5.7
-
-
S
-
2210
-
-
240
-
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Output Capacitance
Effective Output Capacitance
Coss
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz
VGS = 0 V
Coss eff.
Total Gate Charge
Qg
Gate-Source Charge
Qgs
VGS = 10 V
-
26
-
VDS = 1.0 V, f = 1.0 MHz
-
2620
-
VDS = 400 V, f = 1.0 MHz
-
63
-
VDS = 0 V to 400 Vc
-
120
-
-
60
89
ID = 17 A, VDS = 400 Vb
-
18
27
Gate-Drain Charge
Qgd
-
28
43
Turn-On Delay Time
td(on)
-
20
-
-
77
-
-
38
-
-
30
-
-
-
17
-
-
68
Rise Time
Turn-Off Delay Time
Fall Time
tr
td(off)
VDD = 250 V, ID = 17 A,
RG = 8.8 Ω, VGS = 10 Vb
tf
pF
nC
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
S
TJ = 25 °C, IS = 17 A, VGS = 0 Vb
TJ = 25 °C, IF = 17 A, dI/dt = 100 A/µsb
-
-
1.5
V
-
490
730
ns
-
5710
8560
nC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS.
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Document Number: 91096
S-80567-Rev. A, 20-Jun-08
IRFB16N50K, SiHFB16N50K
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
100
100
10
BOTTOM
1
ID, Drain-to-Source Current (Α )
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.5V
7.0V
6.5V
6.0V
5.5V
5.5V
0.1
1
10
10
T J = 25°C
VDS = 100V
60µs PULSE WIDTH
60µs PULSE WIDTH
Tj = 25°C
0.1
T J = 150°C
1.0
4
100
V DS, Drain-to-Source Voltage (V)
6
7
8
9 10 11 12 13 14 15 16
VGS, Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
Fig. 1 - Typical Output Characteristics
100
3.0
10
BOTTOM
VGS
15V
10V
8.0V
7.5V
7.0V
6.5V
6.0V
5.5V
RDS(on) , Drain-to-Source On Resistance
(Normalized)
TOP
ID, Drain-to-Source Current (A)
5
5.5V
1
60µs PULSE WIDTH
Tj = 150°C
0.1
2.5
ID = 17A
VGS = 10V
2.0
1.5
1.0
0.5
0.0
0.1
1
10
100
-60 -40 -20
0
20
40
60
80 100 120 140 160
V DS, Drain-to-Source Voltage (V)
T J , Junction Temperature (°C)
Fig. 2 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91096
S-80567-Rev. A, 20-Jun-08
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IRFB16N50K, SiHFB16N50K
Vishay Siliconix
100000
ISD, Reverse Drain Current (A)
Crss = C gd
Coss = C ds + C gd
10000
C, Capacitance(pF)
100.00
VGS = 0V,
f = 1 MHZ
Ciss = C gs + C gd, C ds SHORTED
Ciss
1000
Coss
100
Crss
10
T J = 150°C
10.00
T J = 25°C
1.00
VGS = 0V
0.10
1
1
10
100
0.2
1000
0.6
0.8
1.0
1.2
1.4
1.6
VSD, Source-to-Drain Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
1000
12.0
ID= 17A
VDS= 400V
VDS= 250V
VDS= 100V
10.0
ID, Drain-to-Source Current (A)
VGS, Gate-to-Source Voltage (V)
0.4
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
8.0
6.0
4.0
2.0
10
100µsec
1msec
1
Tc = 25°C
Tj = 150°C
Single Pulse
10msec
0.1
0.0
0
10
20
30
40
50
60
QG Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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1
10
100
1000
10000
VDS, Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
Document Number: 91096
S-80567-Rev. A, 20-Jun-08
IRFB16N50K, SiHFB16N50K
Vishay Siliconix
RD
20
VDS
VGS
15
ID, Drain Current (A)
D.U.T.
RG
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
10
Fig. 10a - Switching Time Test Circuit
5
VDS
90 %
0
25
50
75
100
125
150
10 %
VGS
T C , Case Temperature (°C)
td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
Thermal Response ( Z thJC )
1
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS
15 V
tp
L
VDS
D.U.T.
RG
IAS
20 V
tp
Driver
+
- VDD
IAS
0.01 Ω
Fig. 12a - Unclamped Inductive Test Circuit
Document Number: 91096
S-80567-Rev. A, 20-Jun-08
A
Fig. 12b - Unclamped Inductive Waveforms
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IRFB16N50K, SiHFB16N50K
Vishay Siliconix
EAS , Single Pulse Avalanche Energy (mJ)
600
ID
7.6A
11A
BOTTOM 17A
TOP
500
400
300
200
100
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
VGS
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
Document Number: 91096
S-80567-Rev. A, 20-Jun-08
IRFB16N50K, SiHFB16N50K
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
RG
•
•
•
•
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test
Driver gate drive
P.W.
+
Period
D=
+
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
VDD
Body diode forward drop
Inductor current
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?91096.
Document Number: 91096
S-80567-Rev. A, 20-Jun-08
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Disclaimer
All product specifications and data are subject to change without notice.
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(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
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therein, which apply to these products.
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Document Number: 91000
Revision: 18-Jul-08
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