VISHAY IRFP350LCPBF

IRFP350LC, SiHFP350LC
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
•
•
•
•
•
•
•
•
400
RDS(on) (Ω)
VGS = 10 V
0.30
Qg (Max.) (nC)
76
Qgs (nC)
20
Qgd (nC)
37
Configuration
Single
D
Available
RoHS*
COMPLIANT
DESCRIPTION
TO-247
This new series of low charge Power MOSFETs achieve
significantly lower gate charge over conventional MOSFETs.
Utilizing advanced MOSFETs technology the device
improvements allow for reduced gate drive requirements,
faster switching speeds and increased total system savings.
These device improvements combined with the proven
ruggedness and reliability of MOSFETs offer the designer a
new standard in power transistors for switching applications.
The TO-247 package is preferred for commercial-industrial
applications where higher power levels preclude the use of
TO-220 devices. The TO-247 is similar but superior to the
earlier TO-218 package because of its isolated mounting
hole.
G
S
D
G
Ultra Low Gate Charge
Reduced Gate Drive Requirement
Enhanced 30V VGS Rating
Reduced Ciss, Coss, Crss
Isolated Central Mounting Hole
Dynamic dV/dt Rated
Repetitive Avalanche Rated
Lead (Pb)-free Available
S
N-Channel MOSFET
ORDERING INFORMATION
Package
TO-247
IRFP350LCPbF
SiHFP350LC-E3
IRFP350LC
SiHFP350LC
Lead (Pb)-free
SnPb
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
SYMBOL
VDS
VGS
Continuous Drain Current
VGS at 10 V
Pulsed Drain Currenta
Linear Derating Factor
Single Pulse Avalanche Energyb
Repetitive Avalanche Currenta
Repetitive Avalanche Energya
Maximum Power Dissipation
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque
TC = 25 °C
TC = 100 °C
ID
IDM
TC = 25 °C
EAS
IAR
EAR
PD
dV/dt
TJ, Tstg
for 10 s
6-32 or M3 screw
LIMIT
400
± 30
16
9.9
64
1.5
390
16
19
190
4.0
- 55 to + 150
300d
10
1.1
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
lbf · in
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 25 V, starting TJ = 25 °C, L = 2.7 µH, RG = 25 Ω, IAS = 16 A (see fig. 12).
c. ISD ≤ 16 A, dI/dt ≤ 200 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91224
S-Pending-Rev. A, 16-Jun-08
WORK-IN-PROGRESS
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IRFP350LC, SiHFP350LC
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
40
Case-to-Sink, Flat, Greased Surface
RthCS
0.24
-
Maximum Junction-to-Case (Drain)
RthJC
-
0.65
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
VDS
VGS = 0 V, ID = 250 µA
400
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.49
-
V/°C
VGS(th)
VDS = VGS, ID = 250 µA
2.0
-
4.0
V
Gate-Source Leakage
IGSS
VGS = ± 20 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 400 V, VGS = 0 V
-
-
25
VDS = 320 V, VGS = 0 V, TJ = 125 °C
-
-
250
Gate-Source Threshold Voltage
µA
-
-
0.30
Ω
gfs
VDS = 50 V, ID = 19 Ab
8.1
-
-
S
Input Capacitance
Ciss
VGS = 0 V,
-
2200
-
Output Capacitance
Coss
VDS = 25 V,
-
390
-
Reverse Transfer Capacitance
Crss
f = 1.0 MHz, see fig. 5
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Turn-On Delay Time
td(on)
Drain-Source On-State Resistance
Forward Transconductance
RDS(on)
ID = 9.6 Ab
VGS = 10 V
Dynamic
Rise Time
Turn-Off Delay Time
Fall Time
ID = 16 A, VDS = 320 V
VGS = 10 V
see fig. 6 and 13b
-
31
-
-
-
76
-
-
20
-
-
37
-
14
-
pF
nC
tr
VDD = 200 V, ID = 16 A,
-
54
-
td(off)
RG = 6.2Ω, RD = 12 Ω, see fig. 10b
-
33
-
-
35
-
-
-
16
S
-
-
64
Vb
-
-
1.6
-
440
660
ns
-
4.1
6.2
µC
tf
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = 16 A, VGS = 0
TJ = 25 °C, IF = 16 A, dI/dt = 100 A/µsb
V
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
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Document Number: 91224
S-Pending-Rev. A, 16-Jun-08
IRFP350LC, SiHFP350LC
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Document Number: 91224
S-Pending-Rev. A, 16-Jun-08
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRFP350LC, SiHFP350LC
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
Document Number: 91224
S-Pending-Rev. A, 16-Jun-08
IRFP350LC, SiHFP350LC
Vishay Siliconix
RD
VDS
VGS
D.U.T.
RG
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
VDS
90 %
10 %
VGS
td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS
L
Vary tp to obtain
required IAS
VDS
tp
VDD
D.U.T
RG
+
-
IAS
V DD
A
VDS
10 V
tp
0.01 Ω
Fig. 12a - Unclamped Inductive Test Circuit
Document Number: 91224
S-Pending-Rev. A, 16-Jun-08
IAS
Fig. 12b - Unclamped Inductive Waveforms
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IRFP350LC, SiHFP350LC
Vishay Siliconix
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
Document Number: 91224
S-Pending-Rev. A, 16-Jun-08
IRFP350LC, SiHFP350LC
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
RG
•
•
•
•
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test
Driver gate drive
P.W.
+
Period
D=
+
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
VDD
Body diode forward drop
Inductor current
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 14 - For N-Chsannel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?91224.
Document Number: 91224
S-Pending-Rev. A, 16-Jun-08
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Vishay
Disclaimer
All product specifications and data are subject to change without notice.
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(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
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document or by any conduct of Vishay.
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Document Number: 91000
Revision: 18-Jul-08
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