IRF IRFPS29N60L Smps mosfet Datasheet

PD - 94622A
SMPS MOSFET
IRFPS29N60L
HEXFET® Power MOSFET
Applications
• Zero Voltage Switching SMPS
VDSS RDS(on) typ. Trr typ. ID
• Telecom and Server Power Supplies
• Uninterruptible Power Supplies
175mΩ
600V
130ns 29A
• Motor Control applications
Features and Benefits
• SuperFast body diode eliminates the need for external
diodes in ZVS applications.
• Lower Gate charge results in simpler drive requirements.
• Enhanced dv/dt capabilities offer improved ruggedness.
• Higher Gate voltage threshold offers improved noise immunity .
Super-247™
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V
Max.
29
Units
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V
18
A
IDM
110
Pulsed Drain Current
PD @TC = 25°C Power Dissipation
c
VGS
Linear Derating Factor
Gate-to-Source Voltage
dv/dt
TJ
Peak Diode Recovery dv/dt
Operating Junction and
TSTG
Storage Temperature Range
e
480
W
3.8
±30
W/°C
V
15
-55 to + 150
V/ns
°C
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
Mounting torque, 6-32 or M3 screw
1.1(10)
N•m (lbf•in)
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
–––
–––
29
ISM
(Body Diode)
Pulsed Source Current
–––
–––
110
c
Conditions
MOSFET symbol
A
(Body Diode)
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 29A, VGS = 0V
VSD
Diode Forward Voltage
–––
–––
1.5
V
trr
Reverse Recovery Time
–––
130
190
–––
240
360
ns TJ = 25°C, IF = 29A
TJ = 125°C, di/dt = 100A/µs
–––
630
950
nC
Qrr
Reverse Recovery Charge
––– 1820 2720
IRRM
Reverse Recovery Current
ton
Forward Turn-On Time
www.irf.com
–––
9.4
14
f
f
T = 25°C, I = 29A, V = 0V f
T = 125°C, di/dt = 100A/µs f
J
S
GS
J
A
TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
1
8/26/04
IRFPS29N60L
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
V(BR)DSS
∆V(BR)DSS/∆TJ
Drain-to-Source Breakdown Voltage
RDS(on)
–––
V
Conditions
600
–––
VGS = 0V, ID = 250µA
Breakdown Voltage Temp. Coefficient
–––
0.53
–––
V/°C Reference to 25°C, ID = 1mA
Static Drain-to-Source On-Resistance
–––
175
210
mΩ
V
VGS = 10V, ID = 17A
f
VGS(th)
Gate Threshold Voltage
3.0
–––
IDSS
Drain-to-Source Leakage Current
–––
–––
50
µA
VDS = 600V, VGS = 0V
–––
–––
2.0
mA
VDS = 480V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage
–––
–––
100
nA
VGS = 30V
Gate-to-Source Reverse Leakage
–––
–––
-100
Internal Gate Resistance
–––
0.86
–––
Ω
f = 1MHz, open drain
IGSS
RG
5.0
VDS = VGS, ID = 250µA
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
gfs
Qg
Forward Transconductance
Qgs
Min. Typ. Max. Units
S
Conditions
15
–––
–––
VDS = 50V, ID = 17A
Total Gate Charge
–––
–––
220
Gate-to-Source Charge
–––
–––
67
Qgd
Gate-to-Drain ("Miller") Charge
–––
–––
96
td(on)
Turn-On Delay Time
–––
34
–––
tr
Rise Time
–––
100
–––
td(off)
Turn-Off Delay Time
–––
66
–––
RG = 4.3Ω
tf
Fall Time
–––
54
–––
VGS = 10V, See Fig. 11a & 11b
Ciss
Input Capacitance
–––
6160
–––
VGS = 0V
Coss
Output Capacitance
–––
530
–––
Crss
Reverse Transfer Capacitance
–––
44
–––
Coss eff.
Effective Output Capacitance
–––
250
–––
Coss eff. (ER)
Effective Output Capacitance
–––
190
–––
ID = 29A
nC
VDS = 480V
VGS = 10V, See Fig. 7 & 15
f
VDD = 300V
ns
ID = 29A
f
VDS = 25V
pF
ƒ = 1.0MHz, See Fig. 5
VGS = 0V,VDS = 0V to 480V
g
(Energy Related)
Avalanche Characteristics
Symbol
EAS
Parameter
Single Pulse Avalanche Energy
IAR
Avalanche Current
EAR
Repetitive Avalanche Energy
c
d
c
Typ.
–––
Max.
570
Units
mJ
–––
29
A
–––
48
mJ
Typ.
Max.
Units
–––
0.26
0.24
–––
–––
40
Thermal Resistance
Symbol
Parameter
h
RθJC
Junction-to-Case
RθCS
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
RθJA
h
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. (See Fig. 11)
‚ Starting TJ = 25°C, L = 1.5mH, RG = 25Ω,
IAS = 29A. (See Figure 12a)
ƒ ISD ≤ 29A, di/dt ≤ 830A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C.
2
°C/W
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff.(ER) is a fixed capacitance that stores the same energy
as Coss while VDS is rising from 0 to 80% VDSS.
† Rθ is measured at TJ approximately 90°C
www.irf.com
IRFPS29N60L
1000
100
BOTTOM
10
100
20µs PULSE WIDTH
Tj = 25°C
VGS
15V
10V
9.0V
7.0V
7.0V
5.5V
5.0V
4.5V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
1
0.1
10
BOTTOM
VGS
15V
10V
9.0V
7.0V
7.0V
5.5V
5.0V
4.5V
4.5V
1
20µs PULSE WIDTH
Tj = 150°C
4.5V
0.01
0.1
0.1
1
10
100
0.1
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
10
100
Fig 2. Typical Output Characteristics
1000.00
3.0
100.00
T J = 150°C
10.00
T J = 25°C
1.00
0.10
VDS = 50V
20µs PULSE WIDTH
0.01
ID = 28A
2.5
VGS = 10V
2.0
(Normalized)
RDS(on) , Drain-to-Source On Resistance
ID, Drain-to-Source Current (Α)
1
VDS, Drain-to-Source Voltage (V)
1.5
1.0
0.5
0.0
4
6
8
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
www.irf.com
10
-60 -40 -20
0
20
40
60
80 100 120 140 160
T J , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
vs. Temperature
3
IRFPS29N60L
100000
35
Coss = Cds + Cgd
10000
30
Ciss
Energy (µJ)
C, Capacitance(pF)
40
VGS = 0V,
f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = Cgd
1000
Coss
100
25
20
15
10
Crss
5
10
0
1
10
100
1000
0
VDS, Drain-to-Source Voltage (V)
200
300
400
500
700
Fig 6. Typ. Output Capacitance
Stored Energy vs. VDS
1000.00
20
ID= 28A
ISD, Reverse Drain Current (A)
VDS= 480V
VDS= 300V
VDS= 150V
16
100.00
12
8
4
T J = 150°C
10.00
T J = 25°C
1.00
VGS = 0V
0
0
40
80
120
160
200
Q G Total Gate Charge (nC)
Fig 7. Typical Gate Charge vs.
Gate-to-Source Voltage
4
600
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
VGS , Gate-to-Source Voltage (V)
100
240
0.10
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
VSD, Source-to-Drain Voltage (V)
Fig 8. Typical Source-Drain Diode
Forward Voltage
www.irf.com
IRFPS29N60L
ID, Drain-to-Source Current (A)
1000
30
OPERATION IN THIS AREA
LIMITED BY R DS(on)
25
ID, Drain Current (A)
100
100µsec
10
1msec
1
Tc = 25°C
Tj = 150°C
Single Pulse
20
15
10
5
10msec
0.1
0
1
10
100
1000
10000
25
VDS, Drain-to-Source Voltage (V)
VGS
RG
RD
100
125
150
Fig 10. Maximum Drain Current vs.
Case Temperature
VDS
90%
D.U.T.
+
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 11a. Switching Time Test Circuit
www.irf.com
75
T C , Case Temperature (°C)
Fig 9. Maximum Safe Operating Area
VDS
50
10%
VGS
td(on)
tr
t d(off)
tf
Fig 11b. Switching Time Waveforms
5
IRFPS29N60L
Thermal Response ( Z thJC )
1
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 12. Maximum Effective Transient Thermal Impedance, Junction-to-Case
VGS(th) Gate threshold Voltage (V)
5.0
ID = 250µA
4.0
3.0
2.0
1.0
-75
-50
-25
0
25
50
75
100
125
150
T J , Temperature ( °C )
Fig 13. Threshold Voltage vs. Temperature
6
www.irf.com
1
IRFPS29N60L
EAS , Single Pulse Avalanche Energy (mJ)
1200
ID
TOP
13A
18A
BOTTOM 29A
1000
800
600
400
200
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 14a. Maximum Avalanche Energy
vs. Drain Current
15V
V(BR)DSS
DRIVER
L
VDS
D.U.T
RG
+
- VDD
IAS
20V
tp
tp
A
0.01Ω
I AS
Fig 14b. Unclamped Inductive Test Circuit
Fig 14c. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
QG
50KΩ
12V
VGS V
.2µF
.3µF
D.U.T.
QGS
+
V
- DS
QGD
VG
VGS
3mA
IG
ID
Current Sampling Resistors
Fig 15a. Gate Charge Test Circuit
www.irf.com
Charge
Fig 15b. Basic Gate Charge Waveform
7
IRFPS29N60L
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D.U.T
ƒ
+
‚
-
-
„
+

RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
Period
D=
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 16. For N-Channel HEXFET® Power MOSFETs
8
www.irf.com
IRFPS29N60L
Super-247™ (TO-274AA) Package Outline
0.13 [.005]
16.10 [.632]
15.10 [.595]
2X R 3.00 [.118]
2.00 [.079]
0.25 [.010]
5.50 [.216]
4.50 [.178]
A
B A
13.90 [.547]
13.30 [.524]
2.15 [.084]
1.45 [.058]
1.30 [.051]
0.70 [.028]
16.10 [.633]
15.50 [.611]
4
20.80 [.818]
19.80 [.780]
4
C
1
2
3
B
14.80 [.582]
13.80 [.544]
5.45 [.215]
2X
Ø 1.60 [.063]
MAX.
4.25 [.167]
3.85 [.152]
3X
1.60 [.062]
1.45 [.058]
0.25 [.010]
B A
3X
E
E
1.30 [.051]
1.10 [.044]
2.35 [.092]
1.65 [.065]
S ECT ION E-E
NOTES :
1. DIMENS IONING AND T OLERANCING PER AS ME Y14.5M-1994.
2. DIMENS IONS ARE S HOWN IN MILLIMET ERS [INCHES ]
3. CONT ROLLING DIMENS ION: MILLIMET ER
4. OUT LINE CONFORMS T O JEDEC OUTLINE T O-274AA
LEAD AS S IGNMENT S
MOS FET
1 - GAT E
2 - DRAIN
3 - S OURCE
4 - DRAIN
IGBT
1 - GAT E
2 - COLLECT OR
3 - EMITT ER
4 - COLLECT OR
Super-247™ (TO-274AA)Part Marking Information
EXAMPLE: THIS IS AN IRFPS37N50A WITH
ASSEMBLY LOT CODE A8B9
INTERNATIONAL RECTIFIER
LOGO
PART NUMBER
IRFPS37N50A
A8B9
0020
ASSEMBLY LOT CODE
TOP
DATE CODE
(YYWW)
YY = YEAR
WW = WEEK
Super TO-247™ package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.08/04
www.irf.com
9
Similar pages