IRF IRFS3207ZPBF Hexfet power mosfet Datasheet

PD - 97213
IRFB3207ZPbF
IRFS3207ZPbF
IRFSL3207ZPbF
Applications
l High Efficiency Synchronous Rectification in
SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
HEXFET® Power MOSFET
D
G
Benefits
l Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche SOA
l Enhanced body diode dV/dt and dI/dt
Capability
S
VDSS
RDS(on) typ.
max
ID
D
75V
3.3m:
4.1m:
170A
D
D
G
D
S
S
G
G
D2Pak
IRFS3207ZPbF
TO-220AB
IRFB3207ZPbF
D
S
TO-262
IRFSL3207ZPbF
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current d
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery f
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
Max.
Units
170c
120c
670
300
2.0
± 20
16
-55 to + 175
A
W
W/°C
V
V/ns
°C
300
10lbxin (1.1Nxm)
Avalanche Characteristics
EAS (Thermally limited)
IAR
EAR
Single Pulse Avalanche Energy e
Avalanche Currentc
Repetitive Avalanche Energy g
mJ
A
mJ
180
75
30
Thermal Resistance
Symbol
RθJC
RθCS
RθJA
RθJA
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Parameter
Junction-to-Case k
Case-to-Sink, Flat Greased Surface , TO-220
Junction-to-Ambient, TO-220 k
2
Junction-to-Ambient (PCB Mount) , D Pak jk
Typ.
Max.
–––
0.50
–––
–––
0.50
–––
62
40
Units
°C/W
1
05/29/06
IRFB/S/SL3207ZPbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
∆V(BR)DSS/∆TJ
RDS(on)
VGS(th)
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
RG(int)
IDSS
Internal Gate Resistance
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
75
–––
–––
2.0
–––
0.091
3.3
–––
–––
–––
4.1
4.0
–––
0.80
–––
–––
–––
–––
–––
20
250
100
-100
–––
–––
–––
–––
Conditions
V VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 5mAd
mΩ VGS = 10V, ID = 75A g
V VDS = VGS, ID = 150µA
Ω
µA
nA
VDS = 75V, VGS = 0V
VDS = 75V, VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss eff. (ER)
Coss eff. (TR)
Parameter
Min. Typ. Max. Units
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
280
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Effective Output Capacitance (Energy Related)i –––
–––
Effective Output Capacitance (Time Related)h
–––
120
27
33
87
20
68
55
68
6920
600
270
770
960
–––
170
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
nC
ns
pF
Conditions
VDS = 50V, ID = 75A
ID = 75A
VDS = 38V
VGS = 10V g
ID = 75A, VDS =0V, VGS = 10V
VDD = 49V
ID = 75A
RG = 2.7Ω
VGS = 10V g
VGS = 0V
VDS = 50V
ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 60V j
VGS = 0V, VDS = 0V to 60V h
Diode Characteristics
Symbol
IS
Parameter
Continuous Source Current
VSD
trr
(Body Diode)
Pulsed Source Current
(Body Diode)di
Diode Forward Voltage
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
ISM
Notes:
 Calculated continuous current based on maximum allowable junction
temperature. Package limitation current is 75A.
‚ Repetitive rating; pulse width limited by max. junction
temperature.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.065mH
RG = 25Ω, IAS = 75A, VGS =10V. Part not recommended for use
above this value.
„ ISD ≤ 75A, di/dt ≤ 1730A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
Min. Typ. Max. Units
–––
–––
––– 170c
–––
670
A
Conditions
MOSFET symbol
showing the
integral reverse
D
G
p-n junction diode.
TJ = 25°C, IS = 75A, VGS = 0V g
TJ = 25°C
VR = 64V,
TJ = 125°C
IF = 75A
di/dt = 100A/µs g
TJ = 25°C
S
––– –––
1.3
V
–––
36
54
ns
–––
41
62
–––
50
75
nC
TJ = 125°C
–––
67
100
–––
2.4
–––
A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
† Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
‰ Rθ is measured at TJ approximately 90°C.
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IRFB/S/SL3207ZPbF
1000
1000
BOTTOM
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
100
BOTTOM
4.5V
100
4.5V
≤60µs PULSE WIDTH
≤60µs PULSE WIDTH
Tj = 175°C
Tj = 25°C
10
10
0.1
1
10
100
0.1
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
100
2.5
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
10
Fig 2. Typical Output Characteristics
1000
T J = 175°C
T J = 25°C
10
1
VDS = 25V
≤60µs PULSE WIDTH
2
3
4
5
6
2.0
1.5
1.0
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
12.0
VGS = 0V,
f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = C gd
VGS, Gate-to-Source Voltage (V)
ID= 75A
Coss = Cds + Cgd
10000
VGS = 10V
7
VGS, Gate-to-Source Voltage (V)
100000
ID = 75A
0.5
0.1
C, Capacitance (pF)
1
V DS, Drain-to-Source Voltage (V)
Ciss
Coss
1000
Crss
10.0
VDS= 60V
VDS= 38V
VDS= 15V
8.0
6.0
4.0
2.0
0.0
100
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
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0
20
40
60
80
100
120
140
QG, Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
3
IRFB/S/SL3207ZPbF
10000
T J = 175°C
100
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
T J = 25°C
10
1
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
100µsec
100
1msec
10msec
10
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
0.1
0.1
0.0
0.5
1.0
1.5
2.0
1
2.5
Limited By Package
ID, Drain Current (A)
140
120
100
80
60
40
20
0
50
75
100
125
150
175
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
180
25
100
Id = 5mA
95
90
85
80
75
70
-60 -40 -20 0 20 40 60 80 100120140160180
T C , Case Temperature (°C)
T J , Temperature ( °C )
Fig 10. Drain-to-Source Breakdown Voltage
Fig 9. Maximum Drain Current vs. Case Temperature
2.5
EAS , Single Pulse Avalanche Energy (mJ)
800
2.0
Energy (µJ)
1.5
1.0
0.5
0.0
ID
16A
28A
BOTTOM 75A
700
TOP
600
500
400
300
200
100
0
-10
0
10
20
30
40
50
60
70
80
VDS, Drain-to-Source Voltage (V)
4
100
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode Forward Voltage
160
10
VDS, Drain-to-Source Voltage (V)
VSD, Source-to-Drain Voltage (V)
Fig 11. Typical COSS Stored Energy
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
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IRFB/S/SL3207ZPbF
Thermal Response ( Z thJC )
1
D = 0.50
0.20
0.1
0.10
0.05
τJ
0.02
0.01
0.01
R1
R1
τJ
τ1
R2
R2
τ2
τ1
τ2
R3
R3
τ3
τC
τ
τ3
Ci= τi/Ri
Ci τi/Ri
1E-005
0.2469
0.001345
0.1484
0.008469
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
Ri (°C/W) τi (sec)
0.1049 0.000099
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆ Tj = 150°C and
Tstart =25°C (Single Pulse)
0.01
Duty Cycle =
Single Pulse
Avalanche Current (A)
0.05
10
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
200
EAR , Avalanche Energy (mJ)
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 75A
180
160
140
120
100
80
60
40
20
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 15. Maximum Avalanche Energy vs. Temperature
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5
IRFB/S/SL3207ZPbF
20
IF = 30A
V R = 64V
4.0
TJ = 25°C
TJ = 125°C
15
3.5
3.0
IRR (A)
VGS(th) , Gate threshold Voltage (V)
4.5
2.5
ID = 150µA
2.0
10
ID = 250µA
1.5
5
ID = 1.0mA
ID = 1.0A
1.0
0
0.5
-75 -50 -25 0
0
25 50 75 100 125 150 175 200
200
600
800
1000
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
20
340
IF = 45A
V R = 64V
IF = 30A
V R = 64V
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
260
QRR (A)
15
IRR (A)
400
diF /dt (A/µs)
T J , Temperature ( °C )
10
5
180
100
0
20
0
200
400
600
800
1000
0
200
diF /dt (A/µs)
400
600
800
1000
diF /dt (A/µs)
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
340
IF = 45A
V R = 64V
TJ = 25°C
TJ = 125°C
QRR (A)
260
180
100
20
0
200
400
600
800
1000
diF /dt (A/µs)
6
Fig. 20 - Typical Stored Charge vs. dif/dt
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IRFB/S/SL3207ZPbF
D.U.T
Driver Gate Drive
ƒ
-
‚
„
-
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
RG
+
V
- DD
IAS
VGS
20V
tp
A
0.01Ω
I AS
Fig 21a. Unclamped Inductive Test Circuit
LD
Fig 21b. Unclamped Inductive Waveforms
VDS
VDS
90%
+
VDD -
10%
D.U.T
VGS
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
td(on)
Fig 22a. Switching Time Test Circuit
tr
td(off)
tf
Fig 22b. Switching Time Waveforms
Id
Vds
Vgs
L
DUT
0
VCC
Vgs(th)
1K
Qgs1 Qgs2
Fig 23a. Gate Charge Test Circuit
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Qgd
Qgodr
Fig 23b. Gate Charge Waveform
7
IRFB/S/SL3207ZPbF
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
(;$03/( 7+,6,6$1,5)
/27&2'(
$66(0%/('21::
,17+($66(0%/</,1(&
Note: "P" in assembly line
position indicates "Lead-Free"
,17(51$7,21$/
5(&7,),(5
/2*2
$66(0%/<
/27&2'(
3$57180%(5
'$7(&2'(
<($5 :((.
/,1(&
TO-220AB packages are not recommended for Surface Mount Application.
8
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IRFB/S/SL3207ZPbF
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
D2Pak (TO-263AB) Part Marking Information
7+,6,6$1,5)6:,7+
/27&2'(
$66(0%/('21::
,17+($66(0%/</,1(/
,17(51$7,21$/
5(&7,),(5
/2*2
$66(0%/<
/27&2'(
3$57180%(5
)6
'$7(&2'(
<($5 :((.
/,1(/
25
,17(51$7,21$/
5(&7,),(5
/2*2
$66(0%/<
/27&2'(
www.irf.com
3$57180%(5
)6
'$7(&2'(
3 '(6,*1$7(6/($')5((
352'8&7 237,21$/
<($5 :((.
$ $66(0%/<6,7(&2'(
9
IRFB/S/SL3207ZPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
(;$03/( 7+,6,6$1,5//
/27&2'(
$66(0%/('21::
,17+($66(0%/</,1(&
,17(51$7,21$/
5(&7,),(5
/2*2
$66(0%/<
/27&2'(
3$57180%(5
'$7(&2'(
<($5 :((.
/,1(&
25
,17(51$7,21$/
5(&7,),(5
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$66(0%/<
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10
3$57180%(5
'$7(&2'(
3 '(6,*1$7(6/($')5((
352'8&7 237,21$/
<($5 :((.
$ $66(0%/<6,7(&2'(
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IRFB/S/SL3207ZPbF
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
1.65 (.065)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
www.irf.com
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 04/06
11
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