IRF IRLR2905ZTRPBF Logic level Datasheet

PD - 95774B
IRLR2905ZPbF
IRLU2905ZPbF
HEXFET® Power MOSFET
Features
l
l
l
l
l
l
l
Logic Level
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free
D
VDSS = 55V
RDS(on) = 13.5mΩ
G
ID = 42A
S
Description
This HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low onresistance per silicon area. Additional features of
this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating These features combine
to make this design an extremely efficient and
reliable device for use in a wide variety of applications.
I-Pak
D-Pak
IRLR2905ZPbF IRLU2905ZPbF
Absolute Maximum Ratings
Parameter
Max.
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V
60
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
IDM
42
c
VGS
EAS (Thermally limited)
EAS (Tested )
Single Pulse Avalanche Energy Tested Value
IAR
Avalanche Current
EAR
Repetitive Avalanche Energy
TJ
Operating Junction and
TSTG
Storage Temperature Range
c
d
240
h
Junction-to-Ambient (PCB mount)
Junction-to-Ambient
j
A
°C
Parameter
RθJA
mJ
85
300 (1.6mm from case )
y
ij
y
10 lbf in (1.1N m)
Thermal Resistance
RθJA
57
-55 to + 175
Mounting Torque, 6-32 or M3 screw
j
W
W/°C
V
mJ
Soldering Temperature, for 10 seconds
Junction-to-Case
110
0.72
± 16
See Fig.12a, 12b, 15, 16
g
RθJC
A
43
PD @TC = 25°C Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Units
Typ.
Max.
–––
1.38
–––
40
–––
110
Units
°C/W
HEXFET® is a registered trademark of International Rectifier.
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1
10/1/10
IRLR/U2905ZPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
55
–––
∆V(BR)DSS/∆TJ
Breakdown Voltage Temp. Coefficient
–––
0.053
–––
RDS(on)
Static Drain-to-Source On-Resistance
–––
11
13.5
–––
–––
20
–––
–––
22.5
mΩ
1.0
–––
3.0
V
VDS = VGS, ID = 250µA
VDS = 25V, ID = 36A
–––
V
V/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 36A
mΩ VGS = 5.0V, ID = 30A
VGS(th)
Gate Threshold Voltage
gfs
IDSS
Forward Transconductance
25
–––
–––
S
Drain-to-Source Leakage Current
–––
–––
20
µA
–––
–––
250
Gate-to-Source Forward Leakage
–––
–––
200
Gate-to-Source Reverse Leakage
–––
–––
-200
IGSS
VGS = 0V, ID = 250µA
VGS = 4.5V, ID
e
e
= 15A e
VDS = 55V, VGS = 0V
VDS = 55V, VGS = 0V, TJ = 125°C
nA
VGS = 16V
VGS = -16V
Qg
Total Gate Charge
–––
23
35
Qgs
Gate-to-Source Charge
–––
8.5
–––
Qgd
Gate-to-Drain ("Miller") Charge
–––
12
–––
VGS = 5.0V
td(on)
Turn-On Delay Time
–––
14
–––
VDD = 28V
tr
Rise Time
–––
130
–––
td(off)
Turn-Off Delay Time
–––
24
–––
tf
Fall Time
–––
33
–––
VGS = 5.0V
LD
Internal Drain Inductance
–––
4.5
–––
Between lead,
LS
Internal Source Inductance
–––
7.5
–––
6mm (0.25in.)
from package
and center of die contact
VGS = 0V
ID = 36A
nC
VDS = 44V
e
ID = 36A
ns
nH
RG = 15 Ω
e
D
G
S
Ciss
Input Capacitance
–––
1570
–––
Coss
Output Capacitance
–––
230
–––
Crss
Reverse Transfer Capacitance
–––
130
–––
Coss
840
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VDS = 25V
pF
ƒ = 1.0MHz
Output Capacitance
–––
Coss
Output Capacitance
–––
180
–––
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
Coss eff.
Effective Output Capacitance
–––
290
–––
VGS = 0V, VDS = 0V to 44V
f
Source-Drain Ratings and Characteristics
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
–––
–––
42
ISM
(Body Diode)
Pulsed Source Current
–––
–––
240
VSD
(Body Diode)
Diode Forward Voltage
–––
–––
1.3
trr
Reverse Recovery Time
–––
22
33
ns
Qrr
Reverse Recovery Charge
–––
14
21
nC
ton
Forward Turn-On Time
2
c
Conditions
MOSFET symbol
A
V
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 36A, VGS = 0V
TJ = 25°C, IF = 36A, VDD = 28V
di/dt = 100A/µs
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRLR/U2905ZPbF
1000
1000
ID, Drain-to-Source Current (A)
TOP
100
BOTTOM
10
3.0V
1
0.1
≤ 60µs PULSE WIDTH
Tj = 25°C
TOP
ID, Drain-to-Source Current (A)
VGS
10V
9.0V
7.0V
5.0V
4.5V
4.0V
3.5V
3.0V
100
BOTTOM
10
3.0V
≤ 60µs PULSE WIDTH
Tj = 175°C
1
1
10
100
0.1
VDS, Drain-to-Source Voltage (V)
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
60
T J = 25°C
100.0
T J = 175°C
10.0
VDS = 10V
≤ 60µs PULSE WIDTH
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10.0
Gfs, Forward Transconductance (S)
1000.0
ID, Drain-to-Source Current (Α)
VGS
10V
9.0V
7.0V
5.0V
4.5V
4.0V
3.5V
3.0V
T J = 175°C
50
40
T J = 25°C
30
20
10
VDS = 8.0V
380µs PULSE WIDTH
0
0
10
20
30
40
50
ID, Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
Vs. Drain Current
3
IRLR/U2905ZPbF
2500
VGS, Gate-to-Source Voltage (V)
2000
C, Capacitance (pF)
12
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
Ciss
1500
1000
500
Coss
Crss
VDS= 44V
VDS= 28V
VDS= 11V
10
8
6
4
2
0
0
1
ID= 36A
10
0
100
30
40
50
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000.0
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
20
QG Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
100.0
T J = 175°C
10.0
T J = 25°C
1.0
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
10
100µsec
1msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
10msec
0.1
0.1
0.2
0.6
1.0
1.4
1.8
VSD, Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
10
2.2
1
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRLR/U2905ZPbF
60
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
LIMITED BY PACKAGE
ID , Drain Current (A)
50
40
30
20
10
0
25
50
75
100
125
150
175
ID = 30A
VGS = 5.0V
1.5
1.0
0.5
-60 -40 -20
T C , Case Temperature (°C)
0
20 40 60 80 100 120 140 160 180
T J , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
Vs. Temperature
Fig 9. Maximum Drain Current Vs.
Case Temperature
Thermal Response ( Z thJC )
10
1
D = 0.50
0.20
0.10
0.1
0.05
τJ
0.02
0.01
R1
R1
τJ
τ1
R2
R2
τC
τ1
τ2
τ
Ri (°C/W) τi (sec)
0.765
0.000269
0.6141
τ2
0.001614
Ci= τi/Ri
Ci i/Ri
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRLR/U2905ZPbF
DRIVER
L
VDS
D.U.T
RG
20V
VGS
+
V
- DD
IAS
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS, Single Pulse Avalanche Energy (mJ)
240
15V
ID
36A
6.2A
BOTTOM 4.3A
TOP
200
160
120
80
40
0
25
50
75
100
125
150
175
Starting T J, Junction Temperature (°C)
I AS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
QGS
QGD
3.0
VG
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
.3µF
D.U.T.
+
V
- DS
VGS(th) Gate threshold Voltage (V)
10 V
2.5
ID = 250µA
2.0
1.5
1.0
-75 -50 -25
VGS
0
25
50
75
100 125 150 175
T J , Temperature ( °C )
3mA
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
Fig 14. Threshold Voltage Vs. Temperature
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IRLR/U2905ZPbF
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
100
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆ Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
10
0.05
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
60
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 36A
50
40
30
20
10
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
Vs. Temperature
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
175
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav ) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
7
IRLR/U2905ZPbF
D.U.T
Driver Gate Drive
ƒ
+
‚
„
•
•
•
•
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
*

RG
D=
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
Period
P.W.
+
VDD
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V DS
VGS
RG
RD
D.U.T.
+
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on)
tr
t d(off)
tf
Fig 18b. Switching Time Waveforms
8
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IRLR/U2905ZPbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFR120
WIT H AS SEMBLY
LOT CODE 1234
AS SEMBLED ON WW 16, 2001
IN T HE ASS EMBLY LINE "A"
PART NUMBER
INT ERNAT IONAL
RECT IFIER
LOGO
Note: "P" in assembly line position
indicates "Lead-Free"
IRF R120
116A
12
34
ASS EMBLY
LOT CODE
DAT E CODE
YEAR 1 = 2001
WEEK 16
LINE A
"P" in assembly line position indicates
"Lead-Free" qualification to the consumer-level
OR
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBER
IRF R120
12
ASS EMBLY
LOT CODE
34
DAT E CODE
P = DES IGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
P = DES IGNAT ES LEAD-FREE
PRODUCT QUALIFIED T O T HE
CONSUMER LEVEL (OPT IONAL)
YEAR 1 = 2001
WEEK 16
A = AS SEMBLY SIT E CODE
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
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9
IRLR/U2905ZPbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
EXAMPLE : T HIS IS AN IRF U120
WIT H ASS EMBLY
LOT CODE 5678
ASS EMBLED ON WW 19, 2001
IN T HE AS SEMBLY LINE "A"
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBER
IRF U120
119A
56
78
ASS EMBLY
LOT CODE
Note: "P" in as s embly line pos ition
indicates Lead-Free"
DAT E CODE
YEAR 1 = 2001
WEE K 19
LINE A
OR
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBE R
IRFU120
56
ASS EMBLY
LOT CODE
78
DAT E CODE
P = DES IGNAT E S LEAD-F REE
PRODUCT (OPT IONAL)
YEAR 1 = 2001
WEE K 19
A = ASSEMBLY S ITE CODE
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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IRLR/U2905ZPbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
„ Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
max. junction temperature. (See fig. 11).
‚ Limited by TJmax, starting TJ = 25°C, L = 0.089mH
Limited by T Jmax , see Fig.12a, 12b, 15, 16 for typical repetitive
RG = 25Ω, IAS = 36A, VGS =10V. Part not
avalanche performance.
recommended for use above this value.
† This value determined from sample failure population. 100%
ƒ Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
tested to this value in production.
‡ When mounted on 1" square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to
application note #AN-994
ˆ Rθ is measured at TJ approximately 90°C
 Repetitive rating; pulse width limited by
Data and specifications subject to change without notice.
This product has been designed for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.10/2010
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