Vishay IRLZ34S Power mosfet Datasheet

IRLZ34S, IRLZ34L, SiHLZ34S, SiHLZ34L
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
RDS(on) ()
VGS = 5 V
0.05
Qg (Max.) (nC)
35
Qgs (nC)
7.1
Qgd (nC)
25
Configuration
I2PAK
• Halogen-free According to IEC 61249-2-21
Definition
• Advanced Process Technology
• Surface Mount (IRLZ34S, SiHLZ34S)
• Low-Profile Through-Hole (IRLZ34L, SiHLZ34L)
• 175 °C Operating Temperature
• Fast Switching
• Fully Avalanche Rated
• Compliant to RoHS Directive 2002/95/EC
60
Single
D2PAK
(TO-262)
G
G
D
S
D
DESCRIPTION
S
Third generation Power MOSFETs from Vishay utilize
advanced processing techniques to achieve extremely low
on-resistance per silicon area. This benefit, combined with
the fast swichting speed and ruggedized device design that
Power MOSFETs are known for, provides the designer with
an extremely efficient and reliable device for use in a wide
variety of applications.
The D2PAK is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible
on-resistance in any existing surface mount package. The
D2PAK is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0 W in a typical surface mount application.
The through-hole version (IRLZ34L, SiHLZ34L) is available
for low-profile applications.
(TO-263)
G
D
S
N-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb) free and Halogen-free
Lead (Pb) free
D2PAK (TO-263)
SiHLZ34S-GE3
-
I2PAK (TO-262)
IRLZ34LPbF
SiHLZ34L-E3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
VDS
VGS
60
± 10
30
21
110
0.59
128
88
3.7
4.5
- 55 to + 175
300d
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
VGS at 5 V
TC = 25 °C
TC = 100 °C
Currenta
Pulsed Drain
Linear Derating Factor
Single Pulse Avalanche Energyb
Maximum Power Dissipation
Maximum Power Dissipation (PCB Mount)e
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
ID
IDM
EAS
TC = 25 °C
TA = 25 °C
PD
dV/dt
TJ, Tstg
for 10 s
UNIT
V
A
W/°C
mJ
W
V/ns
°C
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 25 V, Starting TJ = 25 °C, L = 285 μH, Rg = 25 , IAS = 30 A (see fig. 12).
c. ISD  30 A, dI/dt  200 A/μs, VDD  VDS, TJ  175 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 90418
S11-1044-Rev. D, 30-May-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRLZ34S, IRLZ34L, SiHLZ34S, SiHLZ34L
Vishay Siliconix
THERMAL RESISTANCE RATINGS
SYMBOL
MIN.
TYP.
MAX.
Maximum Junction-to-Ambient
(PCB Mount)a
PARAMETER
RthJA
-
-
40
Maximum Junction-to-Case (Drain)
RthJC
-
-
1.7
UNIT
°C/W
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0, ID = 250 μA
60
-
-
V
VDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.07
-
V/°C
VGS(th)
VDS = VGS, ID = 250 μA
1.0
-
2.0
V
nA
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
IGSS
IDSS
RDS(on)
gfs
VGS = ± 10 V
-
-
± 100
VDS = 60 V, VGS = 0 V
-
-
25
VDS = 48 V, VGS = 0 V, TJ = 150 °C
-
-
250
VGS = 5 V
ID = 18 Ab
-
-
0.05
VGS = 4 V
ID = 15 Ab
-
-
0.07
12
-
-
-
1600
-
-
660
-
-
170
-
-
-
35
VDS = 25 V, ID = 18 A
μA

S
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
-
-
7.1
Gate-Drain Charge
Qgd
-
-
25
Turn-On Delay Time
td(on)
-
14
-
-
170
-
-
30
-
-
56
-
-
7.5
-
-
-
30
-
-
110
Rise Time
Turn-Off Delay Time
Fall Time
Internal Source Inductance
tr
td(off)
VGS = 5 V
ID = 30 A, VDS = 48 V,
see fig. 6 and 13b
VDD = 30 V, ID = 30 A,
Rg = 6 , RD = 1 , see fig. 10b
tf
LS
Between lead,
and center of die contact
pF
nC
ns
nH
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
S
TJ = 25 °C, IS = 30 A, VGS = 0 Vb
TJ = 25 °C, IF = 30 A, dI/dt = 100 A/μsb
-
-
1.6
V
-
120
180
ns
-
700
1300
nC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width  300 μs; duty cycle  2 %.
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Document Number: 90418
S11-1044-Rev. D, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRLZ34S, IRLZ34L, SiHLZ34S, SiHLZ34L
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 2 - Typical Output Characteristics, TC = 175 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 90418
S11-1044-Rev. D, 30-May-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRLZ34S, IRLZ34L, SiHLZ34S, SiHLZ34L
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
Document Number: 90418
S11-1044-Rev. D, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRLZ34S, IRLZ34L, SiHLZ34S, SiHLZ34L
Vishay Siliconix
VDS
VGS
RD
D.U.T.
Rg
+
- VDD
5V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
VDS
90 %
10 %
VGS
td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
tr
td(off) tf
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 90418
S11-1044-Rev. D, 30-May-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRLZ34S, IRLZ34L, SiHLZ34S, SiHLZ34L
Vishay Siliconix
L
Vary tp to obtain
required IAS
VDS
VDS
tp
VDD
Rg
D.U.T.
+
-
I AS
V DD
VDS
5V
0.01 W
tp
Fig. 12a - Unclamped Inductive Test Circuit
IAS
Fig. 12b - Unclamped Inductive Waveforms
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
5V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
Document Number: 90418
S11-1044-Rev. D, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRLZ34S, IRLZ34L, SiHLZ34S, SiHLZ34L
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
Rg
•
•
•
•
+
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?90418.
Document Number: 90418
S11-1044-Rev. D, 30-May-11
www.vishay.com
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Document Number: 91000
Revision: 11-Mar-11
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