AMCC JNIC-1460

Data Sheet
JNIC-1460/1560
Fibre Channel-to-PCI/PCI-X ASIC Controller
For nearly a decade, JNI® ASIC controllers have been a pioneering presence in the Fibre Channel world.
Now that JNI has joined AMCC — the industry leader in high performance integrated circuits for wide
area networks — AMCC is proud to offer JNIC ASIC controllers for a variety of SAN applications.
Benefits
JNIC-1460
• Support for 1 or 2Gb SANs
• Two independent controllers assure
full throughput for each port
JNIC-1560
• Dual independent Fibre Channel
(FC) ports offer a sustained
bandwidth of 800MB/s with a
maximum burst rate of 1.064GB
The JNIC-1460 PCI-to-Fibre Channel
Controller
The 2Gb-enabled JNIC-1460 offers a flexible
architecture that can be easily integrated
into a variety of I/O applications. combines.
With Full-Duplex Fibre Channel data transfer
rates of up to 400 MB/s and a 64-bit, 66 MHz
PCI host interface, it delivers the unparalleled
I/O performance demanded by next-generation SAN appliances.
This powerful ASIC integrates a wide array of
advanced I/O technologies to enhance total
system performance. Starting with an embedded I/O engine that performs real-time context switching to maximize SAN data
throughput, the engine can queue up to 254
active exchanges on-chip. Additional active
exchanges can be accommodated on the
local memory port. JNIC-1460 proprietary data
flow architecture allows for a very efficient, low
latency data path for both receive and transmit channels. An integrated RISC-based I/O
engine with large instruction RAM significantly
reduces host CPU utilization while requiring
less than one interrupt per I/O operation. This
makes the JNIC-1460 an ideal candidate for
high-end servers and external Fibre Channel
storage applications.
The JNIC-1560 Dual Channel
PCI-X-to-Fibre Channel Controller
This fifth-generation Fibre Channel I/O controller provides two fully independent, high
performance FC ports for high bandwidth I/O
paths to a storage area network (SAN). The
controller can sustain an unprecedented 800
MB I/O, the highest in its class. Furthermore, it
can burst to the host system at full PCI-X
speed of 1.064 GB. Two integrated multi-task
RISC-based I/O engines minimize host CPU
overhead, making the JNIC-1560 an ideal candidate for high-end servers and high-performance embedded storage applications.
The JNIC-1560 employs a wide array of I/O
technologies to enhance total system performance. The two embedded engines handle
context switching to maximize data throughput in an enterprise SAN environment, where
a large number of initiators and targets are
integrated to make up the SAN. These onboard engines can each queue up to 254 onchip active exchanges per channel. Optionally,
they can operate on over 32,000 locally stored
active exchanges. These engines employ a
unique I/O delivery scheme that continuously
chains I/Os as issued by the operating system,
reducing the number of system interrupts per
I/O to below one.
With support for 126 individual AL_PA aliases
per port, the JNIC-1560 is well-suited for custom
embedded target applications. Its low power
dissipation eliminates the requirement of a heat
sink in physically confined environments.
S P E C I F I C AT I O N S
JNIC-1460/1560
Features
JNIC-1460 Specifications
All Models
• Switched Fabric, Arbitrated Loop, and
Point-to-Point topology support
• Multi-layer software architecture
JNIC-1460
• Integrated RISC-based I/O Engine
• 1 or 2 Gb Fibre Channel Data Rate
• 66MHz, 64-bit PCI 2.2 Compliant
• Hardware Assisted Context Switching
• Local Memory Port with Bursting Option
• Concurrent Target and Initiator
Mode Support
JNIC-1560
• Two fully independent Fibre Channel (FC)
ports on a single ASIC
• Integrated native PCI-X, 50 to 133MHz, 64bit host interface
• Automatic rate negotiation from
1 to 2Gb
• Multi-protocol capable
(FCP, IP, FC-Tape, FC-BB)
• 10- or 20-bit external SERDES support
Applications
JNIC-1460
• Mission critical SANs requiring simultaneous
high-speed transactions between multiple
Fibre Channel links and a single server
JNIC-1560
• High-end servers and high-performance
embedded storage applications.
•
•
•
•
•
•
•
•
•
•
Host (PCI) Interface
66 MHz PCI clock rate
32- or 64-bit data path
Zero-wait state transfers with cache line streaming
Message Signal Interrupt (MSI) support
Independent DMA channels for receive, transmit
and command
Programmable priority for the DMA channels
64-bit addressing
Dual address cycle capable
Power management registers
PCI 2.2 and PC99 compliant
Fibre Channel Interface
1 or 2 Gb Full-Duplex FC data rate
Auto Link Speed Negotiation
Simultaneous Multi-protocol Capable
Up to 126 ALPA Aliases
Switched Fabric, Arbitrated Loop, and Point-to-Point
Support for class 1, 2, 3, and intermix services
Dynamic half-duplex support
10- or 20-bit external SERDES Interface
Raw frame handling
Programmable removal from loop
Loopback control, error status block, LRC control,
and busy indicator
• FC-AL-2 rev. 7.0 compliant
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Local Memory Interface
De-multiplexed address and data
Synchronous SRAM for local active exchanges
Direct connect 64K to 256K by 18 Sync. SRAM
Local nonvolatile memory (up to 1 MB)
SEEPROM (2 Kb) support
8 GPIO pins
Local interrupt input
Software Support
• Multi-layer API
• Concurrent target & initiator mode support
• FCP, IP, FC-BB, and FC-Tape support
Physical Dimensions
• 388-pin PBGA
• 35mm by 35mm
• 1.27 mm pitch
JNIC-1560 Specifications
•
•
•
•
•
•
•
•
•
•
•
Host (PCI) Interface
32/64-bit PCI up to 66 MHz
32/64-bit PCI-X 50 MHz to 133 MHz
Maximum PCI-X burst rate of 1064 MB
Maximum PCI burst rate of 528 MB
PCI-X Split Transaction support
Zero wait state PCI Bus Master transfers with cache
line streaming
Support for Message Signaled Interrupt
Independent PCI REQ/GNT pairs per port
Programmable parity
Dual address cycle capable
PCI 2.2 and PCI-X 1.0a compliant
Fibre Channel Interface
Two fully independent Fibre Channel ports
800 MB full-duplex FC data rate
2 Gb Fibre Channel with Auto Speed Detect
Switched fabric, point-to-point, arbitrated loop
Multi-Protocol Capable (FCP, IP, FC-BB)
Dedicated RISC Engine for each port
Dynamic half-duplex support
Supports 126 AL_PA aliasing
Link diagnostics, including loop back control,
error status block, LRC control and busy indicator
• Raw frame transmit and receive mode
• GBIC & MIA Support
• FC-AL-2 rev. 7.0 compliant
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Local Memory Interface
Synchronous SRAM for local command storage
8-Mb flash memory support (1 MB)
Parity protected data paths
8 general purpose I/O pins (4 per port)
Two local interrupt inputs
Optional 4K-bit Serial EEPROM interface
Software Support
• Multi-layer API
• Concurrent target & initiator mode support
• FCP, IP, FC-BB and FC-Tape support
Physical Dimensions
• 476-pin PBGA
• 35mm by 35mm
• 1.27 mm pitch
Environmental
Operating temperature: 0° to 70° C
Storage Temperature: -40° to 85° C
Relative humidity: 8% to 85% non-condensing
Maximum Power consumption: 2.5 Watts
Environmental
• Operating temperature: 0° to 70° C
• Storage Temperature: -40° to 85° C
• Relative humidity: 8% to 85% non-condensing
•
•
•
•
Reliability
• Internal and external loopback mode
• IEEE 1149.1 JTAG interface
• Parity protection on all data paths
Reliability
• Internal and external loopback modes
• IEEE 1149.1 JTAG interface
• Parity protection on all data paths
EN TERPRIS E
For technical support, please call 877-436-5642 or email [email protected].
6290 Sequence Drive
San Diego, CA 92121
P 858 450 9333
F 858 450 9885
www.amcc.com
AMCC reserves the right to make changes to its products, or to discontinue any product or service without notice, and
advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied upon is current.
AMCC is a registered trademark of Applied Micro Circuits Corporation. All other trademarks are the property of their
respective holders. Copyright © 2004 Applied Micro Circuits Corporation. All Rights Reserved.
JNIC1460/1560_DS_09/01/2004