, One. <Semi-(,onau.ctot ^P 20 STERN AVE. SPRINGFIELD, NEW JERSEY 07081 U.S.A. TELEPHONE: (973) 376-2922 (212)227-6005 FAX: (973) 376-8960 PAD SERIES PICO AMPERE DIODES FEATURES DIRECT REPLACEMENT FOR SILICONIX PAD SERIES REVERSE BREAKDOWN VOLTAGE BVR > -30V REVERSE CAPACITANCE Crss ^ 2.0pF PAD1,2,5 PAD50 ABSOLUTE MAXIMUM RATINGS1 @ 25 °C (unless otherwise stated) Maximum Temperatures A & Case Storage Temperature -55to+150°C Operating Junction Temperature -55tO+150°C JPAD SSTPAD Maximum Power Dissipation Continuous Power Dissipation (PAD) SOOmW Continuous Power Dissipation (J/SSTPAD) 350mW cmJ Maximum Currents Forward Current (PAD) 50mA Forward Current (J/SSTPAD) 10mA COMMON ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated) MIN SYMBOL CHARACTERISTIC BVR Reverse Breakdown Voltage ALL PAD -45 ALL SSTPAD -30 ALL JPAD -35 Forward Voltage VF Total Reverse Capacitance t-TSS TYP MAX UNITS IR = -1UA V 0.8 1.5 PAD1.5 0.5 0.8 All Others 1.5 2 CONDITIONS IF = 5mA VR = -5V, f= 1MHz pF SPECIFIC ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated) SYMBOL IR CHARACTERISTIC Maximum Reverse Leakage Current PAD PAD1 -1 PAD2 -2 JPAD SSTPAD (SST/J)PAD5 -5 -5 -5 (SST/J)PAD10 -10 -10 -10 (SST/J)PAD20 -20 -20 -20 (SST/J)PAD50 -50 -50 -50 (SST/J)PAD100 -100 -100 (SST/J)PAD200 -200 (SST/J)PAD500 -500 UNITS pA CONDITIONS VR = -20V Derate 2mW/°C above 25°C Derate 2.8mW/°C above 25°C NJ Semi-Conductors reserves the right to change test conditions, parameter limits and package dimensions without notice. Information furnished by NJ Semi-Conductors is believed to be both accurate and reliable at the time of going to press. However, NJ Semi-Conductors assumes no responsibility for any errors or omissions discovered in its use. NJ Semi-Conductors encourages customers to verify that datasheets are current before placing orders. Quality Semi-Conductors Figure 1. Operational Amplifier Protection Input Differential Voltage limited to 0.8V (typ) by JPADs D-i and D2. Common Mode Input voltage limited by JPADs D3 and D4 to ±15V. Figure 2. Sample and Hold Circuit Typical Sample and Hold circuit with clipping. JPAD diodes reduce offset voltages fed capacitively from the JFET switch gate. FIGURE 2 FIGURE 1 +V JPAD20 I> O \ < +V o D2 "\7 D1] & 1[ D2 o 01 D3V JPADS D1 -V "t" 2N4117A ^-^^ ^ ~i [ D4 2N4393 CONTROL SIGNAL c R V OUT + 15V -15V o TO-92 TO-72 SOT-23 Three Lead 0.230 DIA. 0.209 0.195 DIA. 0.175 0.030 0046 0060 MAX. 3 LEADS 0.019 DIA. 0.016 0.500 VIIN. 0014 0070 0.100 DIMENSIONS IN MILLIMETERS 45" DMMilQNS NMCtES A 0.046 0.036 1. 2. 4 0.048 0.028 Absolute maximum ratings are limiting values above which serviceability may be impaired. The PAD type number denotes its maximum reverse current value in pico amperes. Devices with IR values intermediate to those shown are available upon request. Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.