L6590 FULLY INTEGRATED POWER SUPPLY ■ ■ ■ ■ ■ ■ ■ ■ ■ WIDE-RANGE MAINS OPERATION "ON-CHIP" 700V V(BR)DSS POWER MOS 65 kHz INTERNAL OSCILLATOR 2.5V ± 2% INTERNAL REFERENCE STANDBY MODE FOR HIGH EFFICIENCY AT LIGHT LOAD OVERCURRENT AND LATCHED OVERVOLTAGE PROTECTION NON DISSIPATIVE BUILT-IN START-UP CIRCUIT THERMAL SHUTDOWN WITH HYSTERESIS BROWNOUT PROTECTION (SMD PACKAGE ONLY) MAIN APPLICATIONS ■ WALL PLUG POWER SUPPLIES UP TO 15 W ■ AC-DC ADAPTERS ■ AUXILIARY POWER SUPPLIES FOR: - CRT AND LCD MONITOR (BLUE ANGEL) - DESKTOP PC/SERVER - FAX, TV, LASER PRINTER MINIDIP SO16W ORDERING NUMBERS: L6590N ■ L6590D - HOME APPLIANCES/LIGHTING LINE CARD, DC-DC CONVERTERS DESCRIPTION The L6590 is a monolithic switching regulator designed in BCD OFF-LINE technology, able to operate with wide range input voltage and to deliver up to 15W output power. The internal power switch is a lateral power MOSFET with a typical RDS(on) of 13Ω and a V(BR)DSS of 700V minimum. TYPICAL APPLICATION CIRCUIT AC line 88 to 264 Vac Pout up to 15W AC line 88 to 264 Vac Pout up to 15W DRAIN DRAIN 1 1 L6590 L6590 Vcc Vcc 3 3 6, 7, 8 GND 4 Primary Feedback October 2000 6, 7, 8 5 COMP VFB GND VFB 5 4 COMP Secondary Feedback 1/23 L6590 efficiency (Pin < 1W @ Pout = 0.5W with wide range mains). DESCRIPTION (continued) The MOSFET is source-grounded, thus it is possible to build flyback, boost and forward converters. Internal protections like cycle-by-cycle current limiting, latched output overvoltage protection, mains undervoltage protection (SMD version only) and thermal shutdown generate a 'robust' design solution. The device can work with secondary feedback and a 2.5V±2% internal reference, in addition to a high gain error amplifier, makes possible also the use in applications either with primary feedback or not isolated. The IC uses a special leadframe with the ground pins (6, 7 and 8 in minidip, 9 to16 in SO16W package) internally connected in order for heat to be easily removed from the silicon die. An heatsink can then be realized by simply making provision of few cm2 of copper on the PCB. Furthermore, the pin(s) close to the high-voltage one are not connected to ease compliance with safety distances on the PCB. The internal fixed oscillator frequency and the integrated non dissipative start-up generator minimize the external component count and power consumption. The device is equipped with a standby function that automatically reduces the oscillator frequency from 65 to 22 kHz under light load conditions to enhance BLOCK DIAGRAM DRAIN (1) [1] [x] : L6590D (SO16W) START-UP VREF SUPPLY & UVLO THERMAL SHUTDOWN VCC (3) [4] + - OVP VREF SGND [5] BROWNOUT + + - GND (6,7,8) PGND [9, ..., 16] - OCP 2.5V BOK [6] PWM STANDBY VFB (5) [8] - OSC 65/22 kHz + 2.5V COMP (4) [7] PIN CONNECTIONS (Top view) DRAIN GND DRAIN PGND N.C. PGND N.C. PGND N.C. GND Vcc PGND Vcc GND SGND PGND COMP VFB BOK PGND COMP PGND VFB PGND MINIDIP L6590 SO16W L6590D 2/23 L6590 PIN FUNCTIONS Pin# Name Description L6590 L6590D 1 1 DRAIN 2 2, 3 N.C. Not internally connected. Provision for clearance on the PCB. 3 4 VCC Supply pin of the IC. An electrolytic capacitor is connected between this pin and ground. The internal start-up generator charges the capacitor until the voltage reaches the startup threshold. The PWM is stopped if the voltage at the pin exceeds a certain value. 4 7 COMP Output of the Error Amplifier. Used for control loop compensation or to directly control PWM with an optocoupler. 5 8 VFB Inverting input of the Error Amplifier. The non-inverting one is internally connected to a 2.5V± 2% reference. This pin can be grounded in some feedback schemes. 6 to 8 - GND Connection of both the source of the internal MOSFET and the return of the bias current of the IC. Pins connected to the metal frame to facilitate heat dissipation. - 6 BOK Brownout Protection. If the voltage applied to this pin is lower than 2.5V the PWM is disabled. This pin is typically used for sensing the input voltage of the converter through a resistor divider. If not used, the pin can be either left floating or connected to Vcc through a 15 kΩ resistor. - 5 SGND Current return for the bias current of the IC. - 9 to 16 PGND Connection of the source of the internal MOSFET. Pins connected to the metal frame to facilitate heat dissipation. Drain connection of the internal power MOSFET. The internal high voltage start-up generator sinks current from this pin. THERMAL DATA Symbol Parameter Rthj-amb Thermal Resistance Junction to ambient (*) Rthj-pins Thermal Resistance Junction to pins Minidip SO16W Unit 35 to 60 40 to 65 °C/W 15 20 °C/W (*) Value depending on PCB copper area and thickness. ABSOLUTE MAXIMUM RATINGS Symbol Value Unit -0.3 to 700 V Drain Current 0.7 A Vcc IC Supply Voltage 18 V Iclamp Vcc Zener Current 20 mA Error Amplifier Ouput Sink Current 3 mA Voltage on Feedback Input 5 V BOK pin Sink Current 1 mA 1.5 W Operating Junction Temperature -40 to 150 °C Storage Temperature -40 to 150 °C Vds Id Ptot Parameter Drain Source Voltage Power Dissipation at Tamb < 50°C (Minidip and SO16W) 3 cm2, 2 oz copper dissipating area on PCB Tj Tstg 3/23 L6590 ELECTRICAL CHARACTERISTCS (Tj = -25 to 125°C, Vcc = 10V; unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit POWER SECTION V(BR)DSS Drain Source Voltage Idss RDS(on) Id < 200 µA; Tj = 25 °C Off state drain current Vds = 560V; Tj = 125 °C Drain-to-Source on resistance RDS(on) vs. Tj: see fig. 20 Id = 120mA; Tj = 25 °C Id = 120mA; Tj = 125 °C 700 V 200 µA 13 16 Ω 23 28 ERROR AMP SECTION VFB Ib Avol B Input Voltage Tj = 25 °C 2.45 2.5 2.55 Tj = 125°C 2.4 2.5 2.6 0.3 5 E/A Input Bias Current VFB = 0 to 2.5 V DC Gain open loop Unity Gain Bandwidth V µA 60 70 dB 0.7 1 MHz SVR Supply voltage Rejection f = 120 Hz 70 dB Isink Output Sink Current VCOMP = 1V 1 mA Output Source Current VCOMP = 3.5V; VFB = 2V -0.5 -1 VCOMPH Vout High Isource = -0.5mA; VFB=2V 3.8 4.50 VCOMPL Vout Low Isink = 1mA ; VFB=3V Isource -2.5 mA V 1 V kHz OSCILLATOR SECTION Fosc Oscillator Frequency Tj = 25 °C Dmin Min. Duty Cycle VCOMP = 1V Dmax Max. Duty Cycle VCOMP = 4V 58 65 72 52 65 74 67 0 % 70 73 % DEVICE OPERATION SECTION Iop Operating Supply Current fsw = Fosc 4.5 7 mA IQ Quiescent Current MOS disabled 3.5 6 mA VCC charge Current Vcc = 0V to Vccon - 0.5V; Vds = 100 to 400V; Tj = 25°C -3 -4.5 -7 mA Vcc = 0V to Vccon - 0.5V; Vds = 100 to 400V -2.5 -4.5 -7.5 mA Iclamp = 10mA (*) 16.5 17 17.5 V Icharge VCCclamp VCC clamp Voltage Vccon Start Threshold voltage (*) 14 14.5 15 V Vccoff Min operating voltage after Turn on (*) 6 6.5 7 V Vdsmin Drain start voltage 40 V 4/23 L6590 ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Condition Min. Typ. Max. Unit CIRCUIT PROTECTIONS Ipklim Pulse-by-pulse Current Limit di/dt = 120 mA/ µs 550 625 700 mA OVP Overvoltage Protection Icc = 10 mA (*) 16 16.5 17 V LEB Masking Time After MOSFET turn-on (**) 120 ns STANDBY SECTION FSB Oscillator Frequency Ipksb Peak switch current for Standby Operation Transition from Fosc to FSB 80 mA Ipkno Peak switch current for Normal Operation Transition from FSB to Fosc 190 mA 19 22 25 kHz BROWNOUT PROTECTION (L6590D only) Vth Threshold Voltage Voltage either rising or falling 2.4 2.5 2.6 V IHys Current Hysteresis Vpin = 3V -30 -50 -70 µA VCL Clamp Voltage Ipin = 0.5 mA 5.6 6.4 7.2 V 150 165 °C 40 °C THERMAL SHUTDOWN (***) Threshold Hysteresis (*) Parameters tracking one the other (**) Parameter guaranteed by design, not tested in production (***) Parameters guaranteed by design, functionality tested in production Figure 1. Start-up & UVLO Thresholds Figure 2. Start-up Current Generator Vcc [V] Icc [mA] 16 5.5 Vdrain = 40 V 14 5 Start-up 12 4.5 10 4 UVLO 8 Tj = -25 °C Tj = 25 °C 3.5 Tj = 125 °C 6 -50 0 50 Tj [°C] 100 150 3 0 2 4 6 8 10 12 Vcc [V] 5/23 L6590 Figure 3. Start-up Current Generator Figure 6. IC Operating Current Icc [mA] Icc [mA] 5.5 5 Vdrain = 60 V VFB = 2.3 V fsw = 65 kHz Tj = -25 °C 5 Tj = 125 °C 4.5 Tj = 25 °C Tj = 25 °C 4.5 4 Tj = -25 °C 4 Tj = 125 °C 3.5 3.5 3 0 2 4 6 8 10 12 3 7 8 9 10 11 12 Figure 4. IC Consumption Before Start-up Figure 7. IC Operating Current Icc [µA] Icc [mA] 700 4.4 Tj = -25 °C 600 VFB = 2.3 V fsw = 22 kHz 4.2 14 15 Tj = 125 °C 4 500 Tj = 25 °C Tj = 25 °C 400 3.8 Tj = -25 °C 3.6 Tj = 125 °C 300 3.4 200 100 13 Vcc [V] Vcc [V] 3.2 7 8 9 10 11 12 13 14 15 3 7 8 9 10 11 12 13 14 15 Vcc [V] Vcc [V] Figure 5. IC Quiescent Current Figure 8. Switching Frequency vs. Temperature Icc [mA] 4 fsw [kHz] Tj = 25 °C VFB = 2.7 V 80 3.8 Normal operation 70 60 3.6 50 3.4 Tj = 125 °C Tj = -25 °C 3.2 3 40 Standby 30 20 6 8 10 12 Vcc [V] 14 16 18 10 -50 0 50 Tj [°C] 6/23 100 150 L6590 Figure 9. Vcc clamp vs. Temperature Figure 12. OCP threshold vs. Temperature VCCclamp [V] Ipklim / (Ipklim @ Tj = 25°C) 1.1 18 di/dt = 120 mA/µs 1.08 17.8 1.06 17.6 Iclamp = 20 mA 1.04 17.4 Iclamp = 10 mA 1.02 17.2 17 -50 1 0 50 100 150 0.98 -50 0 50 100 150 Tj [°C] Tj [°C] Figure 10. OVP Threshold vs. Temperature Figure 13. Internal E/A Reference Voltage Vth [V] Vref [V] 16 2.6 15.8 2.55 15.6 2.5 15.4 2.45 15.2 15 -50 0 50 100 2.4 -50 150 0 50 100 Figure 11. OCP Threshold vs. Current Slope Figure 14. Error Amplifier Slew Rate Ipklim / (Ipklim @ di/dt = 120 mA/µs) VCOMP [V] 1.06 5 Tj = 25 °C 1.04 4 RL = 10 kΩ CL = 100 pF open loop VCOMP 3 V FB 1.02 1 2 0.98 1 0.96 50 150 Tj [°C] Tj [°C] 0 100 150 dI/dt [mA/µs] 200 250 0 2 4 6 8 10 12 14 16 t [µs] 7/23 L6590 Figure 15. COMP pin Characteristic Figure 18. Breakdown Voltage vs. Temperature VCOMP [V] BVDSS / (BVDSS @ Tj = 25°C) 6 1.08 VFB = 0 Tj = 25 °C 5 1.06 Idrain = 200 µA 1.04 4 1.02 3 1 0.98 2 0.96 1 0 0.94 0 0.2 0.4 0.6 0.8 1 1.2 1.4 0.92 -50 0 50 ICOMP [mA] 100 150 Tj [°C] Figure 16. COMP pin Dynamic Resistance vs. Temperature Figure 19. Drain Leakage vs. Drain Voltage RCOMP [kOhm] 50 Idrain [µA] Tj = 125 °C 10.5 VFB = 0 10 9.5 9 40 Tj = 25 °C 30 Tj = -25 °C 20 8.5 10 100 8 -50 0 50 100 200 300 400 500 600 700 Vdrain [V] 150 Tj [°C] Figure 20. Rds(ON) vs. Temperature Figure 17. Error Amplifier Gain and Phase Rds(ON) / (Rds(ON) @ Tj=25°C) 1.8 dB ° 0 Phase 100 1.6 Idrain = 120 mA 1.4 Gain 90 1.2 50 mφ 0 1 180 0.8 1 10 100 1k 1M f [Hz] 8/23 10k 100k 0.6 -50 0 50 Tj [°C] 100 150 L6590 Figure 21. Rds(ON) vs. Idrain Figure 22. Coss vs. Drain Voltage Rds(ON) / (Rds(ON) @ Idrain=120 mA) Coss [pF] 1.3 250 Tj = 25 °C Tj = 25 °C 200 1.2 150 1.1 100 1 0.9 50 0 100 200 300 400 500 600 Idrain [mA] 0 0 100 200 300 400 500 600 700 Vdrain [V] Figure 23. Standby Function Thresholds Drain Peak Current [mA] 220 22 kHz → 65 kHz 200 180 160 140 120 65 kHz → 22 kHz 100 80 60 -50 0 50 100 150 Tj [°C] 9/23 L6590 Figure 24. Test Board (1) with Primary Feedback: Electrical Schematic F1 2A/250V BD1 DF06M Vin 88 to 264 Vac T1 C1 22 µF 400 V D4 BYW100-100 L1 4.7 µH Vo =12 V ± 10% Po= 1 to 10 W D1 BZW06-154 C9 100 µF 16 V C7, C8 330 µF 16 V D2 STTA106 R1 68 Ω IC1 1 3 C4 100 nF C5 R3 680 nF 1.1 kΩ L6590 6, 7, 8 D3 C2 22 µF 1N4148 25 V R2 5.6 kΩ C7 2.2 nF Y 4 R5 110 Ω C6 10 nF 5 T1 specification Core E20/10/6, ferrite 3C85 or N67 or equivalent ≈0.5 mm gap for a primary inductance of 2.9 mH Lleakage <90 µH Primary : 180 T, 2 series windings 90T each, AWG33 (∅ 0.22 mm) Sec : 19 T, AWG30 (∅ 0.3 mm) Aux : 19 T, AWG33 R4 1.5 kΩ Figure 25. Test Board (1) Evaluation Data Load & Line regulation Efficiency Output Voltage [V] Efficiency [%] 13.5 86 1W 12.5 Pout = 10 W 84 13 82 5W 80 2.5 W 78 12 11.5 50 5W 76 Pout = 10 W 74 100 150 200 Input Voltage [Vac] 10/23 250 300 72 50 2.5 W 1W 100 150 200 Input Voltage [Vac] 250 300 L6590 Figure 26. Test Board (1) Main Waveforms Ch3: Idrain Ch3: Idrain Vin = 400 VDC Pout = 10 W Vin = 100 VDC Pout = 10 W Ch2: Vdrain Ch2: Vdrain Ch3: Idrain Ch3: Idrain Vin = 100 VDC Pout = 1 W Vin = 400 VDC Pout = 1 W Ch2: Vdrain Ch2: Vdrain Figure 27. Test Board (2) with Secondary Feedback: Electrical Schematic F1 2A/250V Vin 88 to 264 Vac CxA 100 nF L 22 mH BD1 DF06M T1 C1 22 µF 400 V CxB 100 nF L1 4.7 µH D4 1N5822 D1 BZW06-154 C8 220 µF 10V Rubycon ZL C5, C6, C7 470 µF 16V Rubycon ZL D2 STTA106 5 Vdc / 2 A R1 10 Ω 1 C2 22 µF 25V 3 IC1 L6590 6, 7, 8 5 D3 1N4148 R2 560 Ω 4 C3 22 nF OP1 PC817 1 4 3 R5 2 kΩ 2 R6 6.8 kΩ C9 100 nF 1 2 R3 2.43 kΩ 3 C4 2.2 nF Y1 class IC2 TL431 R4 2.43 kΩ T1 specification Core E20/10/6, ferrite 3C85 or N67 or equivalent ≈0.6 mm gap for a primary inductance of 1.4 mH Lleakage <30 µH Primary : 128 T, 2 series windings 64T each, AWG32 (∅ 0.22 mm) Sec : 6 T, 4xAWG32 Aux : 14 T, AWG32 11/23 L6590 Figure 28. Test Board (2) evaluation data Load & Line regulation Efficiency Output Voltage [V] Efficiency [%] 80 5 264 VAC 4.98 88 VAC 70 60 4.96 110 VAC 264 VAC 50 40 110 VAC 4.92 30 88 VAC 4.9 0.003 220 VAC 220 VAC 4.94 0.01 0.03 0.1 0.3 1 20 0.003 3 0.01 0.03 Load Current [A] 0.1 0.3 1 3 Load Current [A] Device Power Dissipation Light-load Consumption Pdiss [W] Input Power [mW] 5 1,000 Pout 0.5W 800 Rthj-amb= 58 °C/W @ 1.5W 2 88 V AC 264 VAC 1 600 0.25W 0.5 0.1W 0.05W 0W 0.2 220 VAC 400 200 0 50 100 150 200 250 300 350 400 450 DC Input Voltage [V] Figure 29. Test Board (2) EMI Characterization 12/23 110 VAC 0.1 0.05 0.003 0.01 0.03 0.1 0.3 Load Current [A] 1 3 L6590 Figure 30. Test Board (2) Main Waveforms Ch1: Vdrain A1: Idrain Vin = 400 VDC Iout = 2 A Vin = 100 VDC Iout = 2 A A1: Idrain Ch1: Vdrain A1: Idrain A1: Idrain Vin = 100 VDC Iout = 50 mA Ch1: Vdrain Vin = 400 VDC Iout = 50 mA Ch1: Vdrain Figure 31. Test Board (2) Load Transient Response Vout Vout Vin = 200 VDC Iout = 0.2 ↔ 0.4 A transition 65 22 kHz ⇒ transition 22 65 kHz ⇒ Vin = 200 VDC Iout = 0.1 ↔ 0.3 A Iout Iout Standby Function is not tripped Standby Function is tripped 13/23 L6590 APPLICATION INFORMATION In the following sections the functional blocks as well as the most important internal functions of the device will be described. Start-up Circuit When power is first applied to the circuit and the voltage on the bulk capacitor is sufficiently high, an internal high-voltage current generator is sufficiently biased to start operating and drawing about 4.5 mA through the primary winding of the transformer and the drain pin. Most of this current charges the bypass capacitor connected between pin Vcc (3) and ground and makes its voltage rise linearly. As the Vcc voltage reaches the start-up threshold (14.5V typ.) the chip, after resetting all its internal logic, starts operating, the internal power MOSFET is enabled to switch and the internal high-voltage generator is disconnected. The IC is powered by the energy stored in the Vcc capacitor until the self-supply circuit (typically an auxiliary winding of the transformer) develops a voltage high enough to sustain the operation. As the IC is running, the supply voltage, typically generated by a self-supply winding, can range between 16 V (Overvoltage protection limit, see the relevant section) and 7 V, threshold of the Undervoltage Lockout. Below this value the device is switched off (and the internal start-up generator is activated). The two thresholds are in tracking. The voltage on the Vcc pin is limited at safe values by a clamp circuit. Its 17V threshold tracks the Overvoltage protection threshold. Figure 32. Start-up circuit internal schematic DRAIN POWER MOSFET 15 MΩ UVLO 150 Ω Vcc 17 V GND Power MOSFET and Gate Driver The power switch is implemented with a lateral N-channel MOSFET having a V(BR)DSS of 700V min. and a typical RDS(on) of 13Ω. It has a SenseFET structure to allow a virtually lossless current sensing (used only for protection). During operation in Discontinuous Conduction Mode at low mains the drain voltage is likely to go below ground. Any risk of injecting the substrate of the IC is prevented by an internal structure surrounding the switch. The gate driver of the power MOSFET is designed to supply a controlled gate current during both turn-on and turn-off in order to minimize common mode EMI. Under UVLO conditions an internal pull-down circuit holds the gate low in order to ensure that the power MOSFET cannot be turned on accidentally. 14/23 L6590 Figure 33. PWM Control internal schematic Max. Duty cycle S OSCILLATOR Clock R + PWM - Q to gate driver from OCP comparator + E/A - COMP VFB Oscillator and PWM Control PWM regulation is accomplished by implementing voltage mode control. As shown in fig. 33, this block includes an oscillator, a PWM comparator, a PWM latch and an Error Amplifier. The oscillator operates at a frequency internally fixed at 65 kHz with a precision of ± 10 %. The maximum duty cycle is limited at 70% typ. The PWM latch (reset dominant) is set by the clock pulses of the oscillator and is reset by either the PWM comparator or the Overcurrent comparator. The Error Amplifier (E/A) is an op-amp with a MOS input stage and a class AB output stage. The amplifier is compensated for closed loop stability at unity gain, has a small-signal DC gain of 70 dB (typ.) and a gain-bandwidth product over 1 MHz. In case of overcurrent the error amplifier output saturates high and the conduction of the power MOSFET is stopped by the OCP comparator instead of the PWM comparator. Under zero load conditions the error amplifier is close to its low saturation and the gate drive delivers as short pulses as it can, limited by internal delays. They are however too long to maintain the long-term energy balance, thus from time to time some cycles need being skipped and the operation becomes asynchronous. This is automatically done by the control loop. Standby Function The standby function, optimized for flyback topology, automatically detects a light load condition for the converter and decreases the oscillator frequency. The normal oscillation frequency is automatically resumed when the output load builds up and exceeds a defined threshold. This function allows to minimize power losses related to switching frequency, which represent the majority of losses in a lightly loaded flyback, without giving up the advantages of a higher switching frequency at heavy load. The Standby function is realized by monitoring the peak current in the power switch. If the load is low that it does not reach a threshold (80 mA typ.), the oscillator frequency will be set at 22 kHz typ. When the load demands more power and the peak primary current exceeds a second threshold (190 mA typ.) the oscillator frequency is reset at 65 kHz. This 110 mA hysteresis prevents undesired frequency change when power is such that the peak current is close to either threshold. The signal coming from the sense circuit is digitally filtered to avoid false triggering of this function as a result of large load changes or noise. 15/23 L6590 Figure 34. Standby Function timing diagram Pout 0000000000000000000000000000000000000000000000 80 mA 190 mA Peak 0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000 Primary 0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000 Current 0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000 0000000000000000000000000000000000000000000000 Load regulation Vout small glitch STANDBY (before filter) 2 ms 1 ms STANDBY (filtered) 65 kHz fsw 22 kHz Brownout Protection (L6590D only) Brownout Protection is basically a not-latched device shutdown functionality. It will typically be used to detect a mains undervoltage (brownout). This condition may cause overheating of the primary power section due to an excess of RMS current. Figure 35. Brownout Protection Function internal schematic and timing diagram HV Input bus VON VOFF HV Input bus Vcc VinOK 50 µA BOK Vcc + 6.4 V VinOK - 2.5 V L6590D PWM Vout 16/23 000000000000000000000 000000000000000000000 000000000000000000000 000000000000000000000 000000000000000000000 000000000000000000000 000000000000000000000 000000000000000000000 L6590 Another problem is the spurious restarts that are likely to occur during converter power down if the input voltage decays slowly (e.g. with a large input bulk capacitor) and that cause the output voltage not to decay to zero monothonically. Converter shutdown can be accomplished with the L6590D by means of an internal comparator that can be used to sense the voltage across the input bulk capacitor. This comparator is internally referenced to 2.5V and disables the PWM if the voltage applied at its non-inverting input, externally available, is below the reference. PWM operation is re-enabled as the voltage at the pin is more than 2.5V. The brownout comparator is provided with current hysteresis instead of a more usual voltage hysteresis: an internal 50 µA current generator is ON as long as the voltage applied at the non-inverting input exceeds 2.5V and is OFF if the voltage is below 2.5V. This approach provides an additional degree of freedom: it is possible to set the ON threshold and the OFF threshold separately by properly choosing the resistors of the external divider, which is not possible with voltage hysteresis. Overvoltage Protection The IC incorporates an Overvoltage Protection (OVP) that can be particularly useful to protect the converter and the load against voltage feedback loop failures. This kind of failure causes the output voltage to rise with no control and easily leads to the destruction of the load and of the converter itself if not properly handled. If such an event occurs, the voltage generated by the auxiliary winding that supplies the IC will fly up tracking the output voltage. An internal comparator continuously monitors the Vcc voltage and stops the operation of the IC if the voltage exceeds 16.5 V. This condition is latched and maintained until the Vcc voltage falls below the UVLO threshold. The converter will then operate intermittently. Figure 36. OVP internal schematic Vcc DRAIN to MOSFET + to OVP latch OVP - GND Overcurrent Protection The device uses pulse-by-pulse current limiting for Overcurrent Protection (OCP), in order to prevent overstress of the internal MOSFET: its current during the ON-time is monitored and, if it exceeds a determined value, the conduction is terminated immediately. The MOSFET will be turned on again in the subsequent switching cycle. As previously mentioned, the internal powerMOSFET has a SenseFET structure: the source of a few cells are connected together and kept separate from the other source connections so as to realize a 1:100 current divider. The "sense" portion is connected to a ground referenced, sense resistor having a low thermal coefficient. The OCP comparator senses the voltage drop across the sense resistor and resets the PWM latch if the drop exceeds a threshold, thus turning off the MOSFET. In this way the overcurrent threshold is set at about 0.65 A (typical value). 17/23 L6590 At turn-on, there are large current spikes due to the discharge of parasitic capacitances and, in case of Continuos Conduction Mode operation, to secondary diode reverse recovery as well, which could falsely trigger the OCP comparator. To increase noise immunity the output of the OCP comparator is blanked for a short time (about 120 ns) just after the MOSFET is turned on, so that any disturbance within this time slot is rejected (Leading Edge Blanking). Figure 37. OCP internal schematic DRAIN Max. Duty cycle S OSCILLATOR Driver Clock R Q 1 1/100 + PWM - + OCP - Clock LEB Rsense 0.5 V GND Thermal Shutdown Overheating of the device due to an excessive power throughput or insufficient heatsinking is avoided by the Thermal Shutdown function. A thermal sensor monitors the junction temperature close to the power MOSFET and, when the temperature exceeds 150 °C (min.), sets an alarm signal that stops the operation of the device. This is a not-latched function and the power MOSFET is re-enabled as the temperature falls about 40 °C. 18/23 L6590 APPLICATION IDEAS Figure 38. 10W AC-DC adapter with no isolation F1 2A/250V Vin 88 to 264 Vac CxA 100 nF L 22 mH BD1 DF06M T1 C1 22 µF 400 V CxB 100 nF L1 4.7 µH D4 STPS3L60S D1 BZW06-154 C9 100 µF 16 V C7, C8 330 µF 16 V D2 STTA106 Vo =12 V ± 3% Io= 0 to 0.8 A R1 10 Ω C2 22 µF 25 V IC1 1 3 (4) L6590 (L6590D) 6, 7, 8 (9 to 16) D3 1N4148 R2 3.9 kΩ C4 R3 100 nF 27 kΩ 4 (7) C5 2.2 nF 5 (8) R4 1 kΩ T1 specification Core E20/10/6, ferrite 3C85 or N67 or equivalent ≈0.5 mm gap for a primary inductance of 1.6 mH Lleakage <30 µH Primary : 130 T, 2 series windings 65T each, AWG33 (∅ 0.22 mm) Sec : 14 T, AWG26 (∅ 0.4 mm) Figure 39. 15W Auxiliary SMPS for PC T1 Vin = 200 to 375 Vdc L1 4.7 µH D4 STPS10L25D D1 BZW06-154 C8 100 µF 10V C5, C6, C7 470 µF 10 V D2 STTA106 5 Vdc / 3 A R1 10 Ω R2 1.8 MΩ 1 C2 22 µF 25 V 4 D3 1N4148 R4 560 Ω IC1 6 8 C1 10 nF L6590D 5 7 9, ..., 16 C3 47 nF 4 1 3 2 R5 2.43 kΩ OP1 PC817 R7 240 Ω R3 20 kΩ 1 C4 2.2 nF Y 2 3 C9 470 nF IC2 TL431 R6 2.43 kΩ T1 specification Core E20/10/6, ferrite 3C85 or N67 or equivalent ≈ 0.9 mm gap for a primary inductance of 2 mH Lleakage <50 µH Primary : 200 T, 2 series windings 100T each, AWG33 (∅ 0.22 mm) Sec : 9 T, 2 x AWG23 (∅ 0.64 mm) Aux : 21 T, AWG33 19/23 L6590 Figure 40. 7.2V/7W Battery Charger F1 2A/250V Vin 88 to 264 Vac L 22 mH CxA 100 nF C1 22 µF 400 V CxB 100 nF D5 1N4148 T1 16:1 BD1 DF06M 3 1 3 (4) L6590 (L6590D) 6, 7, 8 (9 to 16) R1 39 Ω C3 10 µF 25V 5 (8) C5, C6 330 µF 16V D4 1N5821 C2 220 nF R7 620 Ω C3 10 nF C7 10 µF 25V D8 BZX79C12 R6 0.1 Ω R8 560 Ω R9 22.6 kΩ C8 680 nF C4 2.2 nF Y1 class R10 6.8 kΩ 1 R11 2 11.8 kΩ R4 10 kΩ R3 1.5 kΩ R12 1 kΩ T1 specification Core E20/10/6, ferrite 3C85 or N67 or equivalent ≈ 1 mm gap for a primary inductance of 2.6 mH Lleakage <60 µH Primary : 230 T, 2 series windings 115T each, AWG36 (∅ 0.16 mm) Sec : 13 T, AWG23 (∅ 0.64 mm) Aux : 60 T, AWG36 6 5 D6 1N4148 D7 1N4148 8 3 IC2 7 TSM103 2 1 4 R13 12 kΩ C9 330 nF REFERENCES [1] “Getting Familiar with the L6590 Family, High-voltage Fully Integrated Power Supply” (AN1261) [2] “Offline Flyback Converters Design Methodology with the L6590 Family” (AN1262) 20/23 7.2 Vdc / 1 A D3 BAV21 4 OP1 PC817 4 (7) Q1 BC337 D1 BZW06-154 D2 STTA106 R2 5.6 kΩ R5 4.7 kΩ L6590 21/23 L6590 22/23 L6590 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2000 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 23/23