TI1 LM160QML Lm160qml high speed differential comparator Datasheet

LM160QML
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SNOSAR0A – NOVEMBER 2010 – REVISED MARCH 2013
LM160QML High Speed Differential Comparator
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FEATURES
DESCRIPTION
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The LM160 is a very high speed differential input,
complementary TTL output voltage comparator with
improved characteristics over the μA760/μA760C, for
which it is a pin-for-pin replacement. The device has
been optimized for greater speed, input impedance
and fan-out, and lower input offset voltage. Typically
delay varies only 3nS for overdrive variations of 5mV
to 400mV.
1
2
Ensured High Speed: 20nS max
Tight Delay Matching on Both Outputs
Complementary TTL Outputs
High Input Impedance
Low Speed Variation with Overdrive Variation
Fan-Out of 4
Low Input Offset Voltage
Series 74 TTL Compatible
Complementary outputs having minimum skew are
provided. Applications involve high speed analog to
digital convertors and zero-crossing detectors in disk
file systems.
Connection Diagrams
Figure 1. Metal Can Package
See Package Number LMC0008C
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010–2013, Texas Instruments Incorporated
LM160QML
SNOSAR0A – NOVEMBER 2010 – REVISED MARCH 2013
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Schematic Diagram
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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Absolute Maximum Ratings (1)
Positive Supply Voltage
+8V
−8V
Negative Supply Voltage
Peak Output Current
20 mA
Differential Input Voltage
±5V
V ≥ VI ≥ V−
+
Input Voltage
Operating Temperature Range
−55°C ≤ TA ≤ +125°C
Storage Temperature Range
−65°C ≤ TA ≤ +150°C
Thermal Resistance
θJA
Still Air
165°C/W
400 LF/min
67°C/W
θJC
25°C/W
Lead Temperature (Soldering, 10 sec.)
260°C
ESD Tolerance (2)
1,600V
(1)
(2)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the
Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may
degrade when the device is not operated under the listed test conditions.
Human body model, 1.5 kΩ in series with 100 pF.
Quality Conformance Inspection
Mil-Std-883, Method 5005 - Group A
Subgroup
Description
1
Static tests at
Temp (°C)
+25
2
Static tests at
+125
3
Static tests at
-55
4
Dynamic tests at
+25
5
Dynamic tests at
+125
6
Dynamic tests at
-55
7
Functional tests at
+25
8A
Functional tests at
+125
8B
Functional tests at
-55
9
Switching tests at
+25
10
Switching tests at
+125
11
Switching tests at
-55
12
Settling time at
+25
13
Settling time at
+125
14
Settling time at
-55
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LM160QML
SNOSAR0A – NOVEMBER 2010 – REVISED MARCH 2013
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LM160H/883 Electrical Characteristics DC Parameters
Symbol
Parameter
Conditions
Notes
Min
Max
Unit
Subgroups
VOH B
Logical "1" Output Voltage
VCC ±4.5V, IO = -320µA
2.4
V
1, 2, 3
VOH A
Logical "1" Output Voltage
VCC ±4.5V, IO = -320µA
2.4
V
1, 2, 3
VOLA
Logical "0" Output Voltage
VCC ±4.5V, IO = 6.4mA
0.4
V
1, 2, 3
VOLB
Logical "0" Output Voltage
VCC = 4.5V, IO = 6.4mA
0.4
V
1, 2, 3
IIB
Input Bias Current
VCC = ±5V, VIN = 5V
20
µA
1, 2, 3
ICC+
Positive Supply Current
VCC = ±6.5V
32
mA
1, 2, 3
ICC-
Negative Supply Current
VCC = ±6.5V
-16
mA
1, 2, 3
IOS B
Short Circuit Current
VCC = ±4.5V
-15
-52
mA
1, 2, 3
IOS A
Short Circuit Current
VCC = ±4.5V
-15
-52
mA
1, 2, 3
VIO
Input Offset Voltage
VCC = ±5V
-5.0
5.0
mV
1, 2, 3
IIO
Input Offset Current
VCC = ±5V
-3.0
3.0
µA
1, 2, 3
II (1)
Unbalanced Input Current
VCC = ±5V, VIN(1) = 0,
VIN (2) = 5V
See (1)
-1.0
mA
1, 2, 3
II (2)
Unbalanced Input Current
VCC = ±5V, VIN (1) = 5V,
VIN (2) = 0V
See (1)
-1.0
mA
1, 2, 3
VCC
Supply Voltage
See (1)
±4.5
±6.5
V
1, 2, 3
BVCC
Supply Breakdown Voltage
See (1)
±8.0
V
1, 2, 3
VCM
Common Mode Input Voltage
Range
(1)
±4.0
V
1, 2, 3
VDiff
Differential Input Voltage Range
See (1)
±5.0
V
1, 2, 3
Max
Unit
Subgroups
(1)
VCC = ±6.5V
See
Parameter tested go−no−go, only.
LM160H/883 Electrical Characteristics AC Parameters
The following conditions apply, unless otherwise specified.
Symbol
Parameter
VCC = ±5V, ƒ = 10MHz (sinusoidal)
Conditions
Notes
Min
tResp
Response Time
VIN = 30mVP−P
See (1)
25
nS
9
tResp
Response Time
VIN = 2 VP−P
See (1)
20
nS
9
(1)
4
Bench test, use 70256644.
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SNOSAR0A – NOVEMBER 2010 – REVISED MARCH 2013
Typical Performance Characteristics
Offset Voltage
Input Current vs Ambient
Temperature
Figure 2.
Figure 3.
Input Characteristics
Supply Current vs Ambient
Temperature
Figure 4.
Figure 5.
Propagation Delay vs
Ambient Temperature
Delay of Output 1 With
Respect to Output 2 vs
Ambient Temperature
Figure 6.
Figure 7.
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Typical Performance Characteristics (continued)
Common-Mode
Pulse Response
Figure 8.
6
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SNOSAR0A – NOVEMBER 2010 – REVISED MARCH 2013
AC Test Circuit
VI=±50 mV
FANOUT=1
FANOUT=4
V+=+5V
R=2.4KΩ
R=630Ω
V−=−5V
C=15 pF
C=30 pF
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LM160QML
SNOSAR0A – NOVEMBER 2010 – REVISED MARCH 2013
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REVISION HISTORY
Released
Revision
Section
Changes
11/30/2010
A
New Release, Corporate format
1 MDS data sheets converted into one Corp. data
sheet format. The drift table was eliminated since it
did not apply MNLM160-X Rev 0BL will be archived.
03/26/2013
A
All Sections
Changed layout of National Data Sheet to TI format
8
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PACKAGE OPTION ADDENDUM
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11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
(3)
Top-Side Markings
(4)
5962-8767401GA
ACTIVE
TO-99
LMC
8
20
TBD
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Call TI
-55 to 125
LM160H/883
5962-8767401GA Q A
CO
5962-8767401GA Q >
T
LM160H/883
ACTIVE
TO-99
LMC
8
20
TBD
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LM160H/883
5962-8767401GA Q A
CO
5962-8767401GA Q >
T
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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Addendum-Page 2
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