NSC LM6361M High speed operational amplifier Datasheet

LM6161/LM6261/LM6361
High Speed Operational Amplifier
General Description
The LM6161 family of high-speed amplifiers exhibits an excellent speed-power product in delivering 300 V/µs and
50 MHz unity gain stability with only 5 mA of supply current.
Further power savings and application convenience are possible by taking advantage of the wide dynamic range in operating supply voltage which extends all the way down to +5V.
These amplifiers are built with National’s VIP™ (Vertically Integrated PNP) process which provides fast PNP transistors
that are true complements to the already fast NPN devices.
This advanced junction-isolated process delivers high speed
performance without the need for complex and expensive dielectric isolation.
Features
n High slew rate
300 V/µs
n
n
n
n
n
n
n
n
High unity gain freq 50 MHz
Low supply current 5 mA
Fast settling 120 ns to 0.1%
Low differential gain < 0.1%
Low differential phase 0.1˚
Wide supply range 4.75V to 32V
Stable with unlimited capacitive load
Well behaved; easy to apply
Applications
n
n
n
n
n
Video amplifier
High-frequency filter
Wide-bandwidth signal conditioning
Radar
Sonar
Connection Diagrams
10–Lead Flatpak
DS009057-13
See NS Package Number W10A
DS009057-5
See NS Package Number J08A,
N08E or M08A
Temperature Range
Military
Industrial
Commercial
−55˚C ≤ TA ≤ +125˚C
−25˚C ≤ TA ≤ +85˚C
0˚C ≤ TA ≤ +70˚C
LM6261N
LM6361N
Package
NSC
Drawing
8-Pin
N08E
Molded DIP
LM6161J/883
LM6361J
5962-8962101PA
8-Pin
J08A
Ceramic DIP
LM6261M
LM6361M
8-Pin Molded
M08A
Surface Mt.
LM6161WG/883
10-Lead
5962-8962101XA
Ceramic SOIC
LM6161W/883
10-Pin
5962-8962101HA
WG10A
W10A
Ceramic Flatpak
VIP™ is a trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation
DS009057
www.national.com
LM6161/LM6261/LM6361 High Speed Operational Amplifier
May 1999
Absolute Maximum Ratings (Note 12)
36V
See AN-450 “Surface Mounting Methods and Their Effect
on Product Reliability” for other methods of soldering
surface mount devices.
Storage Temp Range
−65˚C to +150˚C
Max Junction Temperature
150˚C
± 700V
ESD Tolerance (Notes 6, 7)
± 8V
Operating Ratings (Note 12)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V+ − V−)
Differential Input Voltage
(Note 8)
Common-Mode Voltage Range
(Note 10)
Output Short Circuit to GND
(Note 1)
Soldering Information
Dual-In-Line Package (N, J)
Soldering (10 sec.)
Small Outline Package (M)
Vapor Phase (60 sec.)
Infrared (15 sec.)
Temperature Range (Note 2)
LM6161
LM6261
LM6361
Supply Voltage Range
(V+ − 0.7V) to (V− + 0.7V)
Continuous
−55˚C ≤ TJ ≤ +125˚C
−25˚C ≤ TJ ≤ +85˚C
0˚C ≤ TJ ≤ +70˚C
4.75V to 32V
260˚C
215˚C
220˚C
DC Electrical Characteristics
The following specifications apply for Supply Voltage = ± 15V, VCM = 0, RL ≥ 100 kΩ and RS = 50Ω unless otherwise noted.
Boldface limits apply for TJ = TMIN to TMAX; all other limits TJ = 25˚C.
Symbol
VOS
Parameter
VOS
Input Offset Voltage
Average Drift
Ib
Input Bias Current
5
IOS
Input Offset Current
Average Drift
RIN
Input Resistance
CIN
Input Capacitance
AVOL
Large Signal
Voltage Gain
Input Common-Mode
2
150
Differential
AV = +1 @ 10 MHz
VOUT = ± 10V,
RL = 2 kΩ (Note 9)
RL = 10 kΩ (Note 9)
Supply = ± 15V
(Note 3)
(Note 3)
7
7
20
mV
10
9
22
Max
µV/˚C
3
3
5
µA
6
5
6
Max
350
350
1500
nA
800
600
1900
Max
pF
550
550
400
300
400
350
2900
+14.0
4.0
1.8
94
Rejection Ratio
± 10V ≤ V± ≤ ± 16V
90
Rejection Ratio
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(Notes 3, 11)
kΩ
750
−10V ≤ VCM ≤ +10V
2
Units
325
(Note 4)
Power Supply
Limit
1.5
Supply = +5V
PSRR
LM6361
Limit
nA/˚C
−13.2
Common-Mode
LM6261
Limit
0.4
Voltage Range
CMRR
LM6161
10
Input Offset Current
Drift
VCM
Typ
Input Offset Voltage
Drift
IOS
Conditions
V/V
Min
V/V
+13.9
+13.9
+13.8
+13.8
+13.8
+13.7
Volts
Min
−12.9
−12.9
−12.8
Volts
−12.7
−12.7
−12.7
Min
3.9
3.9
3.8
Volts
3.8
3.8
3.7
Min
2.0
2.0
2.1
Volts
2.2
2.2
2.2
Max
80
80
72
dB
74
76
70
Min
80
80
72
dB
74
76
70
Min
DC Electrical Characteristics
(Continued)
The following specifications apply for Supply Voltage = ± 15V, VCM = 0, RL ≥ 100 kΩ and RS = 50Ω unless otherwise noted.
Boldface limits apply for TJ = TMIN to TMAX; all other limits TJ = 25˚C.
Symbol
VO
Parameter
Output Voltage
Swing
Conditions
Supply = ± 15V
and RL = 2 kΩ
Typ
+14.2
−13.4
Output Short
Supply = +5V
and RL = 2 kΩ
4.2
(Note 4)
1.3
Source
65
Circuit Current
Sink
IS
65
Supply Current
5.0
LM6161
LM6261
LM6361
Limit
Limit
Limit
Units
(Notes 3, 11)
(Note 3)
(Note 3)
+13.5
+13.5
+13.4
+13.3
+13.3
+13.3
Min
−13.0
−13.0
−12.9
Volts
−12.7
−12.8
−12.8
Min
3.5
3.5
3.4
Volts
3.3
3.3
3.3
Min
1.7
1.7
1.8
Volts
2.0
1.9
1.9
Max
30
30
30
mA
20
25
25
Min
30
30
30
mA
20
25
25
Min
Volts
6.5
6.5
6.8
mA
6.8
6.7
6.9
Max
AC Electrical Characteristics
The following specifications apply for Supply Voltage = ± 15V, VCM = 0, RL ≥ 100 kΩ and RS = 50Ω unless otherwise noted.
Boldface limits apply for TJ = TMIN to TMAX; all other limits TJ = 25˚C.
Symbol
GBW
Parameter
Gain-Bandwidth
Conditions
Typ
@ f = 20 MHz
50
Product
SR
Slew Rate
Supply = ± 5V
AV = +1 (Note 8)
LM6161
LM6261
Limit
Limit
LM6361
Limit
(Notes 3, 11)
(Note 3)
(Note 3)
40
40
35
30
35
32
Units
MHz
Min
35
300
MHz
200
200
200
180
180
180
V/µs
Min
Supply = ± 5V (Note 8)
VOUT = 20 VPP
200
V/µs
4.5
MHz
10V Step to 0.1%
AV = −1, RL = 2 kΩ
120
ns
45
Deg
< 0.1
%
0.1
Deg
PBW
Power Bandwidth
tS
Settling Time
φm
Phase Margin
AD
Differential Gain
φD
Differential Phase
enp-p
Input Noise Voltage
NTSC, AV = +4
NTSC, AV = +4
f = 10 kHz
inp-p
Input Noise Current
f = 10 kHz
15
1.5
Note 1: Continuous short-circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150˚C.
Note 2: The typical junction-to-ambient thermal resistance of the molded plastic DIP (N) is 105˚C/W, the molded plastic SO (M) package is 155˚C/W, and the cerdip
(J) package is 125˚C/W. All numbers apply for packages soldered directly into a printed circuit board.
Note 3: Limits are guaranteed by testing or correlation.
Note 4: For single supply operation, the following conditions apply: V+ = 5V, V− = 0V, VCM = 2.5V, VOUT = 2.5V. Pin 1 & Pin 8 (Vos Adjust) are each connected to
Pin 4 (V−) to realize maximum output swing. This connection will degrade VOS, VOS Drift, and Input Voltage Noise.
Note 5: CL ≤ 5 pF.
Note 6: In order to achieve optimum AC performance, the input stage was designed without protective clamps. Exceeding the maximum differential input voltage results in reverse breakdown of the base-emitter junction of one of the input transistors and probable degradation of the input parameters (especially Vos, Ios, and
Noise).
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AC Electrical Characteristics
(Continued)
Note 7: The average voltage that the weakest pin combinations (those involving Pin 2 or Pin 3) can withstand and still conform to the datasheet limits. The test circuit
used consists of the human body model of 100 pF in series with 1500Ω.
Note 8: VIN = 8V step. For supply = ± 5V, VIN = 5V step.
Note 9: Voltage Gain is the total output swing (20V) divided by the input signal required to produce that swing.
Note 10: The voltage between V+ and either input pin must not exceed 36V.
Note 11: A military RETS electrical test specification is available on request. At the time of printing, the RETS6161X specs complied with all Boldface limits in this
column.
Note 12: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed.
Typical Performance Characteristics
Supply Current vs
Supply Voltage
(RL = 10 kΩ, TA = 25˚C unless otherwise specified)
Common-Mode
Rejection Ratio
Power Supply
Rejection Ratio
DS009057-15
Gain-Bandwidth
Product
DS009057-16
Propagation Delay
Rise and Fall Times
DS009057-18
Slew Rate vs
Load Capacitance
DS009057-17
Gain-Bandwidth Product
vs Load Capacitance
DS009057-20
DS009057-19
Overshoot vs
Capacitive Load
Slew Rate
DS009057-23
DS009057-21
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DS009057-22
4
Typical Performance Characteristics
(RL = 10 kΩ, TA = 25˚C unless otherwise
specified) (Continued)
Voltage Gain
vs Load Resistance
Gain vs Supply Voltage
DS009057-25
DS009057-24
Differential Gain (Note 13)
Differential Phase (Note 13)
DS009057-8
DS009057-7
Note 13: Differential gain and differential phase measured for four series LM6361 op amps configured as unity-gain followers, in series with an LM6321 buffer. Error
added by LM6321 is negligible. Test performed using Tektronix Type 520 NTSC test system.
Input (2v/div) Output (2v/div)
Step Response; Av = +1
(50 ns/div)
DS009057-1
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Typical Performance Characteristics
(RL = 10 kΩ, TA = 25˚C unless otherwise
specified) (Continued)
Input Noise Voltage
Input Noise Current
DS009057-26
Open-Loop
Frequency Response
Power Bandwidth
DS009057-27
Open-Loop
Frequency Response
DS009057-29
Common-Mode Input
Saturation Voltage
DS009057-28
Output Impedence
(Open-Loop)
DS009057-30
DS009057-31
Bias Current vs
Common-Mode Voltage
Output Saturation Voltage
DS009057-33
DS009057-34
DS009057-32
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6
Simplified Schematic
DS009057-3
Applications Tips
ever, improve the stability and transient response and is recommended for every design. 0.01 µF to 0.1 µF ceramic capacitors should be used (from each supply “rail” to ground);
if the device is far away from its power supply source, an additional 2.2 µF to 10 µF of tantalum may provide extra noise
reduction.
Keep all leads short to reduce stray capacitance and lead inductance, and make sure ground paths are low-impedance,
especially where heavier currents will be flowing. Stray capacitance in the circuit layout can cause signal coupling
across adjacent nodes and can cause gain to unintentionally
vary with frequency.
Breadboarded circuits will work best if they are built using
generic PC boards with a good ground plane. If the op amps
are used with sockets, as opposed to being soldered into the
circuit, the additional input capacitance may degrade circuit
performance.
The LM6361 has been compensated for unity-gain operation. Since this compensation involved adding emitterdegeneration resistors to the op amp’s input stage, the
open-loop gain was reduced as the stability increased. Gain
error due to reduced AVOL is most apparent at high gains;
thus, for gains between 5 and 25, the less-compensated
LM6364 should be used, and the uncompensated LM6365 is
appropriate for gains of 25 or more. The LM6361, LM6364,
and LM6365 have the same high slew rate, regardless of
their compensation.
The LM6361 is unusually tolerant of capacitive loads. Most
op amps tend to oscillate when their load capacitance is
greater than about 200 pF (especially in low-gain circuits).
The LM6361’s compensation is effectively increased with
load capacitance, reducing its bandwidth and increasing its
stability.
Power supply bypassing is not as critical for the LM6361 as
it is for other op amps in its speed class. Bypassing will, how-
Typical Applications
Offset Voltage Adjustment
1 MHz Low-Pass Filter
DS009057-4
DS009057-10
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Typical Applications
(Continued)
Modulator with Differential-to-Single-Ended Converter
DS009057-11
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8
Physical Dimensions
inches (millimeters) unless otherwise noted
Ceramic Dual-In-Line Package (J)
Order Number LM6161J/883
NS Package Number J08A
Molded Package SO (M)
Order Number LM6261M or LM6361M
NS Package Number M08A
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Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
Molded Dual-In-Line Package (N)
Order Number LM6261N or LM6361N
NS Package Number N08E
10-Pin Ceramic Flatpak
Order Number LM6161W/883
NS Package Number W10A
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10
LM6161/LM6261/LM6361 High Speed Operational Amplifier
Notes
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