LMH6515 600 MHz, Digital Controlled, Variable Gain Amplifier General Description Features The LMH6515 is a high performance, digitally controlled variable gain amplifier (DVGA). It combines precision gain control with a low noise, ultra-linear, differential amplifier. Typically, the LMH6515 drives a high performance ADC in a broad range of mixed signal and digital communication applications such as mobile radio and cellular base stations where automatic gain control (AGC) is required to increase system dynamic range. When used in conjunction with a high speed ADC, system dynamic range can be extended by up to 32 dB. The LMH6515 has a differential input and output allowing large signal swings on a single 5V supply. It is designed to accept signals from RF elements and maintain a terminated impedance environment. The input impedance is 200Ω resistive. The output impedance is either 200Ω or 400Ω and is user selectable. A unique internal architecture allows use with both single ended and differential input signals. Input signals to the LMH6515 are scaled by a highly linear, digitally controlled attenuator with 31 accurate 1 dB steps. The attenuator output provides the input signal for a high gain, ultra linear differential transconductor. The transconductor differential output current can be converted into a voltage by using the on-chip 200Ω or 400Ω loads. The transconductance gain is 0.1 Amp/Volt resulting in a maximum voltage gain of +26 dB when driving a 200Ω load, or 32 dB when driving the 400Ω load. On chip digital latches are provided for local storage of the gain setting. The gain step settling time is 5 ns and care has been taken to reduce the sensitivity of bandwidth and phase to gain setting. The LMH6515 operates over the industrial temperature range of −40°C to +85°C. The LMH6515 is available in a 16-Pin, thermally enhanced, LLP package. ■ ■ ■ ■ ■ ■ ■ ■ Adjustable gain with a 31 dB range Precise 1 dB gain steps Parallel 5-bit gain control On chip register stores gain setting Fully differential signal path Single ended to differential capable 200Ω input impedance Small footprint (4 mm x 4 mm) LLP package Key Specifications ■ ■ ■ ■ ■ ■ ■ 600 MHz bandwidth @ 100Ω load 40 dBm OIP3 @ 75 MHz, 200Ω load 20 dB to 30 dB maximum gain Selectable output impedance of 200Ω or 400Ω 8.3 dB noise figure 5 ns gain step switching time 100 mA supply current Applications ■ ■ ■ ■ ■ ■ Cellular base stations IF sampling receivers Instrumentation Modems Imaging Differential line receiver Typical Application 20214301 LMH™ is a trademark of National Semiconductor Corporation. © 2007 National Semiconductor Corporation 202143 www.national.com LMH6515 600 MHz, Digital Controlled, Variable Gain Amplifier October 2007 LMH6515 Storage Temperature Range Soldering Information Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Human Body Model Machine Model Positive Supply Voltage (Pin 3) Output Voltage (pin 14,15) Differential Voltage Between Any Two Grounds Analog Input Voltage Range Digital Input Voltage Range Output Short Circuit Duration (one pin to ground) Junction Temperature Infrared or Convection (20 sec) Wave Soldering (10 sec) Operating Ratings 2 kV 150V −0.6V to 5.5V −0.6V to 6.8V <200 mV −0.6V to VCC −0.6V to 3.6V Infinite +150°C 5V Electrical Characteristics −65°C to +150°C 235°C 260°C (Note 1) Supply Voltage (Pin 3) Output Voltage Range (Pin 14, 15) Differential Voltage Between Any Two Grounds Analog Input Voltage Range, AC Coupled Temperature Range (Note 3) 4V to 5.25V 1.4V to 6.4V ±1.4V −40°C to +85°C Package Thermal Resistance (θJA) 16-Pin LLP 47°C/W <10 mV (Note 4) The following specifications apply for single supply with VCC = 5V, Maximum Gain , RL = 100Ω (200Ω external || 200Ω internal), VOUT = 2 VPP, fin = 150 MHz. Boldface limits apply at temperature extremes. Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units Dynamic Performance SSBW −3 dB Bandwidth Average of all Gain Settings 600 f = 75 MHz, VOUT = 2 VPP −76 f = 150 MHz, VOUT = 2 VPP −72 f = 250 MHz, VOUT = 2 VPP −66 f = 450 MHz, VOUT = 2 VPP −58 f = 75 MHz, VOUT = 2 VPP, Tone Spacing = 0.5 MHz 39 f = 150 MHz, VOUT = 2 VPP, Tone Spacing = 2 MHz 37 f = 250 MHz, VOUT = 2 VPP, Tone Spacing = 2 MHz 34 f = 75 MHz, RL = 200Ω, VOUT = 2 VPP, Tone Spacing = 0.5 MHz 40 f = 150 MHz, RL = 200Ω, VOUT= 2 VPP, Tone Spacing = 2 MHz 37 f = 250 MHz, RL = 200Ω, VOUT = 2 VPP, Tone Spacing = 2 MHz 34 MHz Noise and Distortion Third Order Intermodulation Products OIP3 P1 dB Output 3rd Order Intercept Point Output Level for 1 dB Gain Compression f = 75 MHz, RL = 200Ω 16.7 f = 250 MHz, RL = 200Ω 14.7 f = 75 MHz 14.5 f = 450 MHz 13.2 dBc dBm dBm VNI Input Noise Voltage Maximum Gain, f = 40 MHz 1.8 nV/ VNO Output Noise Voltage Maximum Gain, f = 40 MHz 18 nV/ NF Noise Figure Maximum Gain 8.3 dB Analog I/O Differential Input Resistance 165 160 186 210 220 Ω Input Common Mode Resistance 825 785 971 1120 1160 Ω www.national.com 2 Parameter Differential Output Impedance Conditions Min (Note 6) Low Gain Option Typ (Note 5) Max (Note 6) Units 187 High Gain Option 330 325 370 410 415 Ω Internal Load Resistors Between Pins 13, 14 and Pins 15, 16 165 160 187 210 235 Ω Input Signal Level (AC Coupled) Max Gain, VO = 2 VPP, RL = 1 kΩ 126 Maximum Differential Input Signal AC Coupled Input Common Mode Voltage Self Biased Input Common Mode Voltage Range Driven Externally Minimum Input Voltage Maximum Input Voltage mVPP 5.6 1.3 1.1 1.4 VPP 1.5 1.7 V 0.9 to 2.0 V DC 0 V DC 3.3 V Maximum Differential Output Voltage Swing VCC = 5V, Output Common Mode = 5V 5.5 VPP VOS Output Offset Voltage All Gain Settings 30 mV CMRR Common Mode Rejection Ratio 85 dB PSRR Power Supply Rejection Ratio 63 61 83 23.9 23.4 24.2 24.6 24.8 dB −7.2 −7.7 −6.9 −6.5 −6.4 dB dB Gain Parameters Maximum Gain DC, Internal RL = 200Ω, External RL = 1280Ω Minimum Gain DC, Internal RL = 200Ω, External RL = 1280Ω Gain Step Size DC 1.0 Gain Step Error DC 0.02 f = 150 MHz 0.07 Cumulative Gain Step Error DC, Gain Step 31 to Gain Step 0 −0.1 −0.2 Gain Step Switching Time 0.05 dB dB 0.3 0.4 5 dB ns Digital Inputs/Timing Logic Compatibility CMOS Logic 3.3 V VIL Logic Input Low Voltage 0.8 VIH Logic Input High Voltage IIH Logic Input High Input Current 32 TSU Setup Time 3 ns THOLD Hold Time 3 ns TPW Minimum Latch Pulse Width 10 ns 2.0 V V 40 μA Power Requirements ICC Total Supply Current VOUT = 0V Differential, VOUT Common Mode = 5V 107 124 134 mA Amplifier Supply Current Pin 3 Only 56 66 74 mA Output Stage Bias Currents Pins 13, 14 and Pins 15, 16; VOUT Common Mode = 5 V 48 58 60 mA 3 www.national.com LMH6515 Symbol LMH6515 Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables. Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). Note 3: The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board. Note 4: Electrical Table values apply only for factory testing conditions at the temperature indicated. No guarantee of parametric performance is indicated in the electrical tables under conditions different than those tested Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Note 6: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. Note 7: Negative input current implies current flowing out of the device. Note 8: Drift determined by dividing the change in parameter at temperature extremes by the total temperature change. Connection Diagram 16-Pin LLP 20214304 Top View Gain Control Pins Pin Number Pin Name Gain Step Size 1 GAIN_0 1 dB 12 GAIN_1 2 dB 11 GAIN_2 4 dB 10 GAIN_3 8 dB 9 GAIN_4 16 dB Ordering Information Package 16-Pin LLP www.national.com Part Number LMH6515SQ LMH6515SQX Package Marking L6515SQ 4 Transport Media 1k Units Tape and Reel 4.5k Units Tape and Reel NSC Drawing SQA16A LMH6515 Pin Descriptions Pin Number Symbol Description 6 IN+ Non-inverting analog input. Internally biased to 1.4V. Input voltage should not exceed VCC or go below GND by more than 0.5V. 7 IN− Inverting analog input. Internally biased to 1.4V. Input voltage should not exceed VCC or go below GND by more than 0.5V. If using amplifier single ended this input should be capacitively coupled to ground. 15 OUT− Open collector inverting output. This pin is an output that also requires a power source. This pin should be connected to 5V through either an RF choke or an appropriately sized inductor that can form part of a filter. See application section for details. 14 OUT+ Open collector non-inverting output. This pin is an output that also requires a power source. This pin should be connected to 5V through either an RF choke or an appropriately sized inductor that can form part of a filter. See application section for details. 16 LOAD− Internal 200Ω resistor connection to pin 15. This pin can be left floating for higher gain or shorted to pin 13 for lower gain and lower effective output impedance. See application section for details. 13 LOAD+ Internal 200Ω resistor connection to pin 14. This pin can be left floating for higher gain or shorted to pin 16 for lower gain and lower effective output impedance. See application section for details. 3 VCC 5V power supply pin. Use ceramic, low ESR bypass capacitors. This pin powers everything except the output stage. 5,8 GND Ground pins. Connect to low impedance ground plane. All pin voltages are specified with respect to the voltage on these pins. The exposed thermal pad is also a ground connection. 1,12,11, 10,9 GAIN_0 to GAIN_4 Gain setting pins. See above table for gain step sizes for each pin. These pins are 3.3V CMOS logic compatible. 5V inputs may cause damage. 2 LATCH This pin controls the function of the gain setting pins mentioned above. With LATCH in the logic HIGH state the gain is fixed and will not change. With the LATCH in the logic LOW state the gain is set by the state of the gain control pins. Any changes in gain made with the LATCH pin in the LOW state will take effect immediately. This pin is 3.3V CMOS logic compatible. 5V inputs may cause damage. 4 NC This pin is not connected. It can be grounded or left floating. Analog I/O Power Digital Inputs 5 www.national.com LMH6515 Typical Performance Characteristics VCC = 5V Frequency Response All Gain Settings Frequency Response with Capacitive Load 20214322 20214325 Frequency Response Over Temperature, Maximum Gain Frequency Response Over Temperature, Minimum Gain 20214349 20214350 OIP3 High Gain Mode OIP3 Low Gain Mode 20214343 www.national.com 20214342 6 LMH6515 OIP3 Over Temperature OIP3 High Gain Mode 20214326 20214324 IMD3 Low Gain Mode IMD3 High Gain Mode 20214340 20214341 IMD3 High Gain Mode HD2 vs. Frequency 20214323 20214336 7 www.national.com LMH6515 HD3 vs. Frequency HD2 vs. Frequency 20214339 20214338 HD3 vs. Frequency Noise Figure for All Gain Settings 20214314 20214337 Noise Figure vs. Frequency Differential Output Noise 20214317 www.national.com 20214318 8 LMH6515 Maximum Gain vs. Supply Voltage Gain vs. External Load 20214312 20214327 Maximum Gain Over Temperature Worst Case Gain Step Error vs. Frequency 20214345 20214344 Worst Case Gain Step Error vs. Frequency Worst Case Gain Step Error Over Temperature 20214351 20214346 9 www.national.com LMH6515 Digital Crosstalk Digital Crosstalk 20214347 20214348 Digital Pin to Output Isolation Minimum Gain to Maximum Gain Switching Using Latch Pin 20214319 20214330 Maximum Gain to Minimum Gain Switching Using Latch Pin 16 dB Gain Step Using Latch Pin 20214332 20214335 www.national.com 10 LMH6515 16 dB Gain Step with Latch Pin Low Switching Gain Pin 4 8 dB Gain Step with Latch Pin Low Switching Gain Pin 3 20214329 20214328 4 dB Gain Step Using Latch Pin Power On Timing, Maximum Gain 20214333 20214353 Power On Timing, Minimum Gain Power Off Timing, Maximum Gain 20214354 20214356 11 www.national.com LMH6515 Power Off Timing, Minimum Gain 20214355 In order to help with system design National Semiconductor offers the ADC14V155KDRB High IF Receiver reference design board. This board combines the LMH6515 DVGA with the ADC14V155 ADC and provides a ready made solution for many IF receiver applications. Using an IF frequency of 169 MHz it achieves a small signal SNR of 72 dBFS and an SFDR of greater than 90 DBFS. Large signal measurements show an SNR of 68 dBFS and an SFDR of 77 dBFS. The High IF Receiver board also features the LMK03000 low-jitter precision clock conditioner. Application Information The LMH6515 is a fully differential amplifier optimized for signal path applications up to 400 MHz. The LMH6515 has a 200Ω input. The absolute gain is load dependent, however the gain steps are always 1 dB. The LMH6515 output stage is a class A amplifier. This class A operation results in excellent distortion and linearity characteristics. This makes the LMH6515 ideal for voltage amplification and an ideal ADC driver where high linearity is necessary. 20214311 FIGURE 2. LMH6515 Block Diagram 20214303 INPUT CHARACTERISTICS The LMH6515 input impedance is set by internal resistors to a nominal 200Ω. Process variations will result in a range of values as shown in the 5V Electrical Characteristics table. At higher frequencies parasitics will start to impact the impedance. This characteristic will also depend on board layout and should be verified on the customer’s system board. At maximum gain the digital attenuator is set to 0 dB and the input signal will be much smaller than the output. At minimum gain the output is 12 dB or more smaller than the input. In this configuration the input signal size may limit the amplifier output amplitude, depending on the output configuration and the desired output signal voltage. The input signal cannot swing more than 0.5V below the negative supply voltage (normally 0V) nor should it exceed the positive supply voltage. The input signal will clip and cause severe distortion if it is too large. Because the input stage self biases to approximately 1.4V the lower supply voltage will impose the limit for input voltage swing. To drive larger input signals the input common mode can be forced higher than 1.4V to allow for more swing. An FIGURE 1. LMH6515 Typical Application The LMH6515 output common mode should be set carefully. Using inductors to set the output common mode is one preferred method and will give maximum output swing. AC coupling of the output is recommended. The inductors mentioned above will shift the idling output common mode to the positive supply. Also, with the inductors, the output voltage can exceed the supply voltage. Other options for setting the output common mode require supply voltages above 5V. If using a supply higher than 5V care should be taken to make sure the output common mode does not exceed the 5.25V supply rating. It is also important to note the maximum voltage limits for the OUT+ and OUT− pins, which is 6.4V. When using inductors these pins will experience voltage swings beyond the supply voltage. With a 5V output common mode operating point this makes the effective maximum swing 5.6 VPP differential. System calibration and automatic gain control algorithms should be tailored to avoid exceeding this limit. www.national.com 12 20214307 FIGURE 3. Single Ended Input (Note capacitor on grounded input) OUTPUT CHARACTERISTICS The LMH6515 has the option of two different output configurations. The LMH6515 is an open collector topology. As shown in Figure 8 each output has an on chip 200Ω pull up resistor. In addition there is an internal 400Ω resistor between the two outputs. This results in a 200Ω or a 400Ω differential load in parallel with the external load. The 400Ω option is the high gain option and the 200Ω provides for less gain. The 200Ω configuration is recommended unless more gain is required. The output common mode of the LMH6515 must be set by external components. Most applications will benefit from the use of inductors on the output stage. In particular, the 400Ω option, as shown in Figure 9, will require inductors in order to be able to develop an output voltage. The 200Ω option as shown in Figure 10 or Figure 11 will also require inductors since the voltage drop due to the on chip 200Ω resistors will saturate the output transistors. It is also possible to use resistors and high voltage power supplies to set the output common mode. This operation is not recommended, unless it is necessary to DC couple the output. If DC coupling is required the input common mode and output common mode voltages must be taken into account. Maximum bandwidth with the LMH6515 is achieved by using the low gain, low impedance output option and using a low load resistance. With an effective load of 67Ω a bandwidth of nearly 1 GHz can be realized. As the effective resistance on the output stage goes up the capacitance of the board traces and amplifier output stage limit bandwidth in a roughly linear fashion. At an output impedance of 100Ω the bandwidth is down to 600 MHz, and at 200Ω the bandwidth is 260 MHz. For this reason driving very high impedance loads is not recommended. Although bandwidth goes down with higher values of load resistance, the distortion performance improves and gain increases. The LMH6515 has a common emitter Class A output stage and minimizing the amount of current swing in the output devices improves distortion substantially. The LMH6515 output stage is powered through the collectors of the output transistors. Power for the output stage is fed through inductors and the reactance of the inductors allows the output voltage to develop. In Figure 1 the inductors are shown with a value of 44.4 nH. The value of the inductors used will be different for different applications. In Figure 1 the 20214315 FIGURE 4. Bandwidth Changes Due to Different Inductor Values 20214312 FIGURE 5. Gain vs. External Load DIGITAL CONTROL The LMH6515 has 32 gain settings covering a range of 31 dB. To avoid undesirable signal transients the LMH6515 should be powered on at the minimum gain state (all logic input pins at 0V). The LMH6515 has a 5-bit gain control bus as well as a latch pin. When the latch pin is low, data from the gain control pins is immediately sent to the gain circuit (i.e. gain is changed immediately). When the latch pin transitions high the 13 www.national.com LMH6515 inductors have been chosen to resonate with the ADC and the load capacitor to provide a weak band pass filter effect. For broad band applications higher value inductors will allow for better low frequency operation. However, large valued inductors will reduce high frequency performance, particularly inductors of small physical sizes like 0603 or smaller. Larger inductors will tend to perform better than smaller ones of the same value even for narrow band applications. This is because the larger inductors will have a lower DC resistance and less inter-winding capacitance and hence a higher Q and a higher self resonance frequency. The self resonance frequency should be higher than any desired signal content by at least a factor of two. Another consideration is that the power inductors and the filter inductors need to be placed on the circuit board such that their magnetic fields do not cause coupling. Mutual coupling of inductors can compromise filter characteristics and lead to unwanted distortion products. input common mode of 2.0V will allow an 8 VPP maximum input signal. The trade off for input signal swing is that as the input common mode is shifted away from the 1.4V internal bias point the distortion performance will suffer slightly. LMH6515 current gain state is held and subsequent changes to the gain set pins are ignored. To minimize gain change glitches multiple gain control pins should not change while the latch pin is low. In order to achieve the very fast gain step switching time of 5 ns the internal gain change circuit is very fast. Gain glitches could result from timing skew between the gain set bits. This is especially the case when a small gain change requires a change in state of three or more gain control pins. If continuous gain control is desired the latch pin can be tied to ground. This state is called transparent mode and the gain pins are always active. In this state the timing of the gain pin logic transitions should be planned carefully to avoid undesirable transients. The LMH6515 was designed to interface with 3.3V CMOS logic circuits. If operation with 5V logic is required a simple voltage divider at each logic pin will allow for this. To properly terminate 100Ω transmission lines a divider with a 66.5Ω resistor to ground and a 33.2Ω series resistor will properly terminate the line as well as give the 3.3V logic levels. Care should be taken not to exceed the 3.6V absolute maximum voltage rating of the logic pins. 20214306 FIGURE 6. Bandpass Filter Center Frequency is 140 MHz with a 20 MHz Bandwidth Designed for 200Ω Impedance EXPOSED PAD LLP PACKAGE The LMH6515 is in a thermally enhanced package. The exposed pad is connected to the GND pins. It is recommended, but not necessary, that the exposed pad be connected to the supply ground plane. In any case, the thermal dissipation of the device is largely dependent on the attachment of this pad. The exposed pad should be attached to as much copper on the circuit board as possible, preferably external copper. However, it is also very important to maintain good high speed layout practices when designing a system board. Please refer to the LMH6515 evaluation board for suggested layout techniques. Package information is available on the National web site. http://www.national.com/packaging/folders/sqa16a.html ADC Noise Filter Figure 6 shows a filter schematic and the following table of values are for some common IF frequencies. The filter shown offers a good compromise between bandwidth, noise rejection and cost. This filter topology is the same as used on the ADC14V155KDRB High IF Receiver reference design board. This filter topology works best with the 12 and 14-bit subsampling analog to digital converters shown in the Compatible High Speed Analog to Digital Converters table. Filter Component Values Filter Component Values INTERFACING TO ADC The LMH6515 was designed to be used with high speed ADCs such as the ADC14155. As shown in the Typical Application schematic on page 1, AC coupling provides the best flexibility especially for IF sub-sampling applications. Any resistive networks on the output will also cause a gain loss because the output signal is developed across the output resistors. The chart Maximum Gain vs. External Load shows the change in gain when an external load is added. The inputs of the LMH6515 will self bias to the optimum voltage for normal operation. The internal bias voltage for the inputs is approximately 1.4V. In most applications the LMH6515 input will need to be AC coupled. The output common mode voltage is not self biasing, it needs to be pulled up to the positive supply rail with external inductors as shown in Figure 1. This gives the LMH6515 the capability for large signal swings with very low distortion on a single 5V supply. The internal load resistors provide the LMH6515 with very consistent gain. A unique internal architecture allows the LMH6515 to be driven by either a differential or single ended source. If driving the LMH6515 single ended, the unused input should be terminated to ground with a 0.01 µF capacitor. Directly shorting the unused input to ground will disrupt the internal bias circuitry and will result in poor performance. Fc 75 MHz 140 MHz 170 MHz 250 MHz BW 40 MHz 20 MHz 25 MHz Narrow Band 10 µH 10 µH 10 µH 10 µH Components L1, L2 L3, L4 390 nH 390 nH 560 nH — C1, C2 10 pF 3 pF 1.4 pF 47 pF C3 22 pF 41 pF 32 pF 11 pF L5 220 nH 27 nH 30 nH 22 nH R1, R2 100 200 100 499 20214313 FIGURE 7. Sample Filter www.national.com 14 LMH6515 POWER SUPPLIES As shown in Figure 8, the LMH6515 has a number of options for power supply connections on the output pins. Pin 3 (VCC) is always connected. The output stage can be connected as shown in Figure 9, Figure 10, or Figure 11. The supply voltage range for VCC is 4V to 5.25V. A 5V supply provides the best performance while lower supplies will result in less power consumption. Power supply regulation of 2.5% or better is advised. Of special note is that the digital circuits are powered from an internal supply voltage of 3.3V. The logic pins should not be driven above the absolute maximum value of 3.6V. See the Digital Control section for details. 20214309 FIGURE 10. Using Low Gain Mode (200Ω Load) 20214302 FIGURE 8. Internal Load Resistors 20214310 FIGURE 11. Alternate Connection for Low Gain Mode (200Ω Load) 20214308 FIGURE 9. Using High Gain Mode (400Ω Load) 15 www.national.com LMH6515 Compatible High Speed Analog to Digital Converters Product Number Max Sampling Rate (MSPS) Resolution Channels ADC12L063 62 12 SINGLE ADC12DL065 65 12 DUAL ADC12L066 66 12 SINGLE ADC12DL066 66 12 DUAL CLC5957 70 12 SINGLE ADC12L080 80 12 SINGLE ADC12DL080 80 12 DUAL ADC12C080 80 12 SINGLE ADC12C105 105 12 SINGLE ADC12C170 170 12 SINGLE ADC12V170 170 12 SINGLE ADC14C080 80 14 SINGLE ADC14C105 105 14 SINGLE ADC14DS105 105 14 DUAL ADC14155 155 14 SINGLE ADC14V155 155 14 SINGLE ADC08D500 500 8 DUAL ADC08500 500 8 SINGLE ADC08D1000 1000 8 DUAL ADC081000 1000 8 SINGLE ADC08D1500 1500 8 DUAL ADC081500 1500 8 SINGLE ADC08(B)3000 3000 8 SINGLE ADC08L060 60 8 SINGLE ADC08060 60 8 SINGLE ADC10DL065 65 10 DUAL ADC10065 65 10 SINGLE ADC10080 80 10 SINGLE ADC08100 100 8 SINGLE ADCS9888 170 8 SINGLE ADC08(B)200 200 8 SINGLE ADC11C125 125 11 SINGLE ADC11C170 170 11 SINGLE www.national.com 16 LMH6515 Physical Dimensions inches (millimeters) unless otherwise noted 16-Pin Package NS Package Number SQA16A 17 www.national.com LMH6515 600 MHz, Digital Controlled, Variable Gain Amplifier Notes THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS, IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL’S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR THEIR PRODUCTS AND APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS THAT INCLUDE NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS. 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