TI LMV931MG Lmv931-n/lmv931-n-q1/lmv932-n/lmv932-n-q1/lmv934-n/lmv934-n-q1 single/dual/quad 1.8v, rrio operational amplifier Datasheet

LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993L – NOVEMBER 2001 – REVISED MARCH 2013
LMV931-N/LMV931-N-Q1/LMV932-N/LMV932-N-Q1/LMV934-N/LMV934-N-Q1
Single/Dual/Quad 1.8V, RRIO Operational Amplifiers
Check for Samples: LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1, LMV934-N, LMV934-N-Q1
FEATURES
1
(Typical 1.8V Supply Values; Unless Otherwise
Noted)
2
•
•
•
•
•
•
•
•
•
LMV931-N/LMV932-N/LMV934-N are Available
in Automotive AEC-Q100 Grade 1 Versions
Guaranteed 1.8V, 2.7V and 5V Specifications
Output Swing
– w/600Ω Load 80mV from Rail
– w/2kΩ Load 30mV from Rail
VCM 200mV Beyond Rails
Supply Current (Per Channel) 100μA
Gain Bandwidth Product 1.4MHz
Maximum VOS 4.0mV
Ultra Tiny Packages
Temperature Range −40°C to 125°C
APPLICATIONS
•
•
•
•
•
•
•
Consumer Communication
Consumer Computing
PDAs
Audio Pre-amp
Portable/Battery-powered Electronic
Equipment
Supply Current Monitoring
Battery Monitoring
DESCRIPTION
The LMV931-N/LMV932-N/LMV934-N are low
voltage, low power operational amplifiers. LMV931N/LMV932-N/LMV934-N operate from +1.8V to +5.5V
supply voltages and have rail-to-rail input and output.
LMV931-N/LMV932-N/LMV934-N
input
common
mode voltage extends 200mV beyond the supplies
which enables user enhanced functionality beyond
the supply voltage range. The output can swing railto-rail unloaded and within 105mV from the rail with
600Ω load at 1.8V supply. The LMV931-N/LMV932N/LMV934-N are optimized to work at 1.8V which
make them ideal for portable two-cell battery powered
systems and single cell Li-Ion systems.
LMV931-N/LMV932-N/LMV934-N exhibit excellent
speed-power ratio, achieving 1.4MHz gain bandwidth
product at 1.8V supply voltage with very low supply
current. The LMV931-N/LMV932-N/LMV934-N are
capable of driving a 600Ω load and up to 1000pF
capacitive load with minimal ringing. LMV931N/LMV932-N/LMV934-N have a high DC gain of
101dB, making them suitable for low frequency
applications.
The single LMV931-N is offered in space saving 5Pin SC70 and SOT-23 packages. The dual LMV932N are in 8-Pin VSSOP and SOIC packages and the
quad LMV934-N are in 14-Pin TSSOP and SOIC
packages. These small packages are ideal solutions
for area constrained PC boards and portable
electronics such as cellular phones and PDAs.
Typical Application
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2001–2013, Texas Instruments Incorporated
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
SNOS993L – NOVEMBER 2001 – REVISED MARCH 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
Charged Device Model
ESD Tolerance (3)
750V
Machine Model
200V
Human Body Model
2000V
Supply Voltage (V+–V −)
6V
Differential Input Voltage
± Supply Voltage
Voltage at Input/Output Pins
V++0.3V, V--0.3V
Storage Temperature Range
−65°C to 150°C
Junction Temperature (4)
150°C
For soldering specifications:
See product folder at www.ti.com and http://www.ti.com/lit/SNOA549
(1)
(2)
(3)
(4)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test
conditions, see the Electrical Characteristics.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office / Distributors for availability and
specifications.
Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of
JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.
Operating Ratings (1)
Supply Voltage Range
1.8V to 5.5V
−40°C to 125°C
Temperature Range
Thermal Resistance (θJA)
(1)
5-Pin SC70
414°C/W
5-Pin SOT-23
265°C/W
8-Pin VSSOP
235°C/W
8-Pin SOIC
175°C/W
14-Pin TSSOP
155°C/W
14-Pin SOIC
127°C/W
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test
conditions, see the Electrical Characteristics.
1.8V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C. V+ = 1.8V, V − = 0V, VCM = V+/2, VO = V+/2 and RL > 1 MΩ.
Boldface limits apply at the temperature extremes. See (1)
Symbol
VOS
(1)
(2)
(3)
2
Parameter
Input Offset Voltage
Condition
Min
Typ
Max
Units
LMV931-N (Single)
1
4
6
mV
LMV932-N (Dual)
LMV934-N (Quad)
1
5.5
7.5
mV
(2)
(3)
(2)
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ > TA. See Applications section for information of temperature derating of the device. Absolute
Maximum Ratings indicated junction temperature limits beyond which the device may be permanently degraded, either mechanically or
electrically.
All limits are guaranteed by testing or statistical analysis.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
Submit Documentation Feedback
Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993L – NOVEMBER 2001 – REVISED MARCH 2013
1.8V DC Electrical Characteristics (continued)
Unless otherwise specified, all limits guaranteed for TJ = 25°C. V+ = 1.8V, V − = 0V, VCM = V+/2, VO = V+/2 and RL > 1 MΩ.
Boldface limits apply at the temperature extremes. See(1)
Symbol
Parameter
Condition
Min
(2)
Typ
(3)
Max
(2)
Units
TCVOS
Input Offset Voltage Average
Drift
5.5
IB
Input Bias Current
15
35
50
nA
IOS
Input Offset Current
13
25
40
nA
IS
Supply Current (per channel)
103
185
205
μA
CMRR
Common Mode Rejection Ratio
PSRR
CMVR
Power Supply Rejection Ratio
Input Common-Mode Voltage
Range
LMV931-N, 0 ≤ VCM ≤ 0.6V
1.4V ≤ VCM ≤ 1.8V (4)
60
55
78
LMV932-N and LMV934-N
0 ≤ VCM ≤ 0.6V
1.4V ≤ VCM ≤ 1.8V (4)
55
50
76
−0.2V ≤ VCM ≤ 0V
1.8V ≤ VCM ≤ 2.0V
50
72
1.8V ≤ V+ ≤ 5V
75
70
100
For CMRR Range TA = 25°C
≥ 50dB
TA −40°C to
85°C
TA = 125°C
AV
VO
Large Signal Voltage Gain
LMV931-N (Single)
−
V −0.2
dB
−0.2 to 2.1
−
V −0.2
V +0.2
101
RL = 2kΩ to 0.9V,
VO = 0.2V to 1.6V, VCM = 0.5V
80
75
105
Large Signal Voltage Gain
LMV932-N (Dual)
LMV934-N (Quad)
RL = 600Ω to 0.9V,
VO = 0.2V to 1.6V, VCM = 0.5V
75
72
90
RL = 2kΩ to 0.9V,
VO = 0.2V to 1.6V, VCM = 0.5V
78
75
100
Output Swing
RL = 600Ω to 0.9V
VIN = ±100mV
1.65
1.63
1.72
1.75
1.74
dB
dB
0.105
0.120
1.77
0.024
(4)
(5)
V
+
77
73
Output Short Circuit Current (5)
V +0.2
V+
0.077
IO
dB
+
V−
RL = 600Ω to 0.9V,
VO = 0.2V to 1.6V, VCM = 0.5V
RL = 2kΩ to 0.9V
VIN = ±100mV
μV/°C
Sourcing, VO = 0V
VIN = 100mV
4
3.3
8
Sinking, VO = 1.8V
VIN = −100mV
7
5
9
V
0.035
0.04
mA
For guaranteed temperature ranges, see Input Common-Mode Voltage Range specifications.
Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of 45mA over long term may adversely affect
reliability.
Copyright © 2001–2013, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
3
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
SNOS993L – NOVEMBER 2001 – REVISED MARCH 2013
www.ti.com
1.8V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C. V+ = 1.8V, V − = 0V, VCM = V+/2, VO = V+/2 and RL > 1 MΩ.
Boldface limits apply at the temperature extremes. See (1)
Symbol
Parameter
Conditions
Min
(2)
See (4)
Typ
(3)
Max
(2)
Units
SR
Slew Rate
0.35
V/μs
GBW
Gain-Bandwidth Product
1.4
MHz
Φm
Phase Margin
67
deg
Gm
Gain Margin
7
dB
en
Input-Referred Voltage Noise
f = 10 kHz, VCM = 0.5V
60
nV/√Hz
in
Input-Referred Current Noise
f = 10 kHz
0.08
pA/√Hz
THD
Total Harmonic Distortion
f = 1kHz, AV = +1
RL = 600Ω, VIN = 1 VPP
0.023
Amp-to-Amp Isolation
See (5)
(1)
(2)
(3)
(4)
(5)
%
123
dB
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ > TA. See Applications section for information of temperature derating of the device. Absolute
Maximum Ratings indicated junction temperature limits beyond which the device may be permanently degraded, either mechanically or
electrically.
All limits are guaranteed by testing or statistical analysis.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
Connected as voltage follower with input step from V− to V+. Number specified is the slower of the positive and negative slew rates.
Input referred, RL = 100kΩ connected to V+/2. Each amp excited in turn with 1kHz to produce VO = 3VPP (For Supply Voltages <3V, VO
= V+).
2.7V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C. V+ = 2.7V, V − = 0V, VCM = V+/2, VO = V+/2 and RL > 1 MΩ.
Boldface limits apply at the temperature extremes. See (1)
Symbol
VOS
Parameter
Input Offset Voltage
Condition
Min
Typ
Max
Units
LMV931-N (Single)
1
4
6
mV
LMV932-N (Dual)
LMV934-N (Quad)
1
5.5
7.5
mV
(2)
(3)
(2)
TCVOS
Input Offset Voltage Average
Drift
5.5
IB
Input Bias Current
15
35
50
nA
IOS
Input Offset Current
8
25
40
nA
IS
Supply Current (per channel)
105
190
210
μA
(1)
(2)
(3)
4
μV/°C
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ > TA. See Applications section for information of temperature derating of the device. Absolute
Maximum Ratings indicated junction temperature limits beyond which the device may be permanently degraded, either mechanically or
electrically.
All limits are guaranteed by testing or statistical analysis.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
Submit Documentation Feedback
Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993L – NOVEMBER 2001 – REVISED MARCH 2013
2.7V DC Electrical Characteristics (continued)
Unless otherwise specified, all limits guaranteed for TJ = 25°C. V+ = 2.7V, V − = 0V, VCM = V+/2, VO = V+/2 and RL > 1 MΩ.
Boldface limits apply at the temperature extremes. See (1)
Symbol
CMRR
PSRR
VCM
Parameter
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Input Common-Mode Voltage
Range
Condition
Min
Typ
LMV931-N, 0 ≤ VCM ≤ 1.5V
2.3V ≤ VCM ≤ 2.7V (4)
60
55
81
LMV932-N and LMV934-N
0 ≤ VCM ≤ 1.5V
2.3V ≤ VCM ≤ 2.7V (4)
55
50
80
−0.2V ≤ VCM ≤ 0V
2.7V ≤ VCM ≤ 2.9V
50
74
1.8V ≤ V+ ≤ 5V
VCM = 0.5V
75
70
100
For CMRR
Range ≥ 50dB
TA = 25°C
TA = −40°C to
85°C
TA = 125°C
AV
Large Signal Voltage Gain
LMV931-N (Single)
VO
(2)
−
V −0.2
(3)
−0.2 to 3.0
V+ −0.2
104
RL = 2kΩ to 1.35V,
VO = 0.2V to 2.5V
92
91
110
Large Signal Voltage Gain
LMV932-N (Dual)
LMV934-N (Quad)
RL = 600Ω to 1.35V,
VO = 0.2V to 2.5V
78
75
90
RL = 2kΩ to 1.35V,
VO = 0.2V to 2.5V
81
78
100
Output Swing
RL = 600Ω to 1.35V
VIN = ±100mV
2.55
2.53
2.62
V
dB
dB
0.110
0.130
V
2.675
0.025
(4)
(5)
V +0.2
V− +0.2
87
86
Output Short Circuit Current (5)
dB
V+
2.65
2.64
Units
+
V−
0.083
IO
(2)
dB
RL = 600Ω to 1.35V,
VO = 0.2V to 2.5V
RL = 2kΩ to 1.35V
VIN = ±100mV
Max
Sourcing, VO = 0V
VIN = 100mV
20
15
30
Sinking, VO = 0V
VIN = −100mV
18
12
25
0.04
0.045
mA
For guaranteed temperature ranges, see Input Common-Mode Voltage Range specifications.
Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of 45mA over long term may adversely affect
reliability.
2.7V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C. V+ = 2.7V, V − = 0V, VCM = 1.0V, VO = 1.35V and RL > 1 MΩ.
Boldface limits apply at the temperature extremes. See (1)
Symbol
SR
(1)
(2)
(3)
(4)
Parameter
Slew Rate
Conditions
See (4)
Min
(2)
Typ
(3)
Max
(2)
0.4
Units
V/µs
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ > TA. See Applications section for information of temperature derating of the device. Absolute
Maximum Ratings indicated junction temperature limits beyond which the device may be permanently degraded, either mechanically or
electrically.
All limits are guaranteed by testing or statistical analysis.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
Connected as voltage follower with input step from V− to V+. Number specified is the slower of the positive and negative slew rates.
Copyright © 2001–2013, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
5
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
SNOS993L – NOVEMBER 2001 – REVISED MARCH 2013
www.ti.com
2.7V AC Electrical Characteristics (continued)
Unless otherwise specified, all limits guaranteed for TJ = 25°C. V+ = 2.7V, V − = 0V, VCM = 1.0V, VO = 1.35V and RL > 1 MΩ.
Boldface limits apply at the temperature extremes. See (1)
Symbol
Parameter
Conditions
Min
(2)
Typ
(3)
Max
(2)
Units
GBW
Gain-Bandwidth Product
1.4
MHz
Φm
Phase Margin
70
deg
Gm
Gain Margin
7.5
dB
en
Input-Referred Voltage Noise
f = 10 kHz, VCM = 0.5V
57
nV√Hz
in
Input-Referred Current Noise
f = 10 kHz
0.08
pA/√Hz
THD
Total Harmonic Distortion
f = 1kHz, AV = +1
RL = 600Ω, VIN = 1VPP
0.022
%
Amp-to-Amp Isolation
See (5)
123
dB
(5)
+
Input referred, RL = 100kΩ connected to V /2. Each amp excited in turn with 1kHz to produce VO = 3VPP (For Supply Voltages <3V, VO
= V+).
5V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C. V+ = 5V, V − = 0V, VCM = V+/2, VO = V+/2 and RL > 1 MΩ.
Boldface limits apply at the temperature extremes. See (1)
Symbol
VOS
Parameter
Input Offset Voltage
Condition
Min
Typ
Max
Units
LMV931-N (Single)
1
4
6
mV
LMV932-N (Dual)
LMV934-N (Quad)
1
5.5
7.5
mV
(2)
(3)
(2)
TCVOS
Input Offset Voltage Average
Drift
5.5
IB
Input Bias Current
14
35
50
nA
IOS
Input Offset Current
9
25
40
nA
IS
Supply Current (per channel)
116
210
230
μA
CMRR
Common Mode Rejection Ratio
0 ≤ VCM ≤ 3.8V
4.6V ≤ VCM ≤ 5.0V (4)
60
55
86
−0.2V ≤ VCM ≤ 0V
5.0V ≤ VCM ≤ 5.2V
50
78
75
70
100
V− −0.2
−0.2 to 5.3
PSRR
Power Supply Rejection Ratio
1.8V ≤ V+ ≤ 5V
VCM = 0.5V
CMVR
Input Common-Mode Voltage
Range
For CMRR Range TA = 25°C
≥ 50dB
TA = −40°C to
85°C
TA = 125°C
(1)
(2)
(3)
(4)
6
−
μV/°C
dB
dB
V+ +0.2
V
V+
V− +0.3
V+ −0.3
V
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ > TA. See Applications section for information of temperature derating of the device. Absolute
Maximum Ratings indicated junction temperature limits beyond which the device may be permanently degraded, either mechanically or
electrically.
All limits are guaranteed by testing or statistical analysis.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
For guaranteed temperature ranges, see Input Common-Mode Voltage Range specifications.
Submit Documentation Feedback
Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993L – NOVEMBER 2001 – REVISED MARCH 2013
5V DC Electrical Characteristics (continued)
Unless otherwise specified, all limits guaranteed for TJ = 25°C. V+ = 5V, V − = 0V, VCM = V+/2, VO = V+/2 and RL > 1 MΩ.
Boldface limits apply at the temperature extremes. See(1)
Symbol
AV
Parameter
Min
Typ
RL = 600Ω to 2.5V,
VO = 0.2V to 4.8V
88
87
102
RL = 2kΩ to 2.5V,
VO = 0.2V to 4.8V
94
93
113
Large Signal Voltage Gain
LMV932-N (Dual)
LMV934-N (Quad)
RL = 600Ω to 2.5V,
VO = 0.2V to 4.8V
81
78
90
RL = 2kΩ to 2.5V,
VO = 0.2V to 4.8V
85
82
100
Output Swing
RL = 600Ω to 2.5V
VIN = ±100mV
4.855
4.835
4.890
Large Signal Voltage Gain
LMV931-N (Single)
VO
Condition
(2)
(3)
0.120
RL = 2kΩ to 2.5V
VIN = ±100mV
4.945
4.935
Output Short Circuit Current (5)
(5)
(2)
Units
dB
dB
0.160
0.180
V
4.967
0.037
IO
Max
LMV931-N, Sourcing, VO = 0V
VIN = 100mV
80
68
100
Sinking, VO = 5V
VIN = −100mV
58
45
65
0.065
0.075
mA
Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of 45mA over long term may adversely affect
reliability.
5V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C. V+ = 5V, V − = 0V, VCM = V+/2, VO = 2.5V and R L > 1 MΩ.
Boldface limits apply at the temperature extremes. See (1)
Symbol
Parameter
SR
Slew Rate
GBW
Φm
Conditions
See (4)
Min
(2)
Typ
(3)
Max
(2)
Units
0.42
V/µs
Gain-Bandwidth Product
1.5
MHz
Phase Margin
71
deg
Gm
Gain Margin
8
dB
en
Input-Referred Voltage Noise
f = 10 kHz, VCM = 1V
50
nV/√Hz
in
Input-Referred Current Noise
f = 10 kHz
0.08
pA/√Hz
THD
Total Harmonic Distortion
f = 1kHz, AV = +1
RL = 600Ω, VO = 1V PP
0.022
Amp-to-Amp Isolation
See (5)
(1)
(2)
(3)
(4)
(5)
123
%
dB
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ > TA. See Applications section for information of temperature derating of the device. Absolute
Maximum Ratings indicated junction temperature limits beyond which the device may be permanently degraded, either mechanically or
electrically.
All limits are guaranteed by testing or statistical analysis.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
Connected as voltage follower with input step from V− to V+. Number specified is the slower of the positive and negative slew rates.
Input referred, RL = 100kΩ connected to V+/2. Each amp excited in turn with 1kHz to produce VO = 3VPP (For Supply Voltages <3V, VO
= V+).
Copyright © 2001–2013, Texas Instruments Incorporated
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7
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
SNOS993L – NOVEMBER 2001 – REVISED MARCH 2013
www.ti.com
CONNECTION DIAGRAMS
5-Pin SC70/SOT-23
(LMV931-N)
Top View
8-Pin VSSOP/SOIC
(LMV932-N)
Top View
1
8
14-Pin TSSOP/SOIC
(LMV934-N)
Top View
+
V
OUT A
A
2
-
+
7
-IN A
OUT B
3
6
+IN A
+
V
-
-IN B
B
4
5
+IN B
Devices with an asterisk (*) are future products. Please contact the factory for availability.
Automotive Grade (Q) product incorporates enhanced manufacturing and support processes for the automotive
market, includingdefect detection methodologies. Reliability qualification is compliant with the requirements and
temperature grades defined in theAEC Q100 standard. Automotive Grade products are identified with the letter
Q.
Fully
compliant
PPAP
documentation
is
available.For
more
information
go
to
http://www.ti.com/lsds/ti/apps/automotive/end_equipment.page.
8
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Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993L – NOVEMBER 2001 – REVISED MARCH 2013
Typical Performance Characteristics
Unless otherwise specified, VS = +5V, single supply, TA = 25°C.
Supply Current vs. Supply Voltage (LMV931-N)
100
160
125°C
SUPPLY CURRENT (éA)
140
Sourcing Current vs. Output Voltage
VS = 5V
85°C
10
ISOURCE (mA)
120
100
25°C
80
-40°C
60
VS = 2.7V
1
VS = 1.8V
0.1
40
20
0
0
1
2
3
4
5
6
0.01
0.001
0.01
Figure 1.
VS = 5V
ISINK (mA)
10
VS = 2.7V
1
VS = 1.8V
0.01
0.1
10
1
OUTPUT VOLTAGE REF TO GND (V)
OUTPUT VOLTAGE PROXIMITY TO
SUPPLY VOLTAGE (mV ABSOLUTE VALUE)
10
Output Voltage Swing vs. Supply Voltage
OUTPUT VOLTAGE PROXIMITY TO SUPPLY
VOLTAGE (mV ABSOLUTE VALUE)
Sinking Current vs. Output Voltage
0.01
0.001
1
Figure 2.
100
0.1
0.1
OUTPUT VOLTAGE REFERENCED TO V+ (V)
SUPPLY VOLTAGE (V)
140
RL = 600:
130
NEGATIVE SWING
120
110
100
90
80
POSITIVE SWING
70
60
0
1
4
2
3
SUPPLY VOLTAGE (V)
5
Figure 3.
Figure 4.
Output Voltage Swing vs. Supply Voltage
Gain and Phase vs. Frequency
6
45
RL = 2k:
40
NEGATIVE SWING
35
30
25
POSITIVE SWING
20
0
1
2
3
4
5
6
SUPPLY VOLTAGE (V)
Figure 5.
Copyright © 2001–2013, Texas Instruments Incorporated
Figure 6.
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9
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
SNOS993L – NOVEMBER 2001 – REVISED MARCH 2013
www.ti.com
Typical Performance Characteristics (continued)
Unless otherwise specified, VS = +5V, single supply, TA = 25°C.
Gain and Phase vs. Frequency
Gain and Phase vs. Frequency
Figure 7.
Figure 8.
Gain and Phase vs. Frequency
CMRR vs. Frequency
90
VS = 5V
85
CMRR (dB)
80
VS = 2.7V
75
VS = 1.8V
70
65
60
10
1k
100
FREQUENCY (Hz)
Figure 9.
Figure 10.
PSRR vs. Frequency
100
Input Voltage Noise vs. Frequency
VS = 5V
+PSRR
PSRR (dB)
80
70
-PSRR
60
50
40
30
10
100
1k
FREQUENCY (Hz)
Figure 11.
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10k
INPUT VOLTAGE NOISE (nV/ Hz)
1000
90
10
10k
100
10
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 12.
Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993L – NOVEMBER 2001 – REVISED MARCH 2013
Typical Performance Characteristics (continued)
Unless otherwise specified, VS = +5V, single supply, TA = 25°C.
Input Current Noise vs. Frequency
THD vs. Frequency
10
1
INPUT CURRENT NOISE (pA/ Hz)
RL = 600:
AV = +1
THD (%)
1
0.1
1.8V
0.1
2.7V
5V
0.01
10
100
1k
10k
0.01
10
100k
1k
100
Figure 13.
100k
Figure 14.
THD vs. Frequency
10
10k
FREQUENCY (Hz)
FREQUENCY (Hz)
Slew Rate vs. Supply Voltage
0.5
RL = 600:
AV = +10
SLEW RATE (V/Ps)
0.45
THD (%)
1
5V
0.1
FALLING EDGE
0.4
RISING EDGE
0.35
RL = 2k:
0.3
1.8V
AV = +1
2.7V
0.01
10
VIN = 1VPP
0.25
100
1k
10k
0
100k
1
2
4
5
Figure 16.
Small Signal Non-Inverting Response
Small Signal Non-Inverting Response
VS = 1.8V
RL = 2 k:
TIME (2.5 Ps/DIV)
Figure 17.
Copyright © 2001–2013, Texas Instruments Incorporated
6
VS = 2.7V
RL = 2 k:
(50 mV/DIV)
INPUT SIGNAL
Figure 15.
OUTPUT SIGNAL
INPUT SIGNAL
OUTPUT SIGNAL
(50 mV/DIV)
3
SUPPLY VOLTAGE (V)
FREQUENCY (Hz)
TIME (2.5 Ps/DIV)
Figure 18.
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11
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
SNOS993L – NOVEMBER 2001 – REVISED MARCH 2013
www.ti.com
Typical Performance Characteristics (continued)
Unless otherwise specified, VS = +5V, single supply, TA = 25°C.
Small Signal Non-Inverting Response
Large Signal Non-Inverting Response
VIN
INPUT SIGNAL
VS = 5V
OUTPUT SIGNAL
(50 mV/DIV)
(900 mV/div)
RL = 2 k:
VOUT
VS = 1.8V
RL = 2k:
AV = +1
TIME (10 Ps/div)
TIME (2.5 Ps/DIV)
Figure 19.
Figure 20.
Large Signal Non-Inverting Response
Large Signal Non-Inverting Response
VIN
(2.5 V/div)
(1.35V/DIV)
VIN
VOUT
VOUT
VS = 2.7V
VS = 5.0V
RL = 2 k:
RL = 2k:
AV = +1
AV = +1
TIME (10 Ps/div)
TIME (10 Ps/DIV)
Figure 21.
Figure 22.
Short Circuit Current
vs.
Temperature (Sinking)
Short Circuit Current vs. Temperature (Sourcing)
90
90
5V
70
60
50
40
2.7V
30
20
1.8V
10
0
-40
10
60
TEMPERATURE
(°C)
Figure 23.
12
SHORT CIRCUIT CURRENT (mA)
SHORT CIRCUIT CURRENT (mA)
5V
80
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110
80
70
60
50
40
2.7V
30
20
1.8V
10
0
-40
10
60
TEMPERATURE
(°C)
110
Figure 24.
Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LMV931-N LMV931-N-Q1 LMV932-N LMV932-N-Q1 LMV934-N LMV934-N-Q1
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993L – NOVEMBER 2001 – REVISED MARCH 2013
Typical Performance Characteristics (continued)
Unless otherwise specified, VS = +5V, single supply, TA = 25°C.
Offset Voltage vs. Common Mode Range
Offset Voltage vs. Common Mode Range
3
3
VS = 1.8V
VS = 2.7V
2.5
2.5
2
2
25°C
-40°C
1.5
VOS (mV)
VOS (mV)
25°C
1
0.5
85°C
1
0.5
85°C
125°C
125°C
0
0
-0.5
-0.5
-1
-0.4
0
0.4
0.8
-40°C
1.5
1.2
2
1.6
-1
-0.4
2.4
0.1
0.6
1.1
1.6
VCM (V)
VCM (V)
Figure 25.
Figure 26.
2.1
2.6
3.1
Offset Voltage vs. Common Mode Range
3
VS = 5V
2.5
2
-40°C
VOS (mV)
1.5
1
0.5
25°C
125°C
85°C
0
-0.5
-1
-0.4
0.6
1.6
2.6
3.6
4.6
5.6
VCM (V)
Figure 27.
Copyright © 2001–2013, Texas Instruments Incorporated
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13
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
SNOS993L – NOVEMBER 2001 – REVISED MARCH 2013
www.ti.com
APPLICATION NOTE
INPUT AND OUTPUT STAGE
The rail-to-rail input stage of this family provides more flexibility for the designer. The LMV931-N/LMV932N/LMV934-N use a complimentary PNP and NPN input stage in which the PNP stage senses common mode
voltage near V− and the NPN stage senses common mode voltage near V+. The transition from the PNP stage to
NPN stage occurs 1V below V+. Since both input stages have their own offset voltage, the offset of the amplifier
becomes a function of the input common mode voltage and has a crossover point at 1V below V+.
This VOS crossover point can create problems for both DC and AC coupled signals if proper care is not taken.
Large input signals that include the VOS crossover point will cause distortion in the output signal. One way to
avoid such distortion is to keep the signal away from the crossover. For example, in a unity gain buffer
configuration and with VS = 5V, a 5V peak-to-peak signal will contain input-crossover distortion while a 3V peakto-peak signal centered at 1.5V will not contain input-crossover distortion as it avoids the crossover point.
Another way to avoid large signal distortion is to use a gain of −1 circuit which avoids any voltage excursions at
the input terminals of the amplifier. In that circuit, the common mode DC voltage can be set at a level away from
the VOS cross-over point. For small signals, this transition in VOS shows up as a VCM dependent spurious signal in
series with the input signal and can effectively degrade small signal parameters such as gain and common mode
rejection ratio. To resolve this problem, the small signal should be placed such that it avoids the VOS crossover
point. In addition to the rail-to-rail performance, the output stage can provide enough output current to drive 600Ω
loads. Because of the high current capability, care should be taken not to exceed the 150°C maximum junction
temperature specification.
INPUT BIAS CURRENT CONSIDERATION
The LMV931-N/LMV932-N/LMV934-N family has a complementary bipolar input stage. The typical input bias
current (IB) is 15nA. The input bias current can develop a significant offset voltage. This offset is primarily due to
IB flowing through the negative feedback resistor, RF. For example, if IB is 50nA and RF is 100kΩ, then an offset
voltage of 5mV will develop (VOS = IB x RF). Using a compensation resistor (RC), as shown in Figure 28, cancels
this effect. But the input offset current (IOS) will still contribute to an offset voltage in the same manner.
Figure 28. Canceling the Offset Voltage due to Input Bias Current
14
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LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993L – NOVEMBER 2001 – REVISED MARCH 2013
TYPICAL APPLICATIONS
HIGH SIDE CURRENT SENSING
The high side current sensing circuit (Figure 29) is commonly used in a battery charger to monitor charging
current to prevent over charging. A sense resistor RSENSE is connected to the battery directly. This system
requires an op amp with rail-to-rail input. The LMV931-N/LMV932-N/LMV934-N are ideal for this application
because its common mode input range goes up to the rail.
Figure 29. High Side Current Sensing
HALF-WAVE RECTIFIER WITH RAIL-TO-GROUND OUTPUT SWING
Since the LMV931-N/LMV932-N/LMV934-N input common mode range includes both positive and negative
supply rails and the output can also swing to either supply, achieving half-wave rectifier functions in either
direction is an easy task. All that is needed are two external resistors; there is no need for diodes or matched
resistors. The half wave rectifier can have either positive or negative going outputs, depending on the way the
circuit is arranged.
In Figure 30 the circuit is referenced to ground, while in Figure 31 the circuit is biased to the positive supply.
These configurations implement the half wave rectifier since the LMV931-N/LMV932-N/LMV934-N can not
respond to one-half of the incoming waveform. It can not respond to one-half of the incoming because the
amplifier can not swing the output beyond either rail therefore the output disengages during this half cycle.
During the other half cycle, however, the amplifier achieves a half wave that can have a peak equal to the total
supply voltage. RI should be large enough not to load the LMV931-N/LMV932-N/LMV934-N.
Figure 30. Half-Wave Rectifier with Rail-To-Ground Output Swing Referenced to Ground
Copyright © 2001–2013, Texas Instruments Incorporated
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15
LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
SNOS993L – NOVEMBER 2001 – REVISED MARCH 2013
www.ti.com
Figure 31. Half-Wave Rectifier with Negative-Going Output Referenced to VCC
INSTRUMENTATION AMPLIFIER WITH RAIL-TO-RAIL INPUT AND OUTPUT
Some manufactures make a non-“rail-to-rail”-op amp rail-to-rail by using a resistive divider on the inputs. The
resistors divide the input voltage to get a rail-to-rail input range. The problem with this method is that it also
divides the signal, so in order to get the obtained gain, the amplifier must have a higher closed loop gain. This
raises the noise and drift by the internal gain factor and lowers the input impedance. Any mismatch in these
precision resistors reduces the CMRR as well. The LMV931-N/LMV932-N/LMV934-N is rail-to-rail and therefore
doesn’t have these disadvantages.
Using three of the LMV931-N/LMV932-N/LMV934-N amplifiers, an instrumentation amplifier with rail-to-rail inputs
and outputs can be made as shown in Figure 32.
In this example, amplifiers on the left side act as buffers to the differential stage. These buffers assure that the
input impedance is very high and require no precision matched resistors in the input stage. They also assure that
the difference amp is driven from a voltage source. This is necessary to maintain the CMRR set by the matching
R1-R2 with R3-R4. The gain is set by the ratio of R2/R1 and R3 should equal R1 and R4 equal R2. With both rail-torail input and output ranges, the input and output are only limited by the supply voltages. Remember that even
with rail-to-rail outputs, the output can not swing past the supplies so the combined common mode voltages plus
the signal should not be greater that the supplies or limiting will occur. For additional applications, see Texas
Instruments application notes AN–29 (SNOA625), AN–31 (SNLA140), AN–71 (SNOA652), and AN–127
(SNVA516).
Figure 32. Rail-to-rail Instrumentation Amplifier
16
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LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1
LMV934-N, LMV934-N-Q1
www.ti.com
SNOS993L – NOVEMBER 2001 – REVISED MARCH 2013
Simplified Schematic
Copyright © 2001–2013, Texas Instruments Incorporated
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17
PACKAGE OPTION ADDENDUM
www.ti.com
8-May-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LMV931MF
ACTIVE
SOT-23
DBV
5
1000
TBD
Call TI
Call TI
-40 to 125
A79A
LMV931MF/NOPB
ACTIVE
SOT-23
DBV
5
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
A79A
LMV931MFX
ACTIVE
SOT-23
DBV
5
3000
TBD
Call TI
Call TI
-40 to 125
A79A
LMV931MFX/NOPB
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
A79A
LMV931MG
ACTIVE
SC70
DCK
5
1000
TBD
Call TI
Call TI
-40 to 125
A74
LMV931MG/NOPB
ACTIVE
SC70
DCK
5
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
A74
LMV931MGX
ACTIVE
SC70
DCK
5
3000
TBD
Call TI
Call TI
-40 to 125
A74
LMV931MGX/NOPB
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
A74
LMV931Q1MF/NOPB
ACTIVE
SOT-23
DBV
5
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
ALAA
LMV931Q1MFX/NOPB
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
ALAA
LMV932MA
ACTIVE
SOIC
D
8
95
TBD
Call TI
Call TI
-40 to 125
LMV9
32MA
LMV932MA/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LMV9
32MA
LMV932MAX
ACTIVE
SOIC
D
8
2500
TBD
Call TI
Call TI
-40 to 125
LMV9
32MA
LMV932MAX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LMV9
32MA
LMV932MM
ACTIVE
VSSOP
DGK
8
1000
TBD
Call TI
Call TI
-40 to 125
A86A
LMV932MM/NOPB
ACTIVE
VSSOP
DGK
8
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
A86A
LMV932MMX
ACTIVE
VSSOP
DGK
8
3500
TBD
Call TI
Call TI
-40 to 125
A86A
LMV932MMX/NOPB
ACTIVE
VSSOP
DGK
8
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
A86A
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
8-May-2013
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LMV932Q1MA/NOPB
PREVIEW
SOIC
D
8
95
TBD
Call TI
Call TI
-40 to 125
LMV932Q1MAX/NOPB
PREVIEW
SOIC
D
8
2500
TBD
Call TI
Call TI
-40 to 125
LMV934MA
ACTIVE
SOIC
D
14
55
TBD
Call TI
Call TI
-40 to 125
LMV934MA
LMV934MA/NOPB
ACTIVE
SOIC
D
14
55
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LMV934MA
LMV934MAX
ACTIVE
SOIC
D
14
2500
TBD
Call TI
Call TI
-40 to 125
LMV934MA
LMV934MAX/NOPB
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LMV934MA
LMV934MT/NOPB
ACTIVE
TSSOP
PW
14
94
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LMV93
4MT
LMV934MTX
ACTIVE
TSSOP
PW
14
2500
TBD
Call TI
Call TI
-40 to 125
LMV93
4MT
LMV934MTX/NOPB
ACTIVE
TSSOP
PW
14
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LMV93
4MT
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
8-May-2013
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LMV931-N, LMV931-N-Q1, LMV932-N, LMV932-N-Q1 :
• Catalog: LMV931-N, LMV932-N
• Automotive: LMV931-N-Q1, LMV932-N-Q1
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
LMV931MF
SOT-23
DBV
5
1000
178.0
8.4
LMV931MF/NOPB
SOT-23
DBV
5
1000
178.0
LMV931MFX
SOT-23
DBV
5
3000
178.0
LMV931MFX/NOPB
SOT-23
DBV
5
3000
LMV931MG
SC70
DCK
5
LMV931MG/NOPB
SC70
DCK
LMV931MGX
SC70
DCK
LMV931MGX/NOPB
SC70
W
Pin1
(mm) Quadrant
3.2
3.2
1.4
4.0
8.0
Q3
8.4
3.2
3.2
1.4
4.0
8.0
Q3
8.4
3.2
3.2
1.4
4.0
8.0
Q3
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
1000
178.0
8.4
2.25
2.45
1.2
4.0
8.0
Q3
5
1000
178.0
8.4
2.25
2.45
1.2
4.0
8.0
Q3
5
3000
178.0
8.4
2.25
2.45
1.2
4.0
8.0
Q3
DCK
5
3000
178.0
8.4
2.25
2.45
1.2
4.0
8.0
Q3
LMV931Q1MF/NOPB
SOT-23
DBV
5
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LMV931Q1MFX/NOPB
SOT-23
DBV
5
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LMV932MAX
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LMV932MAX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LMV932MM
VSSOP
DGK
8
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMV932MM/NOPB
VSSOP
DGK
8
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMV932MMX
VSSOP
DGK
8
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMV932MMX/NOPB
VSSOP
DGK
8
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMV934MAX
SOIC
D
14
2500
330.0
16.4
6.5
9.35
2.3
8.0
16.0
Q1
LMV934MAX/NOPB
SOIC
D
14
2500
330.0
16.4
6.5
9.35
2.3
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2013
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LMV934MTX
TSSOP
PW
14
2500
330.0
12.4
6.95
8.3
1.6
8.0
12.0
Q1
LMV934MTX/NOPB
TSSOP
PW
14
2500
330.0
12.4
6.95
8.3
1.6
8.0
12.0
Q1
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LMV931MF
SOT-23
DBV
5
1000
210.0
185.0
35.0
LMV931MF/NOPB
SOT-23
DBV
5
1000
210.0
185.0
35.0
LMV931MFX
SOT-23
DBV
5
3000
210.0
185.0
35.0
LMV931MFX/NOPB
SOT-23
DBV
5
3000
210.0
185.0
35.0
LMV931MG
SC70
DCK
5
1000
210.0
185.0
35.0
LMV931MG/NOPB
SC70
DCK
5
1000
210.0
185.0
35.0
LMV931MGX
SC70
DCK
5
3000
210.0
185.0
35.0
LMV931MGX/NOPB
SC70
DCK
5
3000
210.0
185.0
35.0
LMV931Q1MF/NOPB
SOT-23
DBV
5
1000
210.0
185.0
35.0
LMV931Q1MFX/NOPB
SOT-23
DBV
5
3000
210.0
185.0
35.0
LMV932MAX
SOIC
D
8
2500
367.0
367.0
35.0
LMV932MAX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
LMV932MM
VSSOP
DGK
8
1000
210.0
185.0
35.0
LMV932MM/NOPB
VSSOP
DGK
8
1000
210.0
185.0
35.0
LMV932MMX
VSSOP
DGK
8
3500
367.0
367.0
35.0
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2013
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LMV932MMX/NOPB
VSSOP
DGK
8
3500
367.0
367.0
35.0
LMV934MAX
SOIC
D
14
2500
367.0
367.0
35.0
LMV934MAX/NOPB
SOIC
D
14
2500
367.0
367.0
35.0
LMV934MTX
TSSOP
PW
14
2500
367.0
367.0
35.0
LMV934MTX/NOPB
TSSOP
PW
14
2500
367.0
367.0
35.0
Pack Materials-Page 3
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