Power LNK520G-TL Energy efficient, cv or cv/cc switcher for very low cost adapters and charger Datasheet

LNK520
LinkSwitch Family
®
Energy Efficient, CV or CV/CC Switcher for
Very Low Cost Adapters and Chargers
Product Highlights
Cost Effective Linear/RCC Replacement
• Lowest cost and component count, constant voltage (CV)
or constant voltage/constant current (CV/CC) solutions
• Optimized for bias winding feedback
• Up to 75% lighter power supply reduces shipping cost
• Primary based CV/CC solution eliminates 10 to 20
secondary components for low system cost
• Fully integrated auto-restart for short circuit and open
loop fault protection – saves external component costs
• 42 kHz operation with optimized switching
characteristics for significantly reduced EMI
Much Higher Performance Over Linear/RCC
• Universal input range allows worldwide operation
• Up to 70% reduction in power dissipation – reduces
enclosure size significantly
• CV/CC output characteristic without secondary feedback
• System level thermal and current limit protection
• Meets all single point failure requirements with only one
additional bias capacitor
• Controlled current in CC region provides inherent soft-start
• Optional opto feedback improves output voltage accuracy
®
EcoSmart – Extremely Energy Efficient
• Consumes <300 mW at 265 VAC input with no load
• Meets California Energy Commission (CEC), Energy
Star, and EU requirements
• No current sense resistors – maximizes efficiency
Applications
• Linear transformer replacement in all ≤3 W applications
• Chargers for cell phones, cordless phones, PDAs, digital
cameras, MP3/portable audio devices, shavers, etc.
• Home appliances, white goods and consumer electronics
• Constant output current LED lighting applications
• TV standby and other auxiliary supplies
Description
LinkSwitch is specifically designed to replace low power linear
transformer/RCC chargers and adapters at equal or lower system
cost with much higher performance and energy efficiency.
LNK520 is equivalent to LNK500 but optimized for use with bias
winding feedback and has improved switching characteristics
for significantly reduced EMI. In addition, if bias and output
windings are magnetically well coupled, output voltage load
+
DC
Output
(VO)
Wide Range
HV DC Input
LinkSwitch
D
C
S
(a)
VO
Example Characteristic
Min
Typ
(CV only) (CV/CC)
VO
±5%
±10%
±24%*
For Circuit
Shown Above
IO
(b)
±24%*
IO
With Optional
Secondary Feedback**
*Estimated tolerance achievable in high volume production (external
components with ±7.5% transformer inductance tolerance included).
**See Optional Secondary Feedback section.
PI-3853-030404
PI-3577-080603
Figure 1. (a) Typical Application – not a Simplified Circuit and
(b) Output Characteristic Tolerance Envelopes.
OUTPUT POWER TABLE1
PRODUCT4
LNK520
P or G
230 VAC ±15% 85-265 VAC No-Load
Input
Min2
Typ2 Min2 Typ2
Power
3.3 W
4 W 2.4 W 3 W <300 mW
4.2 W
5.5 W 2.9 W 3.5 W <500 mW3
Table 1. Notes: 1. Output power for designs in an enclosed adapter
measured at 50 °C ambient. 2. See Figure 1 (b) for Min (CV only
designs) and Typ (CV/CC charger designs) power points identified
on output characteristic. 3. Uses higher reflected voltage transformer
designs for increased power capability – see Key Application
Considerations section. 4. For lead-free package options, see Part
Ordering Information.
regulation can be improved. With efficiency of up to 75% and
<300 mW no-load consumption, a LinkSwitch solution can
save the end user enough energy over a linear design to
completely pay for the full power supply cost in less than
one year. LinkSwitch integrates a 700 V power MOSFET,
PWM control, high voltage start-up, current limit, and thermal
shutdown circuitry, onto a monolithic IC.
February 2005
LNK520
CONTROL
DRAIN
0
VC
1
ZC
SHUTDOWN/
AUTO-RESTART
SHUNT REGULATOR/
ERROR AMPLIFIER
+
5.6 V
INTERNAL
SUPPLY
+
5.6 V
4.7 V
CURRENT
LIMIT
ADJUST
÷8
-
CURRENT LIMIT
COMPARATOR
+
HYSTERETIC
THERMAL
SHUTDOWN
I FB
OSCILLATOR
D MAX
CLOCK
S
SAW
-
Q
R
+
PWM
COMPARATOR
IDCS
RE
LEADING
EDGE
EDGE
BLANKING
LOW
FREQUENCY
OPERATION
SOURCE
PI-2777-032503
Figure 2. Block Diagram.
Pin Functional Description
DRAIN (D) Pin:
Power MOSFET drain connection. Provides internal operating
current for start-up. Internal current limit sense point for drain
current.
CONTROL (C) Pin:
Error amplifier and feedback current input pin for duty cycle
and current limit control. Internal shunt regulator connection
to provide internal bias current during normal operation. It is
also used as the connection point for the supply bypass and
auto-restart/compensation capacitor.
SOURCE (S) Pin:
Output MOSFET source connection for high voltage power
return. Primary side control circuit common and reference
point.
2
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2/05
LNK520
S
1
8
C
S
2
7
S
S
3
S
4
5
D
P Package (DIP-8B)
G Package (SMD-8B)
Figure 3. Pin Configuration.
PI-3790-121503
LNK520
LinkSwitch Functional Description
The duty cycle, current limit and operating frequency
relationships with CONTROL pin current are shown in
Figure 4. Figure 5 shows a typical power supply schematic outline
which is used below to describe the LinkSwitch operation.
Internal Current Limit
Auto-restart
ILIM
Power Up
During power up, as VIN is first applied (Figure 5), the CONTROL
pin capacitor C1 is charged through a switched high voltage
current source connected internally between the DRAIN and
CONTROL pins (see Figure 2). When the CONTROL pin voltage
reaches approximately 5.6 V relative to the SOURCE pin, the
high voltage current source is turned off, the internal control
circuitry is activated and the high voltage internal MOSFET
starts to switch. At this point, the charge stored on C1 is used
to supply the internal consumption of the chip.
CONTROL Current IC
Duty Cycle
Auto-restart
77%
Constant Current (CC) Operation
As the output voltage, and therefore the reflected voltage across
the transformer bias winding ramp up, the feedback CONTROL
current IC flowing through R1 increases. As shown in Figure 4,
the internal current limit increases with IC and reaches ILIM when
IC is equal to IDCT. The internal current limit vs. IC characteristic
is designed to provide an approximately constant power supply
output current as the power supply output voltage rises.
Constant Voltage (CV) Operation
When IC exceeds IDCS, typically 2 mA (Figure 4), the maximum
duty cycle is reduced. At a value of IC that depends on power
supply input voltage, the duty cycle control limits LinkSwitch
peak current below the internal current limit value. At this point
the power supply transitions from CC to CV operation. With
minimum input voltage in a typical universal input design, this
transition occurs at approximately 30% duty cycle. Resistor R1
(Figure 5) is therefore initially selected to conduct a value of IC
approximately equal to IDCT when VOUT is at the desired value
at the minimum power supply input voltage. The final choice
of R1 is made when the rest of the circuit design is complete.
When the duty cycle drops below approximately 4%, the
frequency is reduced, which reduces energy consumption under
light load conditions.
Auto-Restart Operation
When a fault condition, such as an output short circuit or open
loop, prevents flow of an external current into the CONTROL
pin, the capacitor C1 discharges towards 4.7 V. At 4.7 V, autorestart is activated, which turns the MOSFET off and puts the
control circuitry in a low current fault protection mode. In
auto-restart, LinkSwitch periodically restarts the power supply
so that normal power supply operation can be restored when
the fault is removed.
IDCT
30%
3.8%
ICD1
CONTROL Current IC
IDCS
Frequency
Auto-restart
fOSC
fOSC(low)
CONTROL Current IC
PI-3579-031004
Figure 4. CONTROL Characteristics.
D1
R3
C3
C4
VOUT
D3
VIN
D2
LinkSwitch D
IC
C
S
R1
R2
C2
C1
PI-3578-021405
Figure 5. Power Supply Schematic outline.
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3
LNK520
T1
D1
VOUT
C3
R3
C4
VR1
RTN
85-265
VAC
D3
C2
LinkSwitch
LNK520
D
R5
R1
U1
C
S
R4
R2
D2
C1
PI-3703-030404
Figure 6. Power Supply Schematic Outline with Optocoupler Feedback, Providing Tight CV Regulation.
The characteristics described above provide an approximate
CV/CC power supply output without the need for secondary side
voltage or current feedback. The output voltage regulation is
influenced by how well the voltage across C2 tracks the reflected
output voltage. This tracking is influenced by the coupling
between transformer output and bias windings. Tight coupling
improves CV regulation and requires only a low value for resistor
R2. Poor coupling degrades CV regulation and requires a higher
value for R2 to filter leakage inductance spikes on the bias
winding voltage waveform. This circuitry, used with standard
transformer construction techniques, provides much better
output load regulation than a linear transformer, making this an
ideal power supply solution in many low power applications.
If even tighter load regulation is required, an optocoupler
configuration can be used while still employing the constant
output current characteristics provided by LinkSwitch.
Optional Secondary Feedback
Figure 6 shows a typical power supply schematic outline using
LinkSwitch with optocoupler feedback to improve output voltage
regulation. On the primary side, the schematic only differs
from Figure 5 by the addition of optocoupler U1 transistor in
parallel to R1.
On the secondary side, the addition of voltage sense circuit
components R4, VR1 and U1 LED provide the voltage feedback
signal. In the example shown, a simple Zener (VR1) reference
is used though more accurate references may be employed for
improved output voltage tolerancing and to provide cable drop
compensation, if required. Resistor R4 provides biasing for VR1.
The regulated output voltage is equal to the sum of the VR1
Zener voltage plus the forward voltage drop of the U1 LED.
Resistor R5 is an optional low value resistor to limit U1 LED
peak current due to output ripple. Manufacturerʼs specifications
4
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for U1 current and VR1 slope resistance should be consulted
to determine whether R5 is required.
When the power supply operates in the constant current (CC)
region, for example at start up and when charging a battery,
the output voltage is below the voltage feedback threshold
defined by U1 and VR1 and the optocoupler is fully off. In this
region, the circuit behaves exactly as previously described with
reference to Figure 5 where the voltage across C2 and therefore
the current flowing through R1 increases with increasing output
voltage and the LinkSwitch internal current limit is adjusted to
provide an approximate CC output characteristic.
When the output reaches the voltage feedback threshold set by
U1 and VR1, the optocoupler turns on. Any further increase
in the power supply output voltage results in the U1 transistor
current increasing. The resulting increase in the LinkSwitch
CONTROL current reduces the duty cycle according to
Figure 4 and therefore, maintains the output voltage
regulation.
Figure 7 shows the influence of optocoupler feedback on the
output characteristic. The envelope defined by the dashed lines
represent the worst-case power supply DC output voltage and
current tolerances (unit-to-unit and over the input voltage range)
if an optocoupler is not used. A typical example of an inherent
(without optocoupler) output characteristic is shown dotted.
This is the characteristic that would result if U1, R4, R5 and
VR1 were removed. The optocoupler feedback results in the
characteristic shown by the solid line. The load variation arrow in
Figure 7 represents the locus of the output characteristic normally
seen during a battery charging cycle. The two characteristics
are identical as the output voltage rises but then separate as
shown when the voltage feedback threshold is reached. This
LNK520
Output Voltage
Inherent
CC to CV
transition
point
Voltage
feedback
threshold
Tolerance envelope
without optocoupler
Typical inherent
characteristic without
optocoupler
Characteristic with
optocoupler
Load variation
during battery
charging
Output Current
PI-2788-092101
Figure 7. Influence of the Optocoupler on the Power Supply Output Characteristic.
Output Voltage
Tolerance envelope
without optocoupler
Inherent
CC to CV
transition
point
Voltage
feedback
threshold
VO(MAX)
Load variation
during battery
charging
Typical inherent
characteristic without
optocoupler
Characteristic with
optocoupler
Power supply peak
output power curve
Characteristic observed with
load variation often applied during
laboratory bench testing
Output Current
PI-2790-112102
Figure 8. Output Characteristic with Optocoupler Regulation (Reduced Voltage Feedback Threshold).
is the characteristic seen if the voltage feedback threshold is
above the output voltage at the inherent CC to CV transition
point also indicated in Figure 7.
Figure 8 shows a case where the voltage feedback threshold
is set below the voltage at the inherent CC to CV transition
point. In this case, as the output voltage rises, the secondary
feedback circuit takes control before the inherent CC to CV
transition occurs. In an actual battery charging application, this
simply limits the output voltage to a lower value. However, in
laboratory bench tests, it is often more convenient to test the
power supply output characteristic starting from a low output
current and gradually increasing the load. In this case, the
optocoupler feedback regulates the output voltage until the
peak output power curve is reached as shown in Figure 8. Under
these conditions, the output current will continue to rise until the
peak power point is reached and the optocoupler turns off. Once
the optocoupler is off, the CONTROL pin feedback current is
determined only by R1 and the output current therefore folds
back to the inherent CC characteristic as shown. Since this type
of load transition does not normally occur in a battery charger,
the output current never overshoots the inherent constant current
value in the actual application.
In some applications it may be necessary to avoid any output
current overshoot, independent of the direction of load variation.
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5
LNK520
PI-3854-031804
LinkSwitch LNK520
D
S
C
VOUT
C1
R1
Typical
Characteristic
C2
C4
VIN
VOUT
D1
R2
D2
(a)
(b)
IOUT
Figure 9. High-side Configuration Using LNK520: (a) Schematic Outline; (b) Typical Output Characteristic Envelope.
To achieve this goal, the minimum voltage feedback threshold
should be set at VO(MAX). This will ensure that the voltage at the
CC to CV transition point of the inherent characteristic will
always occur below the voltage feedback threshold. However, the
output voltage tolerance is then increased, since the inherent CV
characteristic tolerance below VO(MAX) is added to the tolerance
of the optocoupler feedback circuit.
The LNK520 can also be used in the high-side configuration as
shown in Figure 9(a). This configuration provides a very low
component count solution with an approximate CV/CC power
supply output characteristic. A typical output characteristic
envelope is shown in Figure 9(b).
This configuration is ideal for very low cost charger and adapter
applications where output CC tolerance is loose or unspecified.
Typical applications include low cost chargers and adapters
where direct replacement for a linear transformer is required.
In applications with a high voltage DC input voltage, the circuit
is further simplified with the removal of input rectifiers, EMI
filter choke and input capacitors. Typical applications of this
type include auxiliary supplies in domestic appliances and
industrial applications.
In the high-side configuration, the CONTROL pin receives
feedback current through R1 generated by the voltage across
C2. To a first order, this voltage is proportional to VOUT since
VOUT is reflected to the primary and appears across C2 during
the off time of the LNK520 switching cycle. The output CV
regulation is therefore determined by how well the voltage across
C2 tracks the output voltage. This tracking is influenced by the
value of the transformer leakage inductance, which introduces
an error. This error, which is partially filtered by R2 and C2,
causes a slope in the output CV regulation characteristic.
The LNK520 is optimized for use with a bias winding where
tracking of feedback voltage and output voltage is typically
better than it is in the high-side configuration of Figure 9 (a).
As a consequence, the increased leakage error in the high-side
configuration causes the output current to increase with falling
output voltage, as indicated by the output CC characteristic
envelope in Figure 9 (b).
6
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In this high-side configuration, the SOURCE pins and circuit
board traces form a switching node. Extra care should be taken
to optimize EMI performance. The LNK520 internal MOSFET
switching characteristics have been designed to significantly
reduce EMI, particularly in the radiated spectrum (>30 MHz).
However, the SOURCE trace area should be minimized and
EMI filter components should be distanced from the SOURCE
node whenever possible. In embedded applications where a
high voltage DC input voltage is available, system level EMI
filtering is typically located away from the power supply and
circuit board layout is less critical.
Applications Example
The circuit shown in Figure 10 shows a typical implementation
of an approximate constant voltage / constant current (CV/CC)
charger using LinkSwitch in the low-side configuration. This
design delivers 2.75 W with nominal peak power point voltage
of 5.5 V and a current of 500 mA (Figure 11). Efficiency is
greater than 65% over an input range of 85 VAC to 265 VAC.
The bridge rectifier, D1-D4, rectifies the AC input. The rectified
AC is smoothed by C1 and C2, with inductor L1 forming a pi-filter
to filter differential mode conducted EMI. Resistor RF1 is a
fusible, flameproof type providing protection from primary-side
short circuits and line surges and provides additional differential
EMI filtering. The switching frequency of 42 kHz allows such
a simple EMI filter to be used without the need for a Y capacitor
while still meeting international EMI standards.
When power is applied, high voltage DC appears at the DRAIN
pin of LinkSwitch (U1). The CONTROL pin capacitor C5 is
then charged through a switched high voltage current source
connected internally between the DRAIN and CONTROL
pins. When the CONTROL pin reaches approximately
5.6 V relative to the SOURCE pin, the internal current source
is turned off. The internal control circuitry is activated and the
high voltage MOSFET starts to switch, using the energy in C5
to power the IC.
LNK520
5.5 V, 500 mA
D1
D2
1N4005 1N4005
L1
1 mH
0.15 A
RF1
8.2 Ω
L 2W
R1
390 kΩ
1/4 W
1
7
2
6
D7
8T 11DQ06
C4
330 pF
1 kV
R2
100 Ω
100T
C1
4.7 µF
400 V
C2
4.7 µF
400 V
J1
26T
R3
15 Ω
D6B
1N4937
4
T1
EE16
LP = 2.52 mH
C3
1 µF
50 V
LinkSwitch
N
U1
LNK520P
D
D3
1N4005
RTN
5
D5
1N4007GP
85 - 265
VAC
C6
330 µF
16 V
D4
1N4005
C
S
R4
6.81 kΩ
1%, 1/4 W
C5
220 nF
PI-3723-111303
10
Output Voltage (V)
85 VAC
9
115 VAC
8
190 VAC
230 VAC
265 VAC
Limits
7
PI-3718-092503
Figure 10. 2.75 W Constant Voltage/Constant Current (CV/CC) Charger Using LinkSwitch.
6
5
4
3
2
1
0
0
100
200
300
400
500
600
700
Output Current (mA)
Figure 11. Measured Output Characteristic of the Circuit in Figure 10.
The secondary of the transformer is rectified and filtered by
D7 and C6 to provide the DC output to the load. LinkSwitch
dramatically simplifies the secondary side by controlling both
the constant voltage and constant current regions entirely from
the primary side. This is achieved by monitoring the primaryside bias voltage.
Diode D5, C4, R1 and R2 form the primary clamp network.
This limits the peak DRAIN voltage due to leakage inductance.
Resistor R2 allows the use of a slow, low cost rectifier diode
by limiting the reverse current through D5 when U1 turns on.
The selection of a slow diode improves radiated EMI and also
improves CV regulation, especially at no-load.
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7
LNK520
The output during CV operation is equal to the primary-side
bias voltage multiplied by the turns ratio. The bias voltage, in
turn, is the sum of the CONTROL pin voltage (approximately
5.7 V), the voltage across the bias feedback resistor R4 and
the forward voltage of D6B. Resistor R3 can be neglected as
proportionally the voltage drop across this resistance is small. In
CV operation, the voltage across R4 is equal to the CONTROL
pin current, IDCT (2.15 mA) multiplied by the value of R4.
As the output load is decreased, the output and therefore
bias voltage increase resulting in increased current into the
CONTROL pin. As the current into the CONTROL pin exceeds
IDCS (~2 mA), the duty cycle begins to reduce, maintaining
regulation of the output, reaching 30% at a CONTROL pin
current of 2.15 mA.
Under light or no-load conditions, when the duty cycle reaches
approximately 4%, the switching frequency is reduced from
44 kHz to 29 kHz to lower light and no-load input power.
As the output load is increased, the peak power point (defined by
0.5 • LP • ILIM2 • f) is exceeded. The output voltage and therefore
primary-side bias voltage reduce. The reduction in the bias
voltage results in a proportional reduction of CONTROL pin
current, which lowers the internal LinkSwitch current limit
(current limit control).
Constant current (CC) operation controls secondary-side output
current by reducing the primary-side current limit. The current
limit reduction characteristic has been optimized to maintain
an approximate constant output current as the output voltage
and therefore, bias voltage is reduced.
If the load is increased further and the CONTROL pin current
falls below approximately 0.8 mA, the CONTROL pin capacitor
C5 will discharge and LinkSwitch will enter auto-restart
operation.
Current limit control removes the need for any secondaryside current sensing components (sense resistor, transistor,
optocoupler and associated components). Removing the
secondary sense circuit dramatically improves efficiency, giving
the associated benefit of reduced enclosure size.
Key Application Considerations
Design Output Power
Table 1 (front page) shows the maximum continuous output
power that can be obtained under the following conditions:
1. The minimum DC input bus voltage is 90 V or higher. This
corresponds to a filter capacitor of 3 µF/W for universal input
and 1 µF/W for 230 VAC or 115 VAC input with doubler
input stage.
8
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2. Design is a discontinuous mode flyback converter with
nominal primary inductance value and a VOR in the range
40 V to 80 V. Continuous mode designs can result in loop
instability and are therefore not recommended.
3. A secondary output of 5 V with a Schottky rectifier diode.
4. Assumed efficiency of 65%.
5. The part is board mounted with SOURCE pins soldered to
sufficient area of copper to keep the die temperature at or
below 100 °C.
6. An output cable with a total resistance of 0.2 Ω.
In addition to the thermal environment (sealed enclosure,
ventilated, open frame, etc.), the maximum power capability
of LinkSwitch in a given application depends on transformer
core size, efficiency, primary inductance tolerance, minimum
specified input voltage, input storage capacitance, output voltage,
output diode forward drop, etc., and can be different from the
values shown in Table 1.
Transformer Design
To provide an approximately CV/CC output, the transformer
should be designed to be discontinuous; all the energy stored
in the transformer is transferred to the secondary during the
MOSFET off time. Energy transfer in discontinuous mode is
independent of line voltage.
The peak power point prior to entering constant current
operation is defined by the maximum power transferred by the
transformer. The power transferred is given by the expression
P = 0.5 • LP • I2 • f, where LP is the primary inductance, I2
is the primary peak current squared and f is the switching
frequency.
To simplify analysis, the data sheet parameter table specifies an
I2f coefficient. This is the product of current limit squared and
switching frequency normalized to the feedback parameter IDCT.
This provides a single term that specifies the variation of the
peak power point in the power supply due to LinkSwitch.
As primary inductance tolerance is part of the expression
that determines the peak output power point (start of the CC
characteristic) this parameter should be well controlled. For
an estimated overall constant current tolerance of ±24%, the
primary inductance tolerance should be ±7.5% or better. This
is achievable using standard low cost, center leg gapping
techniques where the gap size is typically 0.08 mm or larger.
Smaller gap sizes are possible but require non-standard, tighter
ferrite AL tolerances.
Other gapping techniques such as film gapping allow tighter
tolerances (±7% or better) with associated improvements in
the tolerance of the peak power point. Please consult your
transformer vendor for guidance.
LNK520
Core gaps should be uniform. Uneven core gapping, especially
with small gap sizes, may cause variation in the primary
inductance with flux density (partial saturation) and make the
constant current region non-linear. To verify uniform gapping,
it is recommended that the primary current wave-shape be
examined while feeding the supply from a DC source. The
gradient is defined as di/dt = V/L and should remain constant
throughout the MOSFET on time. Any change in gradient of
the current ramp is an indication of uneven gapping.
Measurements made using a LCR bridge should not be solely
relied upon; typically these instruments only measure at currents
of a few milliamps. This is insufficient to generate high enough
flux densities in the core to show uneven gapping.
For a typical EE16 or EE13 core using center leg gapping, a
0.08 mm gap allows a primary inductance tolerance of ±10% to
be maintained in standard high volume production. This allows
the EE13 to be used in designs up to 2.75 W with less than
300 mW no-load consumption. Using outer leg film gapping
reduces inductance tolerance to ±7% or better, allowing designs
up to 3 W. Using the larger EE16 allows for a 3 W output
with center leg gapping. The EE13 core size may be attractive
in designs were space is limited or if there is a cost advantage
over the EE16.
The transformer turns ratio should be selected to give a VOR
(output voltage reflected through secondary to primary turns
ratio) of 40 V to 80 V. Higher VOR increases the output power
capability of LinkSwitch but also increases no-load power
consumption. This allows even higher values to be used in
designs where no-load power is not a concern. However care
should be taken to ensure that the maximum temperature rise
of the device is acceptable at the upper limit of the output
characteristic when used in a charger application. In all cases,
discontinuous mode operation should be maintained and note
that the linearity of the CC region of the power supply output
characteristic is influenced by the bias voltage. If this is an
important aspect of the application, the output characteristic
should be checked before finalizing the design.
Output Characteristic Variation
Both the device tolerance and external circuit govern the overall
tolerance of the LinkSwitch power supply output characteristic.
Estimated peak power point tolerances for a LNK520, 2.75 W
design are ±10% for voltage and ±24% for current limit for
overall variation in high volume manufacturing. This includes
device and transformer tolerances (±7.5% assumed) and line
variation. Lower power designs may have poorer constant
current linearity.
As the output load reduces from the peak power point, the
output voltage will tend to rise due to tracking errors compared
to the load terminals. Sources of these errors include the
output cable drop, output diode forward voltage and leakage
inductance, which is the dominant cause. As the load reduces,
the primary operating peak current reduces, together with the
leakage inductance energy, which reduces the peak charging
of the clamp capacitor.
At very light or no-load, typically less than 2 mA of output current,
the output voltage rises due to leakage inductance peak charging
of the secondary. This voltage rise can be reduced with a small
preload with little change to no-load power consumption. The
output voltage load variation can be improved across the whole
load range by adding an optocoupler and secondary reference
(Figure 6). The secondary reference is designed to only provide
feedback above the normal peak power point voltage to maintain
the correct constant current characteristic.
Component Selection
The schematic shown in Figure 10 outlines the key components
needed for a LinkSwitch supply.
Clamp diode – D5
Diode D5 can be an ultra-fast (trr < 50 ns), a fast (trr < 250 ns)
or standard recovery diode with a voltage rating of 600 V or
higher. A standard recovery diode is recommended as it improves
the CV characteristic, but should be a glass-passivated type
(1N400xGP) to ensure a defined reverse recovery time.
Clamp Capacitor – C4
Capacitor C4 should be in the range of 100 pF to 1000 pF,
500 V capacitor. A low cost ceramic disc is recommended.
The tolerance of this part has a very minor effect on the output
characteristic so any of the standard ±5%, ±10% or ±20%
tolerances are acceptable. 330 pF is a good initial value, iterated
with R1.
Clamp Resistor – R1
The value of R1 is selected to be the highest value that still
provides adequate margin to the DRAIN BVDSS rating at high
line. As a general rule, the value of C4 should be minimized
and R1 maximized.
CONTROL Pin Capacitor – C5
Capacitor C5 is used during start-up to power LinkSwitch and
sets the auto-restart frequency. For designs that have a battery
load, this component should have a value of 0.22 µF and for
resistive loads a value of 1 µF. This ensures there is sufficient
time during start-up for the output voltage to reach regulation.
Any capacitor type is acceptable with a voltage rating of
10 V or above.
Bias Capacitor – C3
Capacitor C3 should be a 1 µF, 50 V electrolytic type. The
voltage rating is consistent with the 20 V to 30 V seen across
the bias winding. Lower values give poorer regulation.
E
2/05
9
LNK520
Feedback Resistor – R4
The value of R4 is selected to give a feedback current into the
CONTROL pin of approximately 2.15 mA at the peak output
power point of the supply. The actual value depends on the bias
voltage, typically in the range 20 V to 35 V, selected during
design. Higher values for the bias voltage will increase no-load
power consumption. Any 1%, 0.25 W resistor is suitable.
Output Diode – D7
PN fast, PN ultra-fast or Schottky diodes can be used depending
on the efficiency target for the supply, Schottky diodes giving
higher efficiency than PN diodes. The diode voltage rating
should be sufficient to withstand the output voltage plus the
input voltage transformed through the turns ratio (a typical VOR
of 50 V requires a diode PIV of 50 V). Slow recovery diodes
are not recommended (1N400X types).
Output Capacitor – C6
Capacitor C6 should be selected such that its voltage and
ripple current specifications are not exceeded. Selecting a
capacitor with low equivalent series resistance (ESR) will
reduce peak-peak output ripple and improve overall supply
operating efficiency.
LinkSwitch Layout considerations
Primary Side Connections
The copper area connected to SOURCE should be maximized
to minimize temperature rise of the LinkSwitch device.
The CONTROL pin capacitor C5 should be located as close as
possible to the SOURCE and CONTROL pins.
To minimize EMI coupling from the switching DRAIN node on
the primary to both the secondary and AC input, the LinkSwitch
should be positioned away from the secondary of the transformer
and AC input.
The length and copper area of all PCB traces connecting to the
switching DRAIN node should be kept to an absolute minimum
to limit EMI radiation.
Y capacitor
If a Y capacitor is required, it should be connected close to the
transformer secondary output return pin(s) and the primary bulk
capacitor positive terminal. Such placement will maximize the
EMI benefit of the Y capacitor and avoid problems in commonmode surge testing.
Quick Design Checklist
As with any power supply design, all LinkSwitch designs
should be verified on the bench to make sure that component
specifications are not exceeded under worst-case conditions.
Performing the following minimum set of tests is strongly
recommended:
1. Maximum drain voltage – Verify that VDS does not exceed
675 V at highest input voltage and peak output power.
2. Maximum drain current – At maximum ambient temperature,
maximum input voltage and peak output power, verify drain
current waveforms at start-up for any signs of transformer
saturation and excessive leading edge current spikes.
LinkSwitch has a minimum leading edge blanking time of
200 ns to prevent premature termination of the on-cycle.
Verify that the leading edge current spike event is below
current limit at the end of the 200 ns blanking period.
3. Thermal check – At peak output power, minimum input
voltage and maximum ambient temperature, verify that the
temperature specifications are not exceeded for LinkSwitch,
transformer, output diode and output capacitors. Enough
thermal margin should be allowed for part-to-part variation of
the RDS(ON) of LinkSwitch as specified in the data sheet. Under
low line, peak power, a maximum LinkSwitch SOURCE pin
temperature of 100 °C is recommended to allow for these
variations.
4. Centered output characteristic – Using a transformer with
nominal primary inductance and at an input voltage midway
between low and high line, verify that the peak power point
occurs at ~4% above the desired nominal output current,
with the correct output voltage. If this does not occur, then
the design should be refined (increase LP) to ensure the
overall tolerance limits are met.
Selecting Between LNK500 and LNK520
The LNK500 and LNK520 differ in the circuit location of the
LinkSwitch device. The LNK500 is designed for high-side
operation and the LNK520 is designed for low-side operation.
The LNK520 can, however, be used in the high-side configuration
in certain applications. Refer to Figure 9 and supporting
description. Table 2 summarizes the considerations for selecting
which device to use.
Design Tools
Up to date information on design tools can be found at the
Power Integrations Web site: www.powerint.com.
10
E
2/05
LNK520
LinkSwitch
D
Input Filter
Capacitor
S
S
C
S
+
S
HV DC
Input
-
S
Y1Capacitor
Transformer
Output Capacitor
DC Out
+
PI-3732-103003
Figure 12. Recommended Circuit Board Layout for LinkSwitch using LNK520.
E
2/05
11
LNK520
Family
Considerations
LNK500
LNK520
• Lowest cost CV/CC implementation
• Source is connected to the switching
node – simple circuit configuration & low
component count
• Fast switching speeds minimize losses
for best efficiency
• Source PCB copper heatsink connected
to switching node – size should be
minimized to limit noise
• No bias winding required – simplest
circuit configuration
• Perfect for linear replacement in
applications where additional system
EMI shielding or filtering exists
Summary
• Very low cost CV/CC implementation
• Source connected to quiet low-side
primary return - easy layout & low noise
(low-side configuration only)
• Optimized switching speed – reduces
radiated EMI by up to 5 dB (Figure 13)
• Source PCB copper heatsink connected
to primary return – area can be
maximized for higher power without noise
(low-side configuration only)
• Bias winding required – allows higher
VOR, increasing power capability (low-side
configuration only)
• Perfect for systems where no additional
filtering or shielding exists
The LNK500 is recommended for cost
The LNK520 is recommended for both
sensitive applications in larger systems with stand-alone charger and adapter
existing EMI filtering (e.g. white goods).
applications, and larger systems where
EMI reduction is required (e.g. emergency
lighting).
Amplitude 10 dBµV/Div
PI-3861-031804
Table 2. Comparison of LNK500 and LNK520.
QP: LNK500
QP: LNK520
AV: LNK500
AV: LNK520
30.0
100.0
Frequency (MHz)
Figure 13. Comparison of LNK520 and LNK500 Showing an
Approximate 5 dBµV Reduction in Radiated EMI.
12
E
2/05
200.0
LNK520
ABSOLUTE MAXIMUM RATINGS(1,4)
DRAIN Voltage .................................................. -0.3 V to 700 V
DRAIN Peak Current......................................400 mA
CONTROL Voltage ................................................ -0.3 V to 9 V
CONTROL Current (not to exceed 9 V)............100 mA
Storage Temperature .......................................... -65 °C to 150 °C
Operating Junction Temperature(2) ..................... -40 °C to 150 °C
Lead Temperature(3) ........................................................260 °C
Notes:
1. All voltages referenced to SOURCE, TA = 25 °C.
2. Normally limited by internal circuitry.
3. 1/16 in. from case for 5 seconds.
4. Maximum ratings specified may be applied, one at a time,
without causing permanent damage to the product.
Exposure to Absolute Maximum Rating conditions for
extended periods of time may affect product reliability.
THERMAL IMPEDANCE
Thermal Impedance: P or G Package:
Notes:
(θJA) ........................... 70 °C/W(2); 60 °C/W(3) 1. Measured on pin 2 (SOURCE) close to plastic interface.
(θJC)(1) ............................................... 11 °C/W 2. Soldered to 0.36 sq. in. (232 mm2), 2 oz. (610 g/m2) copper clad.
3. Soldered to 1 sq. in. (645 mm2), 2 oz. (610 g/m2) copper clad.
Conditions
Parameter
SOURCE = 0 V; TJ = -40 to 125 °C
See Figure 14
(Unless Otherwise Specified)
Min
Typ
Max
Units
fOSC
IC = IDCT, TJ = 25 °C
34.5
42
49.5
kHz
fOSC(LOW)
Duty Cycle = DCLF
TJ = 25 °C
24
30
36
kHz
DCLF
Frequency Switching from fOSC to
fOSC(LOW), TJ = 25 °C
2.7
4.1
5.5
%
DC(RANGE)
Frequency = fOSC(LOW), TJ = 25 °C
2.0
3.5
5.0
%
DCMAX
IC = 1.5 mA
74
77
80
%
DCREG
IC = IDCT, TJ = 25 °C
-0.37
-0.27
-0.17
%/µA
IDCT
TJ = 25 °C
See Figure 4
2.06
2.15
2.25
mA
VC(IDCT)
IC = IDCT
5.5
5.75
6
V
ZC
IC = IDCT, TJ = 25 °C
60
90
120
Ω
Symbol
CONTROL FUNCTIONS
Switching
Frequency
Low Switching
Frequency
Duty Cycle at Low
Switching
Frequency
Low Frequency
Duty Cycle Range
Maximum Duty
Cycle
PWM Gain
CONTROL Pin
Current at 30%
Duty Cycle
CONTROL Pin
Voltage
Dynamic
Impedance
E
2/05
13
LNK520
Conditions
Parameter
Symbol
SOURCE = 0 V; TJ = -40 to 125 °C
See Figure 14
(Unless Otherwise Specified)
Min
Typ
Max
VC = 0 V
-4.5
-3.25
-2
VC = 5.15 V
-2.5
-1.8
-1.0
Units
SHUTDOWN/AUTO-RESTART
CONTROL Pin
Charging Current
Control/Supply/
Discharge Current
IC(CH)
TJ = 25 °C
ICD1
TJ = 25 °C Output MOSFET Enabled
0.68
0.75
0.82
ICD2
TJ = 25 °C Output MOSFET Disabled
0.5
0.6
0.7
Auto-Restart
VC(AR)
Threshold Voltage
Auto-Restart
VC(AR)hyst
Hysteresis Voltage
Auto-Restart Duty
DC(AR)
Cycle
Auto-Restart
f(AR)
Frequency
CIRCUIT PROTECTION
mA
mA
5.6
V
0.9
V
Short Circuit Applied at
Power Supply Output
8
%
S2 Open
C1 = 0.22 µF (See Figure 14)
300
Hz
Self-Protection
Current Limit
ILIM
TJ = 25 °C
di/dt = 90 mA/µs
See Note B
228
254
280
mA
I2 f Coefficient
I2 f
TJ = 25 °C
di/dt = 90 mA/µs
See Notes B, C
2412
2710
3008
A2Hz
ILIM(AR)
IC = ICD1, TJ = 25 °C
Current Limit at
Auto-Restart
Power Up Reset
Threshold Voltage
VC(RESET)
Leading Edge
Blanking Time
tLEB
IC = IDCT, TJ = 25 °C
Current Limit Delay
tIL(D)
TJ = 25 °C
Thermal Shutdown
Temperature
Thermal Shutdown
Hysteresis
14
E
2/05
IC = IDCT
165
mA
1.5
2.75
200
300
ns
100
ns
135
°C
70
°C
125
4.0
V
LNK520
Conditions
Parameter
Symbol
SOURCE = 0 V; TJ = -40 to 125 °C
See Figure 14
(Unless Otherwise Specified)
Min
Typ
Max
TJ = 25 °C
28
32
TJ = 100 °C
42
48
Units
OUTPUT
ON-State
Resistance
OFF-State Drain
Leakage Current
Breakdown Voltage
DRAIN Supply
Voltage
RDS(ON)
ID = 25 mA
IDSS
VC = 6.2 V
VD = 560 V, TA = 125 °C
BVDSS
See Note D
VC = 6.2 V, TA = 25 °C
700
See Note E
36
Ω
50
µA
V
50
V
NOTES:
A. For specifications with negative values, a negative temperature coefficient corresponds to an increase in
magnitude with increasing temperature, and a positive temperature coefficient corresponds to a decrease in
magnitude with increasing temperature.
B. IC is increased gradually to obtain maximum current limit at di/dt of 90 mA/µs. Increasing IC further would
terminate the cycle through duty cycle control.
C. This parameter is normalized to IDCT to correlate to power supply output current (it is multiplied by
IDCT(nominal)/IDCT).
D. Breakdown voltage may be checked against minimum BVDSS specification by ramping the DRAIN pin voltage
up to but not exceeding minimum BVDSS.
E. It is possible to start up and operate LinkSwitch at DRAIN voltages well below 36 V. However, the CONTROL
pin charging current is reduced, which affects start-up time, auto-restart frequency, and auto-restart duty cycle.
Refer to the characteristic graph on CONTROL pin charge current (IC) vs. DRAIN voltage (Figure 16) for low
voltage operation characteristics.
E
2/05
15
LNK520
LinkSwitch
750 Ω
D
S1
S
S
10 kΩ
S
S
C
S
S2
40 V
C1
0.22 µF
40 V
PI-2894-031004
Figure 14. LinkSwitch General Test Circuit.
t2
HV
t1
90%
90%
DRAIN
VOLTAGE
t
D= 1
t2
10%
0V
PI-2048-050798
Figure 15. Duty Cycle Measurement.
1.6
1.2
0.8
0.4
0
20
40
60
DRAIN Voltage (V)
Figure 16. IC vs. DRAIN Voltage.
E
2/05
100
80
60
40
20
0
0
16
120
PI-2895-102303
VC = 5.15 V
CONTROL Pin Current (mA)
CONTROL Pin
Charging Current (mA)
2
PI-3758-111303
Typical Performance Characteristics
80
100
0.0
2.0
4.0
6.0
8.0
10.0 12.0 14.0
CONTROL Pin Voltage (V)
Figure 17. CONTROL Pin I-V Characteristic.
LNK520
Typical Performance Characteristics (cont.)
Duty Cycle (%)
70
60
50
40
30
20
1.1
PI-2213-012301
80
Breakdown Voltage
(Normalized to 25 °C)
PI-3737-101703
90
1.0
10
0
CONTROL Pin Current (mA)
Figure 18. Duty Cycle vs. CONTROL Pin Current.
1.000
-50 -25
0.800
0.600
0.400
0.200
50
75 100 125 150
1.000
0.800
0.600
0.400
0.200
0.000
50
100
150
Junction Temperature (°C)
PI-3740-0101703
1.0
0.8
0.6
0.4
0.2
-50 -25
0
25
50
75 100 125 150
Junction Temperature (°C)
Figure 22. I2f Coefficient vs. Temperature.
0
25
50
75 100 125 150
Junction Temperature (°C)
Figure 21. Current Limit vs. Temperature.
Figure 20. Switching Frequency vs. Temperature.
1.2
-50 -25
1.200
PI-3741-101703
0
IDCT (Normalized for 25 °C)
-50
I2f Coefficient
(Normalized for 25 °C)
25
1.200
0.000
0.0
0
Junction Temperature (°C)
Figure 19. Breakdown Voltage vs. Temperature.
PI-3738-101703
1.200
Switching Frequency
(Normalized for 25 °C)
0.9
2.1 2.2 2.3 2.4 2.5 2.6 2.7
PI-3739-101703
2
Current Limit
(Normalized for 25 °C)
1.9
1.000
0.800
0.600
0.400
0.200
0.000
-50 -20
0
25
50
75 100 125 150
Junction Temperature (°C)
Figure 23. IDCT vs. Temperature.
E
2/05
17
LNK520
300
TCASE=25 °C
TCASE=100 °C
250
Drain Current (mA)
1
0.8
0.6
0.4
0.2
PI-2222-031401
1.2
PI-2899-062802
PWM Gain (Normalized for 25 °C)
Typical Performance Characteristics (cont.)
200
150
100
50
0
-50
0
50
100
0
150
0
Temperature (°C)
2
4
6
8
10
Drain Voltage (V)
Figure 24. PWM Gain vs. Temperature.
Figure 25. Output Characteristics (DRAIN Current vs.
DRAIN Voltage.
PART ORDERING INFORMATION
LinkSwitch Product Family
Series Number
Package Identifier
G
Plastic Surface Mount DIP
P
Plastic DIP
Lead Finish
Blank Standard (Sn Pb)
N
Pure Matte Tin (Pb-Free)
Tape & Reel and Other Options
Blank Standard Configurations
LNK 520 G N - TL
18
E
2/05
TL
Tape & Reel, 1 k pcs minimum, G package only
LNK520
DIP-8B
⊕ D S .004 (.10)
-E-
Notes:
1. Package dimensions conform to JEDEC specification
MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP)
package with .300 inch row spacing.
2. Controlling dimensions are inches. Millimeter sizes are
shown in parentheses.
3. Dimensions shown do not include mold flash or other
protrusions. Mold flash or protrusions shall not exceed
.006 (.15) on any side.
4. Pin locations start with Pin 1, and continue counter-clockwise to Pin 8 when viewed from the top. The notch and/or
dimple are aids in locating Pin 1. Pin 6 is omitted.
5. Minimum metal to metal spacing at the package body for
the omitted lead location is .137 inch (3.48 mm).
6. Lead width measured at package body.
7. Lead spacing measured with the leads constrained to be
perpendicular to plane T.
.137 (3.48)
MINIMUM
.240 (6.10)
.260 (6.60)
Pin 1
-D-
.367 (9.32)
.387 (9.83)
.125 (3.18)
.145 (3.68)
-T-
.015 (.38)
MINIMUM
SEATING
PLANE
.100 (2.54) BSC
.057 (1.45)
.068 (1.73)
(NOTE 6)
.008 (.20)
.015 (.38)
.120 (3.05)
.140 (3.56)
.300 (7.62) BSC
(NOTE 7)
.300 (7.62)
.390 (9.91)
.048 (1.22)
.053 (1.35)
.014 (.36)
.022 (.56) ⊕ T E D S .010 (.25) M
P08B
PI-2551-121504
SMD-8B
⊕ D S .004 (.10)
.137 (3.48)
MINIMUM
-E-
.372 (9.45)
.388 (9.86)
⊕ E S .010 (.25)
.240 (6.10)
.260 (6.60)
Pin 1
.100 (2.54) (BSC)
-D-
.367 (9.32)
.387 (9.83)
.057 (1.45)
.068 (1.73)
(NOTE 5)
.125 (3.18)
.145 (3.68)
.032 (.81)
.037 (.94)
.048 (1.22)
.053 (1.35)
Notes:
1. Controlling dimensions are
inches. Millimeter sizes are
shown in parentheses.
2. Dimensions shown do not
include mold flash or other
protrusions. Mold flash or
protrusions shall not exceed
.006 (.15) on any side.
.420
3. Pin locations start with Pin 1,
and continue counter-clock.046 .060 .060 .046
wise to Pin 8 when viewed
from the top. Pin 6 is omitted.
4. Minimum metal to metal
.080
spacing at the package body
Pin 1
for the omitted lead location
is .137 inch (3.48 mm).
.086
5. Lead width measured at
.186
package body.
.286
6. D and E are referenced
Solder Pad Dimensions
datums on the package
body.
.004 (.10)
.009 (.23)
.004 (.10)
.012 (.30)
.036 (0.91)
.044 (1.12)
0°- 8°
G08B
PI-2546-121504
E
2/05
19
LNK520
Revision Notes
Date
C
1) Released Final Data Sheet.
3/04
D
1) Added lead-free ordering information.
12/04
E
1) Minor descriptive change and formatting correction.
2/05
For the latest updates, visit our website: www.powerint.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume
any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY
DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
PATENT INFORMATION
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S.
and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrationsʼ patents
may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm.
LIFE SUPPORT POLICY
POWER INTEGRATIONSʼ PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:
1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform,
when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or death to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or effectiveness.
The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, EcoSmart, PI Expert and PI FACTS are trademarks of
Power Integrations, Inc. Other trademarks are property of their respective companies. ©Copyright 2005, Power Integrations, Inc.
Power Integrations Worldwide Sales Support Locations
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20
E
2/05
APPLICATIONS FAX
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