LINER LT1124AI Dual/quad low noise, high speed precision op amp Datasheet

LT1124/LT1125
Dual/Quad Low Noise,
High Speed Precision Op Amps
DESCRIPTIO
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FEATURES
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The LT®1124 dual and LT1125 quad are high performance
op amps that offer higher gain, slew rate and bandwidth
than the industry standard OP-27 and competing OP-270/
OP-470 op amps. In addition, the LT1124/LT1125 have
lower IB and IOS than the OP-27; lower VOS and noise
than the OP-270/OP-470.
100% Tested Low Voltage Noise: 2.7nV/√Hz Typ
4.2nV/√Hz Max
Slew Rate: 4.5V/µs Typ
Gain Bandwidth Product: 12.5MHz Typ
Offset Voltage, Prime Grade: 70µV Max
Low Grade: 100µV Max
High Voltage Gain: 5 Million Min
Supply Current Per Amplifier: 2.75mA Max
Common Mode Rejection: 112dB Min
Power Supply Rejection: 116dB Min
Available in 8-Pin SO Package
In the design, processing and testing of the device, particular attention has been paid to the optimization of the
entire distribution of several key parameters. Slew rate,
gain bandwidth and 1kHz noise are 100% tested for each
individual amplifier. Consequently, the specifications of
even the lowest cost grades (the LT1124C and the
LT1125C) have been spectacularly improved compared
to equivalent grades of competing amplifiers.
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APPLICATIO S
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Two and Three Op Amp Instrumentation Amplifiers
Low Noise Signal Processing
Active Filters
Microvolt Accuracy Threshold Detection
Strain Gauge Amplifiers
Direct Coupled Audio Gain Stages
Tape Head Preamplifiers
Infrared Detectors
Power consumption of the LT1124 is one half of two
OP-27s. Low power and high performance in an 8-pin SO
package make the LT1124 a first choice for surface mounted
systems and where board space is restricted.
For a decompensated version of these devices, with three
times higher slew rate and bandwidth, please see the
LT1126/LT1127 data sheet.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Protected by U.S. patents 4,775,884 and 4,837,496.
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TYPICAL APPLICATIO
Instrumentation Amplifier with Shield Driver
2
+
1
1/4
LT1125
–
1k
RF
3.4k
INPUT
+
+
–
15V
5
GUARD
8
1/4
LT1125
–
10
9
RG
100Ω
6
RG
100Ω
GUARD
13
12
–
1/4
LT1125
+
14
RF
3.4k
Input Offset Voltage Distribution
(All Packages, LT1124 and LT1125)
30k
30
VS = ± 15V
TA = 25°C
4
+
1/4
LT1125
–
11
7
OUTPUT
30k
–15V
GAIN = 30 (1 + RF/RG) ≈ 1000
POWER BW = 170kHz
SMALL-SIGNAL BW = 400kHz
NOISE = 3.8µV/√Hz AT OUTPUT
VOS = 35µV
1k
PERCENT OF UNITS
3
758 DUALS
200 QUADS
2316 UNITS
TESTED
20
10
0
–100
20
60
– 60
– 20
INPUT OFFSET VOLTAGE (µV)
100
1124/25 TA02
1124/25 TA01
1
LT1124/LT1125
W W
W
AXI U
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ABSOLUTE
RATI GS (Note 1)
Supply Voltage ..................................................... ±22V
Input Voltages ......................... Equal to Supply Voltage
Output Short-Circuit Duration ......................... Indefinite
Differential Input Current (Note 6) ..................... ±25mA
Lead Temperature (Soldering, 10 sec)................. 300°C
Storage Temperature Range ................ – 65°C to 150°C
Operating Temperature Range
LT1124AC/LT1124C
LT1125AC/LT1125C (Note 10) .......... – 40°C to 85°C
LT1124AI/LT1124I ............................ – 40°C to 85°C
LT1124AM/LT1124M
LT1125AM/LT1125M ...................... – 55°C to 125°C
W
U
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PACKAGE/ORDER I FOR ATIO
TOP VIEW
+IN A 1
V– 2
A
+IN B 3
8
–IN A
7
OUT A
6
V+
5
OUT B
B
–IN B 4
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 140°C, θJA = 190°C
ORDER PART
NUMBER
LT1124CS8
LT1124AIS8
LT1124IS8
S8 PART MARKING
1124
1124AI
1124I
NOTE: THIS PIN CONFIGURATION DIFFERS FROM THE
8-PIN PDIP CONFIGURATION. INSTEAD, IT FOLLOWS
THE INDUSTRY STANDARD LT1013DS8 SO PACKAGE
PIN LOCATIONS
TOP VIEW
OUT A
1
–IN A 2
+IN A 3
16 OUT D
A
D
V+ 4
+IN B 5
–IN B 6
B
OUT B 7
NC 8
C
8
V+
–IN A 2
7
OUT B
6
–IN B
5
+IN B
V
–
B
4
J8 PACKAGE
8-LEAD CERDIP
N8 PACKAGE
8-LEAD PDIP
TOP VIEW
15 –IN D
–IN A
2
14 +IN D
+IN A
3
V+
4
+IN B
5
11 –IN C
–IN B
6
10 OUT C
OUT B
7
9
LT1124CJ8
LT1124ACN8
LT1124CN8
LT1124AMJ8
LT1124MJ8
TJMAX = 160°C, θJA = 100°C (J8)
TJMAX = 140°C, θJA = 130°C (N8)
1
12 +IN C
A
+IN A 3
OUT A
LT1125CJ
LT1125ACN
LT1125CN
LT1125AMJ
LT1125MJ
14 OUT D
A
D
13 –IN D
12 +IN D
11 V –
B
C
10 +IN C
9
–IN C
8
OUT C
NC
J PACKAGE
N PACKAGE
14-LEAD CERDIP 14-LEAD PDIP
SW PACKAGE
16-LEAD PLASTIC (WIDE) SO
TJMAX = 160°C, θJA = 80°C (J)
TJMAX = 140°C, θJA = 110°C (N)
TJMAX = 140°C, θJA = 130°C
ELECTRICAL CHARACTERISTICS
TA = 25°C, VS = ±15V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS (Note 2)
VOS
Input Offset Voltage
LT1124
LT1125
∆VOS
∆Time
Long Term Input Offset
Voltage Stability
IOS
Input Offset Current
2
OUT A 1
LT1125CS
13 V –
ORDER PART
NUMBER
TOP VIEW
LT1124AC/AI/AM
LT1125AC/AM
MIN
TYP
MAX
LT1124/C/I/M
LT1125/C/M
MIN
TYP
MAX
20
25
25
30
70
90
0.3
LT1124
LT1125
5
6
100
140
6
7
µV
µV
µV/Mo
0.3
15
20
UNITS
20
30
nA
nA
LT1124/LT1125
ELECTRICAL CHARACTERISTICS
TA = 25°C, VS = ±15V, unless otherwise noted.
LT1124C/I/M
LT1125C/M
MIN
TYP
MAX
SYMBOL
PARAMETER
IB
Input Bias Current
±7
±20
±8
en
Input Noise Voltage
0.1Hz to 10Hz (Notes 8, 9)
70
200
70
Input Noise Voltage Density
fO = 10Hz (Note 4)
fO = 1000Hz (Note 3)
3.0
2.7
5.5
4.2
3.0
2.7
in
Input Noise Current Density
fO = 10Hz
fO = 1000Hz
1.3
0.3
VCM
Input Voltage Range
±12
±12.8
±12
±12.8
V
CMRR
Common Mode Rejection Ratio
VCM = ±12V
112
126
106
124
dB
PSRR
Power Supply Rejection Ratio
VS = ±4V to ±18V
116
126
110
124
dB
AVOL
Large-Signal Voltage Gain
RL ≥ 10k, VOUT = ±10V
RL ≥ 2k, VOUT = ±10V
5
2
17
4
3.0
1.5
15
3
V/µV
V/µV
VOUT
Maximum Output Voltage Swing
RL ≥ 2k
±13
±13.8
±12.5
±13.8
SR
Slew Rate
RL ≥ 2k (Notes 3, 7)
3
4.5
2.7
4.5
V/µs
GBW
Gain Bandwidth Product
fO = 100kHz (Note 3)
9
12.5
8
12.5
MHz
ZO
Open-Loop Output Resistance
VOUT = 0, IOUT = 0
IS
Supply Current per Amplifier
Channel Separation
CONDITIONS (Note 2)
LT1124AC/AI/AM
LT1125AC/AM
MIN
TYP
MAX
2.3
f ≤ 10Hz (Note 9)
VOUT = ±10V, RL = 2k
134
±30
nA
nVP-P
5.5
4.2
1.3
0.3
75
UNITS
nV/√Hz
nV/√Hz
pA/√Hz
pA/√Hz
V
Ω
75
2.75
150
2.3
130
2.75
mA
150
dB
The ● denotes the specifications which apply over the –55°C ≤ TA ≤ 125°C temperature range, VS = ±15V, unless otherwise noted.
LT1124AM
LT1125AM
MIN
TYP
MAX
LT1124M
LT1125M
MIN
TYP
MAX
SYMBOL
PARAMETER
CONDITIONS (Note 2)
VOS
Input Offset Voltage
LT1124
LT1125
●
●
50
55
170
190
60
70
250
290
UNITS
µV
µV
∆VOS
∆Temp
Average Input Offset
Voltage Drift
(Note 5)
●
0.3
1.0
0.4
1.5
µV/°C
IOS
Input Offset Current
LT1124
LT1125
●
●
18
18
45
55
20
20
60
70
nA
nA
IB
Input Bias Current
●
±18
±55
±20
±70
nA
VCM
Input Voltage Range
●
±11.3
±12
±11.3
±12
V
CMRR
Common Mode Rejection Ratio
VCM = ±11.3V
●
106
122
100
120
dB
PSRR
Power Supply Rejection Ratio
VS = ±4V to ±18V
●
110
122
104
120
dB
AVOL
Large-Signal Voltage Gain
RL ≥ 10k, VOUT = ±10V
RL ≥ 2k, VOUT = ±10V
●
●
3
1
10
3
2.0
0.7
10
2
V/µV
V/µV
VOUT
Maximum Output Voltage Swing
RL ≥ 2k
●
±12.5
±13.6
±12
±13.6
SR
Slew Rate
RL ≥ 2k (Notes 3, 7)
●
2.3
3.8
2
3.8
IS
Supply Current per Amplifier
●
2.5
3.25
2.5
V
V/µs
3.25
mA
3
LT1124/LT1125
ELECTRICAL CHARACTERISTICS
temperature range, VS = ±15V, unless otherwise noted.
SYMBOL
VOS
PARAMETER
Input Offset Voltage
∆VOS
∆Temp
IOS
Average Input Offset
Voltage Drift
Input Offset Current
IB
VCM
CMRR
PSRR
AVOL
Input Bias Current
Input Voltage Range
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
VOUT
SR
IS
Maximum Output Voltage Swing
Slew Rate
Supply Current per Amplifier
The ● denotes the specifications which apply over the 0°C ≤ TA ≤ 70°C
CONDITIONS (Note 2)
LT1124
LT1125
(Note 5)
●
●
LT1124
LT1125
●
●
●
LT1124AC
LT1125AC
MIN
TYP
MAX
35
120
40
140
0.3
1
LT1124C
LT1125C
MIN
TYP
MAX
45
170
50
210
0.4
1.5
6
7
±8
±12.4
125
125
15
3.5
±13.7
4
2.4
7
8
±9
±12.4
122
122
14
2.5
±13.7
4
2.4
●
●
VCM = ±11.5V
VS = ±4V to ±18V
RL ≥ 10k, VOUT = ±10V
RL ≥ 2k, VOUT = ±10V
RL ≥ 2k
RL ≥ 2k (Notes 3, 7)
●
●
●
●
●
●
±11.5
109
112
4.0
1.5
±12.5
2.6
●
25
35
±35
±11.5
102
107
2.5
1.0
±12
2.4
3
35
45
±45
3
UNITS
µV
µV
µV/°C
nA
nA
nA
V
dB
dB
V/µV
V/µV
V
V/µs
mA
The ● denotes the specifications which apply over the –40°C ≤ TA ≤ 85°C temperature range, VS = ±15V,
unless otherwise noted. (Note 10)
SYMBOL
VOS
PARAMETER
Input Offset Voltage
∆VOS
∆Temp
IOS
Average Input Offset
Voltage Drift
Input Offset Current
IB
VCM
CMRR
PSRR
AVOL
Input Bias Current
Input Voltage Range
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
VOUT
SR
IS
Maximum Output Voltage Swing
Slew Rate
Supply Current per Amplifier
CONDITIONS (Note 2)
LT1124
LT1125
(Note 5)
●
●
LT1124
LT1125
●
●
●
●
VCM = ±11.4V
VS = ±4V to ±18V
RL ≥ 10k, VOUT = ±10V
RL ≥ 2k, VOUT = ±10V
RL ≥ 2k
RL ≥ 2k (Notes 3, 7)
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Typical parameters are defined as the 60% yield of parameter
distributions of individual amplifiers; i.e., out of 100 LT1125s (or 100
LT1124s) typically 240 op amps (or 120) will be better than the indicated
specification.
Note 3: This parameter is 100% tested for each individual amplifier.
Note 4: This parameter is sample tested only.
Note 5: This parameter is not 100% tested.
Note 6: The inputs are protected by back-to-back diodes. Current limiting
resistors are not used in order to achieve low noise. If differential input
voltage exceeds ±1.4V, the input current should be limited to 25mA.
4
●
LT1124AC/AI
LT1125AC
MIN
TYP
MAX
40
140
45
160
0.3
1
●
●
●
●
●
●
●
±11.4
107
111
3.5
1.2
±12.5
2.4
15
15
±15
±12.2
124
124
12
3.2
±13.6
3.9
2.4
LT1124C/I
LT1125C
MIN
TYP
50
55
0.4
40
50
±50
±11.4
101
106
2.2
0.8
±12
2.1
3.25
17
17
±17
±12.2
121
121
12
2.3
±13.6
3.9
2.4
MAX
200
240
1.5
UNITS
µV
µV
µV/°C
55
65
±65
nA
nA
nA
V
dB
dB
V/µV
V/µV
V
V/µs
mA
3.25
Note 7: Slew rate is measured in AV = –1; input signal is ±7.5V, output
measured at ±2.5V.
Note 8: 0.1Hz to 10Hz noise can be inferred from the 10Hz noise voltage
density test. See the test circuit and frequency response curve for 0.1Hz to
10Hz tester in the Applications Information section of the LT1007 or
LT1028 data sheets.
Note 9: This parameter is guaranteed but not tested.
Note 10: The LT1124C/LT1125C and LT1124AC/LT1125AC are guaranteed
to meet specified performance from 0°C to 70°C and are designed,
characterized and expected to meet these extended temperature limits, but
are not tested at –40°C and 85°C. The LT1124AI and LT1124I are
guaranteed to meet the extended temperature limits.
LT1124/LT1125
U W
TYPICAL PERFOR A CE CHARACTERISTICS
0.1Hz to 10Hz Voltage Noise
0.01Hz to 1Hz Voltage Noise
Voltage Noise vs Frequency
RMS VOLTAGE NOISE DENSITY (nV/√Hz)
VOLTAGE NOISE (40nV/DIV)
VOLTAGE NOISE (40nV/DIV)
100
8
0
10
20
40
60
TIME (SECONDS)
80
1124/25 G01
1.0
MAXIMUM
0.3
TYPICAL
0.1
100
1k
FREQUENCY (Hz)
10
LT1124M/LT1125M
LT1124AM/LT1125AM
0
–75 –50 –25 0
25 50 75
TEMPERATURE (°C)
10k
160
COMMON MODE REJECTION RATIO (dB)
INPUT BIAS CURRENT (nA)
10
DEVICE WITH POSITIVE
INPUT CURRENT
0
–5
DEVICE WITH NEGATIVE
INPUT CURRENT
–15
–10
–5
5
10
0
COMMON MODE INPUT VOLTAGE (V)
15
1124/25 G07
10
100
FREQUENCY (Hz)
1000
VS = ±15V
40
25°C
– 55°C
30
20
125°C
10
0
–10
25°C
–30
–55°C
–40
–50
100 125
125°C
–20
1
0
2
3
4
TIME FROM OUTPUT SHORT TO GND (MINUTES)
LT1124 G06
Common Mode Rejection Ratio
vs Frequency
VS = ±15V
15 TA = 25°C
1.0
TYPICAL
1124/25 G05
20
–20
–15
50
20
Input Bias Current Over the
Common Mode Range
– 10
1/f CORNER
2.3Hz
Output Short-Circuit Current
vs Time
VS = ±15V
1124 G04
5
3
1124/25 G03
SOURCING
INPUT BIAS OR OFFSET CURRENT (nA)
RMS CURRENT NOISE DENSITY (pA/√Hz)
30
3.0
10
MAXIMUM
Input Bias or Offset Current
vs Temperature
VS = ±15V
TA = 25°C
1/f CORNER
100Hz
10
1124/25 G02
Current Noise vs Frequency
10.0
30
1
0.1
100
SHORT-CIRCUIT CURRENT (mA)
4
6
TIME (SECONDS)
SINKING
2
Power Supply Rejection Ratio
vs Frequency
TA = 25°C
VS = ±15V
VCM = ±10V
140
120
100
80
60
40
20
0
160
POWER SUPPLY REJECTION RATIO (dB)
0
VS = ±15V
TA = 25°C
TA = 25°C
140
120
100
80
– PSRR
60
+PSRR
40
20
0
1k
10k
100k
1M
FREQUENCY (Hz)
10M
1124/25 G08
1
10
102 103 104 105 106
FREQUENCY (Hz)
107 108
1124/25 G09
5
LT1124/LT1125
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Voltage Gain vs Frequency
180
Voltage Gain vs Temperature
VS = ±15V
TA = 25°C
18
60
14
LT1124M/LT1125M
12
10
VS = ±15V
VOUT = ± 10V
8
6
RL = 2k
100
10k
FREQUENCY (Hz)
100M
1M
140
GAIN
10
180
0.1
100 125
1124/25 G12
1124/25 G11
50
10
30
OFFSET VOLTAGE (µV)
20
Supply Current vs Supply Voltage
3
VS = ±15V
40
20
10
0
–10
–20
–30
–40
0
–0.4
0
–0.8
0.4
0.8
INPUT OFFSET VOLTAGE DRIFT (µV/°C)
–50
–50 –25
125°C
25°C
2
–55°C
1
0
75
0
25
50
TEMPERATURE (°C)
100
125
0
Small-Signal Transient Response
Output Voltage Swing vs
Load Current
Large-Signal Transient Response
–1.0
OUTPUT VOLTAGE SWING (V)
10V
0
– 10V
– 50mV
AVCL = +1
VS = ±15V or ±5V
CL = 15pF
1124/25 G16
AVCL = –1
VS = ±15V
1124/25 G17
±20
1124/25 G15
V + –0.8
0
±5
±10
±15
SUPPLY VOLTAGE (V)
1124/25 G14
1124/25 G13
50mV
200
100
1
10
FREQUENCY (MHz)
Offset Voltage Drift with
Temperature of Representative
Units
200 N8
100 S8
96 J8
396 UNITS TESTED
160
–10
0
–75 –50 –25 0
25 50 75
TEMPERATURE (°C)
Input Offset Voltage Drift
Distribution
30
20
LT1124M/LT1125M
1124/25 G10
VS = ±15V
120
SUPPLY CURRENT PER AMPLIFIER (mA)
1
30
0
2
– 20
0.01
100
LT1124AM/LT1125AM
4
20
PERCENT OF UNITS
VOLTAEG GAIN (dB)
VOLTAGE GAIN (V/ µV)
100
Ø
PHASE SHIFT (DEGREES)
VOLTAGE GAIN (dB)
40
RL = 10k
80
VS = ±15V
TA = 25°C
CL = 10pF
LT1124AM/LT1125AM
16
140
40
Gain, Phase Shift vs Frequency
50
20
VS = ±3V TO ±18V
125°C
–1.2
–1.4
25°C
–55°C
–1.6
1.2
–55°C
1.0
0.8
25°C
125°C
0.6
V – 0.4
–10 –8 –6 –4 –2 0
2 4 6 8 10
ISINK
ISOURCE
OUTPUT CURRENT (mA)
1124/25 G18
6
LT1124/LT1125
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Common Mode Limit vs
Temperature
V + –0.5
Channel Separation vs Frequency
10
–1.5
V + = 3V TO 18V
–2.0
–2.5
2.5
V – = –3V TO –18V
2.0
1.5
140
120
VS = ±15V
RL = 2k
VOUT = 7VP-P
TA = 25°C
100
80
60
LIMITED BY PIN
TO PIN CAPACITANCE
40
20
1.0
V – 0.5
–60
0
–20
20
60
100
TEMPERATURE (°C)
100
1k
10k 100k
FREQUENCY (Hz)
1M
AV = +10
0.001
AV = +1
10k 20k
0.1
0.010
AV = –100
AV = –10
0.001
AV = –1
0.0001
20
0
ZL = 2k/15pF
fO = 1kHz
AV = +1, +10, +100
0.1 MEASUREMENT BANDWIDTH
= 10Hz TO 22kHz
AV = +100
0.010
AV = +10
AV = +1
10
OUTPUT SWING (VP-P)
30
1124/25 G25
4
1
2
3
TIME AFTER POWER ON (MINUTES)
100
1k
FREQUENCY (Hz)
10k 20k
0.1
ZL = 2k/15pF
VO = 20Vp-p
AV = –10
MEASUREMENT BANDWIDTH
= 10Hz TO 80kHz
0.010
OP270
OP27
0.001
LT1124
0.0001
20
100
1k
FREQUENCY (Hz)
1124/25 G24
0.010
ZL = 2k/15pF
fO = 1kHz
AV = –1, –10, –100
0.1 MEASUREMENT BANDWIDTH
= 10Hz TO 22kHz
AV = –100
AV = –10
0.001
0.0001
0.3
AV = –1
1
10
OUTPUT SWING (Vp-p)
10k 20k
Intermodulation Distortion
(CCIF Method)* vs Frequency
LT1124 and OP270
1
0.010
5
1124/25 G21
INTERMODULATION DISTORTION (IMD)(%)
TOTAL HARMONIC DISTORTION + NOISE (%)
TOTAL HARMONIC DISTORTION + NOISE (%)
2
Total Harmonic Distortion and
Noise vs Output Amplitude for
Inverting Gain
1
1
N, J PACKAGES
4
1124/25 G23
Total Harmonic Distortion and
Noise vs Output Amplitude for
Noninverting Gain
0.0001
0.3
6
Total Harmonic Distortion
and Noise vs Frequency for
Competitive Devices
ZL = 2k/15pF
VO = 20Vp-p
AV = –1, –10, –100
MEASUREMENT BANDWIDTH
= 10Hz TO 80kHz
1124/25 G22
0.001
10M
TOTAL HARMONIC DISTORTION + NOISE (%)
TOTAL HARMONIC DISTORTION + NOISE (%)
TOTAL HARMONIC DISTORTION + NOISE (%)
AV = +100
1k
FREQUENCY (Hz)
SO PACKAGE
Total Harmonic Distortion
and Noise vs Frequency for
Inverting Gain
ZL = 2k/15pF
VO = 20VP-P
AV = +1, +10, +100
MEASUREMENT BANDWIDTH
= 10Hz TO 80kHz
100
8
1124/25 G20
Total Harmonic Distortion
and Noise vs Frequency for
Noninverting Gain
0.0001
20
VS = ±15V
TA = 25°C
0
0
140
1124/25 G19
0.010
CHANGE IN OFFSET VOLTAGE (µV)
LIMITED BY
THERMAL INTERACTION
160
CHANNEL SEPARATION (dB)
COMMON MODE LIMIT (V)
REFERRED TO POWER SUPPLY
–1.0
0.1
Warm-Up Drift
180
30
1124/25 G26
ZL = 2k/15pF
f (IM) = 1kHz
fO = 13.5kHz
VO = 20Vp-p
AV = –10
MEASUREMENT BANDWIDTH
= 10Hz TO 80kHz
0.001
0.0001
3k
OP270
LT1124
10k
FREQUENCY (Hz)
20k
1124/25 G27
*See LT1115 data sheet for definition of CCIF testing
7
LT1124/LT1125
U
W
U
UO
APPLICATI
S I FOR ATIO
The LT1124 may be inserted directly into OP-270 sockets.
The LT1125 plugs into OP-470 sockets. Of course, all
standard dual and quad bipolar op amps can also be
replaced by these devices.
(5µV/V). However, Table 1 can be used to estimate the
expected matching performance between the two sides of
the LT1124, and between amplifiers A and D, and between
amplifiers B and C of the LT1125.
Matching Specifications
Offset Voltage and Drift
In many applications the performance of a system depends on the matching between two op amps, rather than
the individual characteristics of the two devices. The three
op amp instrumentation amplifier configuration shown in
this data sheet is an example. Matching characteristics are
not 100% tested on the LT1124/LT1125.
Thermocouple effects, caused by temperature gradients
across dissimilar metals at the contacts to the input
terminals, can exceed the inherent drift of the amplifier
unless proper care is exercised. Air currents should be
minimized, package leads should be short, the two input
leads should be close together and maintained at the same
temperature.
Some specifications are guaranteed by definition. For
example, 70µV maximum offset voltage implies that mismatch cannot be more than 140µV. 112dB (= 2.5µV/V)
CMRR means that worst case CMRR match is 106dB
The circuit shown in Figure 1 to measure offset voltage is
also used as the burn-in configuration for the LT1124/
LT1125, with the supply voltages increased to ±16V.
50k*
15V
–
100Ω*
VOUT
+
50k*
–15V
VOUT = 1000VOS
*RESISTORS MUST HAVE LOW
THERMOELECTRIC POTENTIAL
1124/25 F01
Figure 1. Test Circuit for Offset Voltage
and Offset Voltage Drift with Temperature
Table 1. Expected Match
LT1124AC/AM
LT1125AC/AM
PARAMETER
VOS Match, ∆VOS
LT1124
LT1124C/M
LT1125C/M
50% YIELD
98% YIELD
50% YIELD
98% YIELD
20
110
30
130
UNITS
µV
30
150
50
180
µV
0.35
1.0
0.5
1.5
µV/°C
Average Noninverting IB
6
18
7
25
nA
Match of Noninverting IB
7
22
8
30
nA
LT1125
Temperature Coefficient Match
CMRR Match
126
115
123
112
dB
PSRR Match
127
118
127
114
dB
8
LT1124/LT1125
W
U
U
UO
APPLICATI
S I FOR ATIO
High Speed Operation
When the feedback around the op amp is resistive (RF),
a pole will be created with RF, the source resistance and
capacitance (RS, CS), and the amplifier input capacitance
(CIN ≈ 2pF). In low closed loop gain configurations and
with RS and RF in the kilohm range, this pole can create
excess phase shift and even oscillation. A small capacitor
(CF) in parallel with RF eliminates this problem (see
Figure 2). With RS (CS + CIN) = RF CF, the effect of the
feedback pole is completely removed.
CF
RF
CS
Noise Testing
Each individual amplifier is tested to 4.2nV/√Hz voltage
noise; i.e., for the LT1124 two tests, for the LT1125 four
tests are performed. Noise testing for competing multiple
op amps, if done at all, may be sample tested or tested
using the circuit shown in Figure 4.
en OUT = √(enA)2 + (enB)2 + (enC)2 + (enD)2
–
RS
During the fast feedthrough-like portion of the output, the
input protection diodes effectively short the output to the
input and a current, limited only by the output short circuit
protection, will be drawn by the signal generator. With RF
≥500Ω, the output is capable of handling the current
requirements (IL ≤ 20mA at 10V) and the amplifier stays
in its active mode and a smooth transition will occur.
CIN
OUTPUT
+
1124/25 F02
Figure 2. High Speed Operation
If the LT1125 were tested this way, the noise limit would
be √ 4 • (4.2nV/√Hz)2 = 8.4nV/√Hz. But is this an effective
screen? What if three of the four amplifiers are at a typical
2.7nV/√Hz, and the fourth one was contaminated and has
6.9nV/√Hz noise?
RMS Sum = √(2.7)2 + (2.7)2 + (2.7)2 + (6.9)2 = 8.33nV/√Hz
Unity Gain Buffer Applications
When R F ≤ 100Ω and the input is driven with a fast, large
signal pulse (>1V), the output waveform will look as
shown in Figure 3.
This passes an 8.4nV/√Hz spec, yet one of the amplifiers
is 64% over the LT1125 spec limit. Clearly, for proper
noise measurement, the op amps have to be tested
individually.
RF
–
+
OUTPUT
4.5V/µs
+
1124/25 F03
Figure 3. Unity-Gain Buffer Applications
–
–
A
+
–
–
B
+
C
+
D
OUT
1124/25 F04
Figure 4. Competing Quad Op Amp Noise Test Method
9
LT1124/LT1125
W
U
U W
PERFOR A CE CO PARISO
Table 2 summarizes the performance of the LT1124/
LT1125 compared to the low cost grades of alternate
approaches.
but in most cases are superior. Normally dual and quad
performance is degraded when compared to singles, for
the LT1124/LT1125 this is not the case.
The comparison shows how the specs of the LT1124/
LT1125 not only stand up to the industry standard OP-27,
Table 2. Guaranteed Performance, VS = ±15V, TA = 25°C, Low Cost Devices
LT1124CN8
LT1125CN
OP-27 GP
OP-270 GP
OP-470 GP
UNITS
Voltage Noise, 1kHz
4.2
100% Tested
4.5
Sample Tested
–
No Limit
5.0
Sample Tested
nV/√Hz
Slew Rate
2.7
100% Tested
1.7
Not Tested
1.7
1.4
V/µs
Gain Bandwidth Product
8.0
100% Tested
5.0
Not Tested
–
No Limit
–
No Limit
MHz
PARAMETER/UNITS
Offset Voltage
LT1124
LT1125
100
140
100
–
250
–
–
1000
µV
µV
Offset Current
LT1124
LT1125
20
30
75
–
20
–
–
30
nA
nA
Bias Current
30
80
60
60
nA
Supply Current/Amp
2.75
5.67
3.25
2.75
mA
Voltage Gain, RL = 2k
1.5
0.7
0.35
0.4
V/µV
Common Mode Rejection Ratio
106
100
90
100
dB
Power Supply Rejection Ratio
110
94
104
105
dB
Yes - LT1124
Yes
No
–
SO-8 Package
UO
TYPICAL APPLICATI
S
Gain 1000 Amplifier with 0.01% Accuracy, DC to 1Hz
365Ω
1%
15k
5%
1.0
20k
TRIM
15V
2
–
3
+
6 (S0-8)
8 (N8)
1/2 LT1124
4
7 (SO-8)
1 (N8)
OUTPUT
RN60C FILM RESISTORS
INPUT
TYPICAL
PRECISION
OP AMP
0.1
LT1124/LT1125
0.01
–15V
THE HIGH GAIN AND WIDE BANDWIDTH OF THE LT1124/LT1125, IS USEFUL IN LOW
FREQUENCY HIGH CLOSED-LOOP GAIN AMPLIFIER APPLICATIONS. A TYPICAL
PRECISION OP AMP MAY HAVE AN OPEN-LOOP GAIN OF ONE MILLION WITH 500kHz
BANDWIDTH. AS THE GAIN ERROR PLOT SHOWS, THIS DEVICE IS CAPABLE OF 0.1%
AMPLIFYING ACCURACY UP TO 0.3Hz ONLY. EVEN INSTRUMENTATION RANGE
SIGNALS CAN VARY AT A FASTER RATE. THE LT1124/LT1125 “GAIN PRECISION —
BANDWIDTH PRODUCT” IS 75 TIMES HIGHER, AS SHOWN.
1124/25 TA03
10
GAIN ERROR (PERCENT)
340k
1%
Gain Error vs Frequency Closed-Loop Gain = 1000
GAIN ERROR =
0.001
0.1
CLOSED-LOOP GAIN
OPEN-LOOP GAIN
1
10
FREQUENCY (Hz)
100
1124/25 TA04
LT1124/LT1125
W
W
SCHE ATIC DIAGRA
(1/2 LT1124, 1/4 LT1125)
V+
570µA
360µA
Q7
100µA
Q28
21k
200pF
21k
3.6k
3.6k
35pF
Q27
Q18
Q9
Q13
Q17
Q10
Q26
Q19
NONINVERTING
INPUT (+)
20Ω
Q25
Q8
OUTPUT
900Ω
Q20
20Ω
V–
Q1A
Q2A
Q1B
400Ω
Q30
Q2B
67pF
INVERTING
INPUT (–)
20pF
V+
Q3
Q29
V+
Q22
Q11
Q12 Q15
Q16
Q23
Q24
200µA
200µA
100µA
200Ω
6k
200Ω
6k
50Ω
V–
1124/25 SS
11
LT1124/LT1125
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
J8 Package
8-Lead CERDIP (Narrow 0.300, Hermetic)
(LTC DWG # 05-08-1110)
CORNER LEADS OPTION
(4 PLCS)
0.405
(10.287)
MAX
0.005
(0.127)
MIN
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
OPTION
8
6
7
5
0.025
(0.635)
RAD TYP
0.045 – 0.068
(1.143 – 1.727)
FULL LEAD
OPTION
0.220 – 0.310
(5.588 – 7.874)
1
2
3
4
0.300 BSC
(0.762 BSC)
0.200
(5.080)
MAX
0.015 – 0.060
(0.381 – 1.524)
0.008 – 0.018
(0.203 – 0.457)
0° – 15°
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
0.045 – 0.068
(1.143 – 1.727)
0.125
3.175
0.100 ± 0.010 MIN
(2.540 ± 0.254) J8 1197
0.014 – 0.026
(0.360 – 0.660)
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400*
(10.160)
MAX
8
7
6
5
1
2
3
4
0.255 ± 0.015*
(6.477 ± 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.009 – 0.015
(0.229 – 0.381)
(
+0.035
0.325 –0.015
8.255
+0.889
–0.381
)
0.045 – 0.065
(1.143 – 1.651)
0.065
(1.651)
TYP
0.100 ± 0.010
(2.540 ± 0.254)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
12
0.130 ± 0.005
(3.302 ± 0.127)
0.125
(3.175) 0.020
MIN
(0.508)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
N8 1197
LT1124/LT1125
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
8
7
6
5
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
0.014 – 0.019
(0.355 – 0.483)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
2
3
4
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
TYP
SO8 0996
13
LT1124/LT1125
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
J Package
14-Lead CERDIP (Narrow 0.300, Hermetic)
(LTC DWG # 05-08-1110)
0.005
(0.127)
MIN
0.785
(19.939)
MAX
14
13
11
12
10
9
8
0.220 – 0.310
(5.588 – 7.874)
0.025
(0.635)
RAD TYP
1
2
3
4
5
6
7
0.200
(5.080)
MAX
0.300 BSC
(0.762 BSC)
0.015 – 0.060
(0.381 – 1.524)
0.008 – 0.018
(0.203 – 0.457)
0° – 15°
0.100 ± 0.010
(2.540 ± 0.254)
0.045 – 0.068
(1.143 – 1.727)
0.125
(3.175)
MIN
0.014 – 0.026
(0.360 – 0.660)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
J14 1197
N Package
14-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.770*
(19.558)
MAX
14
13
12
11
10
9
8
1
2
3
4
5
6
7
0.255 ± 0.015*
(6.477 ± 0.381)
0.130 ± 0.005
(3.302 ± 0.127)
0.300 – 0.325
(7.620 – 8.255)
0.045 – 0.065
(1.143 – 1.651)
0.020
(0.508)
MIN
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
+0.035
0.325 –0.015
0.005
(0.125)
MIN
0.100 ± 0.010
(2.540 ± 0.254)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
(
8.255
14
+0.889
–0.381
)
0.125
(3.175)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
N14 1197
LT1124/LT1125
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
SW Package
16-Lead Plastic Small Outline (Wide 0.300)
(LTC DWG # 05-08-1620)
0.398 – 0.413*
(10.109 – 10.490)
16
15
14
13
12
11
10
9
0.394 – 0.419
(10.007 – 10.643)
NOTE 1
1
0.291 – 0.299**
(7.391 – 7.595)
2
3
4
5
6
7
0.093 – 0.104
(2.362 – 2.642)
0.010 – 0.029 × 45°
(0.254 – 0.737)
8
0.037 – 0.045
(0.940 – 1.143)
0° – 8° TYP
0.009 – 0.013
(0.229 – 0.330)
NOTE 1
0.016 – 0.050
(0.406 – 1.270)
0.050
(1.270)
TYP
0.004 – 0.012
(0.102 – 0.305)
0.014 – 0.019
(0.356 – 0.482)
TYP
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
S16 (WIDE) 0396
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT1124/LT1125
U
TYPICAL APPLICATION
Strain Gauge Signal Conditioner with Bridge Excitation
15V
1k
5k
3
2.5V
LT1009
2
THE LT1124/LT1125 IS CAPABLE OF PROVIDING EXCITATION CURRENT DIRECTLY
TO BIAS THE 350Ω BRIDGE AT 5V WITH ONLY 5V ACROSS THE BRIDGE (AS OPPOSED
TO THE USUAL 10V) TOTAL POWER DISSIPATION AND BRIDGE WARM-UP DRIFT IS
REDUCED. THE BRIDGE OUTPUT SIGNAL IS HALVED, BUT THE LT1124/LT1125 CAN
AMPLIFY THE REDUCED SIGNAL ACCURATELY.
+
1/4
LT1125
1
–
–15V
REFERENCE
OUTPUT
350Ω
BRIDGE
15V
5
301k*
10k
ZERO
TRIM
15V
13
12
6
4
+
–
13
1µF
50k
14
+
0V TO 10V
OUTPUT
301k*
–15V
–
1/4
LT1125
7
1/4
LT1125
GAIN
TRIM
1k
499Ω*
*RN60C FILM RESISTORS
1124/25 TA05
–15V
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1007
Single Low Noise, Precision Op Amp
2.5nV/√Hz 1kHz Voltage Noise
LT1028/LT1128
Single Low Noise, Precision Op Amps
0.85nV/√Hz Voltage Noise
LT1112/LT1114
Dual/Quad Precision Picoamp Input
250pA Max IB
LT1113
Dual Low Noise JFET Op Amp
4.5nV/√Hz Voltage Noise, 10fA/√Hz Current Noise
LT1126/LT1127
Decompensated LT1124/LT1125
11V/µs Slew Rate
LT1169
Dual Low Noise JFET Op Amp
6nV/√Hz Voltage Noise, 1fA/√Hz Current Noise, 10pA Max IB
LT1792
Single LT1113
4.2nV/√Hz Voltage Noise, 10fA/√Hz Current Noise
LT1793
Single LT1169
6nV/√Hz Voltage Noise, 1fA/√Hz Current Noise, 10pA Max IB
16
Linear Technology Corporation
11245fas, sn11245 LT/TP 0699 REV A 2K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
 LINEAR TECHNOLOGY CORPORATION 1992
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