LINER LT1245 High speed current mode pulse width modulator Datasheet

LT1241 Series
High Speed Current Mode
Pulse Width Modulators
U
DESCRIPTIO
FEATURES
■
■
■
■
■
■
■
■
■
■
■
■
The LT ®1241 series devices are 8-pin, fixed frequency,
current mode, pulse width modulators. They are improved
plug compatible versions of the industry standard UC1842
series. These devices have both improved speed and
lower quiescent current. The LT1241 series is optimized
for off-line and DC/DC converter applications. They contain a temperature-compensated reference, high gain error amplifier, current sensing comparator and a high
current totem pole output stage ideally suited to driving
power MOSFETs. Start-up current has been reduced to
less than 250µA. Cross-conduction current spikes in
the output stage have been eliminated, making 500kHz
operation practical. Several new features have been incorporated. Leading edge blanking has been added to the
current sense comparator. Trims have been added to the
oscillator circuit for both frequency and sink current, and
both of these parameters are tightly specified. The output
stage is clamped to a maximum VOUT of 18V in the
on state. The output and the reference output are actively
pulled low during undervoltage lockout.
Low Start-Up Current: < 250µA
50ns Current Sense Delay
Current Mode Operation: To 500kHz
Pin Compatible with UC1842 Series
Undervoltage Lockout with Hysteresis
No Cross-Conduction Current
Trimmed Bandgap Reference
1A Totem Pole Output
Trimmed Oscillator Frequency and Sink Current
Active Pull-Down on Reference and Output During
Undervoltage Lockout
High Level Output Clamp: 18V
Current Sense Leading Edge Blanking
UO
APPLICATI
■
■
S
Off-Line Converters
DC/DC Converters
, LTC and LT are registered trademarks of Linear Technology Corporation.
W
BLOCK DIAGRA
REFERENCE ENABLE
5V REF
MAIN BIAS
RT/CT
4
COMP
1
FB
2
UV
LOCKOUT
REFERENCE PULL-DOWN
OUTPUT
PULL-DOWN
8
VREF
7
VCC
6
OUTPUT
5
GND
OSCILLATOR
T
5.6V
1V
S
R
–
BLANKING
1mA
–
2R
2.5V
+
R
18V
+
+
1.5V
ISENSE
3
–
1241 BD01
1
LT1241 Series
U
U
RATI GS
PACKAGE/ORDER I FOR ATIO
W W
W
Supply Voltage ........................................................ 25V
Output Current ....................................................... ±1A*
Output Energy (Capacitive Load per Cycle) ...............5µJ
Analog Inputs (Pins 2, 3) ............................... – 0.3 to 6V
Error Amplifier Output Sink Current...................... 10mA
Power Dissipation at TA ≤ 25°C ................................ 1W
Operating Junction Temperature Range
LT124XC ............................................. 0°C to 100°C
LT124XI......................................... – 40°C to 100°C
LT124XM........................................ – 55°C to 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
TOP VIEW
COMP 1
8
VREF
FB 2
7
VCC
ISENSE 3
6
OUTPUT
RT/CT 4
5
GND
J8 PACKAGE
8-LEAD CERDIP
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
PARAMETER
LT124XCJ8
LT124XCN8
LT124XCS8
LT124XIN8
LT124XIS8
LT124XMJ8
S8 PART MARKING
TJMAX = 125°C, θJA = 100°C/W (J8)
TJMAX = 100°C, θJA = 130°C/W (N8)
TJMAX = 100°C, θJA = 150°C/W (S8)
124X
124XI
*The 1A rating for output current is based on transient switching
requirements.
ELECTRICAL CHARACTERISTICS
W
AXI U
U
ABSOLUTE
(Notes 1, 2)
CONDITIONS
MIN
TYP
MAX
4.925
UNITS
Reference Section
Output Voltage
IO = 1mA, TJ = 25°C
5.000
5.075
Line Regulation
12V < VCC < 25V
●
3
20
mV
Load Regulation
1mA < IVREF < 20mA
●
–6
– 25
mV
Total Output Variation
Line, Load, Temp
●
Output Noise Voltage
10Hz < F < 10kHz, TJ = 25°C
Long Term Stability
TA = 125°C, 1000 Hrs.
Temperature Stability
0.1
Output Short-Circuit Current
4.87
mV/°C
5.13
– 30
V
µV
50
●
V
5
25
mV
– 90
– 180
mA
Oscillator Section
Initial Accuracy
Voltage Stability
RT = 10k, C T = 3.3nF, TJ = 25°C
47.5
50
52.5
kHz
RT = 13.0k, C T = 500pF, TJ = 25°C
228
248
268
kHz
1
%
12V < VCC < 25V, TJ = 25°C
Temperature Stability
TMIN < TJ < TMAX
– 0.05
Amplitude
TJ = 25°C (Pin 4)
1.7
Clock Ramp Reset Current
VOSC (Pin 4) = 2V, TJ = 25°C
%/°C
V
7.9
8.2
8.5
mA
2.42
2.50
2.58
V
–2
µA
2
MHz
Error Amplifier Section
Feedback Pin Input Voltage
VPIN1 = 2.5V
●
Input Bias Current
VFB = 2.5V
●
Open-Loop Voltage Gain
2 < VO < 4V
●
Unity-Gain Bandwidth
TJ = 25°C
Power Supply Rejection Ratio
12V < VCC < 25V
●
Output Sink Current
VPIN2 = 2.7V, VPIN1 = 1.1V
●
2
6
mA
Output Source Current
VPIN2 = 2.3V, VPIN1 = 5V
●
– 0.5
– 0.75
mA
2
65
90
0.7
1.3
60
dB
dB
LT1241 Series
ELECTRICAL CHARACTERISTICS
PARAMETER
(Notes 1, 2)
CONDITIONS
MIN
TYP
MAX
UNITS
Error Amplifier Section
Output Voltage High Level
VPIN2 = 2.3V, RL = 15k to GND
●
Output Voltage Low Level
VPIN2 = 2.7V, RL = 15k to Pin 8
●
5
5.6
V
0.2
1.1
V
Current Sense Section
Gain
Maximum Current Sense Input Threshold
VPIN3 < 1.1V
●
2.85
3.00
3.15
V/V
●
0.90
1.00
1.10
V
Power Supply Rejection Ratio
●
70
Input Bias Current
●
–1
10
µA
dB
Delay to Output
●
50
100
ns
Blanking Time
100
ns
Blanking Override Voltage
1.5
V
Output Section
Output Low Level
IOUT = 20mA
IOUT = 200mA
●
●
0.25
0.75
0.4
2.2
V
V
Output High Level
IOUT = 20mA
IOUT = 200mA
●
●
Rise Time
CL = 1nF, TJ = 25°C
50
80
ns
Fall Time
CL = 1.0nF, TJ = 25°C
30
60
ns
Output Clamp Voltage
IO = 1mA
18
19.5
V
12.0
11.75
●
V
V
Undervoltage Lockout
Start-Up Threshold
LT1241
LT1242/LT1244
LT1243/LT1245
●
●
●
9.0
15
7.8
9.6
16
8.4
10.2
17
9.0
V
V
V
Minimum Operating Voltage
LT1241/LT1243/LT1245
LT1242/LT1244
●
●
7.0
9.0
7.6
10
8.2
11
V
V
1.6
5.5
0.4
2.0
6.0
0.8
V
V
V
46
94
48
96
%
%
●
0
%
Start-Up Current
●
170
250
µA
Operating Current
●
7
10
mA
Hysteresis
LT1241
LT1242/LT1244
LT1243/LT1245
PWM
Maximum Duty Cycle
LT1241/LT1244/LT1245
LT1242/LT1243
TJ = 25°C
TJ = 25°C
Minimum Duty Cycle
Total Device
The ● denotes those specifications which apply over the full operating
temperature range.
Note 1: Unless otherwise specified, VCC = 15V, RT = 10k, CT = 3.3nF.
Note 2: Low duty cycle pulse techniques are used during test to maintain
junction temperature close to ambient.
3
LT1241 Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Undervoltage Lockout –
LT1242, LT1244
Undervoltage Lockout – LT1241
Undervoltage Lockout –
LT1243, LT1245
17
11
11
START-UP THRESHOLD
START-UP THRESHOLD
VCC (V)
VCC (V)
9
8
16
10
15
9
VCC (V)
10
11
MINIMUM OPERATING VOLTAGE
START-UP THRESHOLD
8
MINIMUM OPERATING VOLTAGE
MINIMUM OPERATING VOLTAGE
10
7
6
–50 –25
25
75
0
50
TEMPERATURE (°C)
100
7
9
–50 –25
125
0
50
25
75
TEMPERATURE (°C)
Start-Up Current
Start-Up Current
LT1242/4
100
50
160
9
100
80
6
8 10
VCC (V)
12
14 16
6
18
25
75
0
50
TEMPERATURE (°C)
Supply Current vs
Oscillator Frequency
56
FREQUENCY (kHz)
7
6
5
4
3
0
10k
VCC = 15V
RT = 10k
CL = 15pF
VCC = 5V
RT = 10k
CT = 3300pF
54
52
50
48
46
LT1241 • TPC18
40
–50 –25
8.6
VPIN4 = 2V
8.5
8.4
8.3
8.2
8.1
8.0
7.9
7.8
42
1M
125
Oscillator Sink Current
44
100k
OSCILLATOR FREQUENCY (Hz)
100
8.7
OSCILLATOR SINK CURRENT (mA)
58
LT1242, LT1243
LT1241, LT1244, LT1245
25
75
0
50
TEMPERATURE (°C)
LT1241 • TPC06
Oscillator Frequency
9
1
5
–50 –25
125
60
10
2
100
LT1241 • TPC05
LT1241 • TPC04
8
7
60
0
–50 –25
0
4
8
20
TJ = 25°C
2
VCC = 15V
RT = 10k
CT = 3300pF
140
120
40
0
125
Supply Current
ICC (mA)
LT1241
LT1243/5
100
10
180
START-UP CURRENT (µA)
START-UP CURRENT (µA)
START-UP
THRESHOLD
150
25
75
0
50
TEMPERATURE (°C)
LT1241 • TPC03
200
200
SUPPLY CURRENT (mA)
6
–50 –25
125
LT1241 • TPC02
LT1241 • TPC01
4
100
25
75
0
50
TEMPERATURE (°C)
100
125
LT1241 • TPC07
7.7
–50 –25
0
50
25
75
TEMPERATURE (°C)
100
125
LT1241 • TPC08
LT1241 Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Reference Voltage
Reference Short-Circuit Current
5.03
5.02
5.01
5.00
4.99
4.98
4.97
4.96
4.95
–50 –25
0
50
25
75
TEMPERATURE (°C)
100
125
2.55
120
100
80
60
40
0
50
25
75
TEMPERATURE (°C)
PHASE
90
20
45
0
0
1k
100k
10k
FREQUENCY (Hz)
1M
100
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
0
50
25
75
TEMPERATURE (°C)
100
75
TJ = 25°C
TJ = 125°C
1.0
0.5
0
125
0.8
TJ = –55°C
0.6
TJ =125°C
0.4
TJ = 25°C
0.2
0
1
2
4
5
3
ERROR AMP OUTPUT VOLTAGE (V)
6
LT1241 • TPC17
Low Level Output Saturation
Voltage During Undervoltage
Lockout
4.0
TJ = 125°C
0.5
TJ = 25°C
TJ = –55°C
0
200
100
0
125
OUTPUT SATURATION VOLTAGE (V)
2.5
LT1241 • TPC13
50
LT1241 • TPC12
OUTPUT SATURATION VOLTAGE (V)
TJ = –55°C
100
OUTPUT SOURCE CURRENT (mA)
25
1.0
Low Level Output
Saturation Voltage
3.5
0
0
Current Sense Input Threshold
1.0
1.5
2.47
1.2
0.95
–50 –25
–45
10M
4.0
2.0
2.48
LT1241 • TPC11
1.04
High Level Output
Saturation Voltage
3.0
2.50
2.49
TEMPERATURE (°C)
LT1241 • TPC16
OUTPUT SATURATION VOLTAGE (V)
125
CURRENT SENSE INPUT THRESHOLD (V)
135
100
CURRENT SENSE CLAMP VOLTAGE (V)
180
PHASE (DEG)
AVOL OPEN-LOOP VOLTAGE GAIN (dB)
VCC = 15V
VO = 2.0V - 4.0V
RL = 100k
TA = 25°C
60
10
2.51
2.45
–50 –25
1.05
225
–20
2.52
Current Sense Clamp Voltage
100
40
2.53
LT1241 • TPC09
Error Amplifier Open-Loop Gain
and Phase
GAIN
2.54
2.46
20
–50 –25
LT1241 • TPC10
80
Feedback Pin Input Voltage
140
FEEDBACK PIN INPUT VOLTAGE (V)
IO = 1mA
5.04
REFERENCE VOLTAGE (V)
REFERENCE SHORT-CIRCUIT CURRENT (mA)
5.05
0
100
OUTPUT SINK CURRENT (mA)
200
LT1241 • TPC14
3.5
3.0
2.5
TJ = –55°C
2.0
1.5
TJ = 25°C
TJ = 125°C
1.0
0.5
0
0
5
OUTPUT SINK CURRENT (mA)
10
LT1241 • TPC15
5
LT1241 Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Output Deadtime vs Oscillator
Frequency – LT1242, LT1244
Output Deadtime vs Oscillator
Frequency – LT1241, LT1243,LT1245
Timing Resistor vs Oscillator
Frequency
75
60
100
100pF
200pF
50
70
40
30
500pF
20
10nF
5nF
2nF 1nF
65
500pF
60
2nF
10
5nF
CT =10nF
55
10
50
0
0
100
OSCILLATOR FREQUENCY (kHz)
0
1000
100
OSCILLATOR FREQUENCY (kHz)
1000
1
10k
OUTPUT
VOLTAGE
5V/DIV
Current Sense Delay
CURRENT
SENSE INPUT
1V/DIV
OUTPUT CROSSCONDUCTION CURRENT
20mA/DIV
OUTPUT VOLTAGE
LT1241 • TPC22
1M
LT1241 • TPC21
Output Cross-Conduction Current
OUTPUT
VOLTAGE
5V/DIV
Output Rise and Fall Time
TIME 50ns/DIV
100k
OSCILLATOR FREQUENCY (Hz)
LT1241 • TPC20
LT1241 • TPC19
VCC = 15V
CL = 1nF
VCC = 15V
TJ = 25°C
100pF
100pF
6
500pF
1nF
1nF
RT (kΩ)
2nF
% OF DEADTIME
% OF DEADTIME
5nF
VCC = 15V
CL = 15pF
TIME 50ns/DIV
TIME 50ns/DIV
LT1241 • TPC23
VCC = 15V
CL = 1nF
LT1241 • TPC24
LT1241 Series
UO
U
U
PI FU CTI
S
COMP (Pin 1): Compensation Pin. This pin is the output of
the Error Amplifier and is made available for loop compensation. It can also be used to adjust the maximum value of
the current sense clamp voltage to less than 1V. This pin
can source a minimum of 0.5mA (0.8mA typ) and sink a
minimum of 2mA (4mA typ)
FB (Pin 2) Voltage Feedback Pin. This pin is the inverting
input of the error amplifier. The output voltage is normally
fed back to this pin through a resistive divider. The noninverting input of the error amplifier is internally committed to a 2.5V reference point.
ISENSE (Pin 3): Current Sense Pin. This is the input to the
current sense comparator. The trip point of the comparator is set by, and is proportional to, the output voltage of
the Error Amplifier.
RT/CT (Pin 4): The oscillator frequency and the deadtime
are set by connecting a resistor (RT) from VREF to RT/CT
and a capacitor (CT) from RT/CT to GND.
U
UO
LT1241
W
START-UP
DEVICE
OUTPUT (Pin 6): This pin is the output of a high current
totem pole output stage. It is capable of driving up to ±1A
of current into a capacitive load such as the gate of a
MOSFET.
VCC (Pin 7): This pin is the positive supply of the control
IC.
VREF (Pin 8): Reference. This is the reference output of the
IC. The reference output is used to supply charging current
to the external timing resistor RT. The reference provides
biasing to a large portion of the internal circuitry, and is
used to generate several internal reference levels including the VFB level and the current sense clamp voltage.
U
APPLICATI
The rise time of the oscillator waveform is set by the RC
time constant of RT and CT. The fall time, which is equal to
the output deadtime, is set by a combination of the RC time
constant and the oscillator sink current (8.2mA typ).
GND (Pin 5): Ground.
S I FOR ATIO
MINIMUM
OPERATING
THRESHOLD
MAXIMUM
VOLTAGE
9.6V
7.6V
DUTY CYCLE REPLACES
50%
NONE
LT1242
16V
10V
100%
UC1842
LT1243
8.4V
7.6V
100%
UC1843
LT1244
16V
10V
50%
UC1844
LT1245
8.4V
7.6V
50%
UC1845
Oscillator
The LT1241 series devices are fixed frequency current
mode pulse width modulators. The oscillator frequency
and the oscillator discharge current are both trimmed and
tightly specified to minimize the variations in frequency
and deadtime. The oscillator frequency is set by choosing
a resistor and capacitor combination, RT and CT. This RC
combination will determine both the frequency and the
maximum duty cycle. The resistor RT is connected from
VREF (Pin 8) to the RT/CT pin (Pin 4). The capacitor CT is
connected from the RT/CT pin to ground. The charging
current for CT is determined by the value of RT. The
discharge current for CT is set by the difference between
the current supplied by RT and the discharge current of the
LT124X. The discharge current of the device is trimmed to
8.2mA. For large values of RT discharge time will be
determined by the discharge current of the device and the
value of CT. As the value of RT is reduced it will have more
effect on the discharge time of CT. During an oscillator
cycle capacitor CT is charged to approximately 2.8V and
discharged to approximately 1.1V. The output is enabled
during the charge time of CT and disabled, in an off state,
during the discharge time of CT. The deadtime of the circuit
is equal to the discharge time of CT. The maximum duty
cycle is limited by controlling the deadtime of the oscillator. There are many combinations of RT and CT that will
yield a given oscillator frequency, however there is only
one combination that will yield a specific deadtime at that
frequency. Curves of oscillator frequency and deadtime
7
LT1241 Series
W
U
U
UO
APPLICATI
S I FOR ATIO
for various values of RT and CT appear in the Typical
Performance Characteristics section. Frequency and
deadtime can also be calculated using the following
formulas:
Oscillator Rise Time: t r = 0.583 • RC
Oscillator Discharge Time: t d =
Error Amplifier
3.46 • RC
(0.0164) R − 11.73
Oscillator Period: TOSC = tr + td
Oscillator Frequency: fOSC =
1
TOSC
Maximum Duty Cycle:
LT1241, LT1244, LT1245
tr
TOSC − t d
DMAX =
=
2 TOSC
2 TOSC
LT1242, LT1243 DMAX =
tr
TOSC
=
TOSC − t d
TOSC
The above formulas will give values that will be accurate
to approximately ±5%, at the oscillator, over the full
operating frequency range. This is due to the fact that the
oscillator trip levels are constant versus frequency and the
discharge current and initial oscillator frequency are
trimmed. Some fine adjustment may be required to achieve
more accurate results. Once the final RT/CT combination is
selected the oscillator characteristics will be repeatable
from device to device. Note that there will be some slight
differences between maximum duty cycle at the oscillator
and maximum duty cycle at the output due to the finite rise
and fall times of the output.
The output switching frequency will be equal to the
oscillator frequency for LT1242 and LT1243. The output
switching frequency will be equal to one-half the oscillator
8
frequency for LT1241, LT1244 and LT1245. The oscillator
of LT1241 series devices will run at frequencies up to
1MHz, allowing 500kHz output switching frequencies for
all devices.
The LT1241 series of devices contain a fully compensated
error amplifier with a DC gain of 90dB and a unity-gain
frequency of 1MHz. Phase margin at unity-gain is 80°. The
noninverting input is internally committed to a 2.5V reference point derived from the 5V reference of Pin 8. The
inverting input (Pin 2) and the output (Pin 1) are made
available to the user. The output voltage in a regulator
circuit is normally fed back to the inverting input of the
error amplifier through a resistive divider.
The output of the error amplifier is made available for
external loop compensation. The output current of the
error amplifier is limited to approximately 0.8mA sourcing
and approximately 6mA sinking. In a current mode PWM
the peak switch current is a function of the output voltage
of the error amplifier. In the LT1241 series devices the
output of the error amplifier is offset by two diodes (1.4V
at 25°C), divided by a factor of three, and fed to the
inverting input of the current sense comparator. For error
amplifier output voltages less than 1.4V the duty cycle of
the output stage will be zero. The maximum offset that can
appear at the current sense input is limited by a 1V clamp.
This occurs when the error amplifier output reaches 4.4V
at 25°C.
The output of the error amplifier can be clamped below
4.4V in order to reduce the maximum voltage allowed
across the current sensing resistor to less than 1V. The
supply current will increase by the value of the output
source current when the output voltage of the error
amplifier is clamped.
LT1241 Series
U
W
U
UO
APPLICATI
S I FOR ATIO
Current Sense Comparator and PWM Latch
LT1241 series devices are current mode controllers.
Under normal operating conditions the output (Pin 6) is
turned on at the start of every oscillator cycle, coincident
with the rising edge of the oscillator waveform. The output
is then turned off when the current reaches a threshold
level proportional to the error voltage at the output of the
error amplifier. Once the output is turned off it is latched
off until the start of the next cycle. The peak current is thus
proportional to the error voltage and is controlled on a
cycle by cycle basis. The peak switch current is normally
sensed by placing a sense resistor in the source lead of the
output MOSFET. This resistor converts the switch current
to a voltage that can be fed into the current sense input. For
normal operating conditions the peak inductor current,
which is equal to the peak switch current, will be equal to:
IPK =
(VPIN1 − 1.4V)
(3RS)
During fault conditions the maximum threshold voltage at
the input of the current sense comparator is limited by the
internal 1V clamp at the inverting input. The peak switch
current will be equal to:
IPK (MAX) =
1.0V
RS
In certain applications, such as high power regulators, it
may be desirable to limit the maximum threshold voltage
to less than 1V in order to limit the power dissipated in the
sense resistor or to limit the short-circuit current of the
regulator circuit. This can be accomplished by clamping
the output of the error amplifier. A voltage level of
approximately 1.4V at the output of the error amplifier will
give a threshold voltage of 0V. A voltage level of approximately 4.4V at the output of the error amplifier will give
a threshold level of 1V. Between 1.4V and 4.4V the
threshold voltage will change by a factor of one-third of the
change in the error amplifier output voltage. The threshold
voltage will be 0.333V for an error amplifier voltage of
2.4V. To reduce the maximum current sense threshold to
less than 1V the error amplifier output should be clamped
to less than 4.4V.
Blanking
A unique feature of the LT1241 series devices is the builtin blanking circuit at the output of the current sense
comparator. A common problem with current mode
PWM circuits is erratic operation due to noise at the
current sense input. The primary cause of noise problems
is the leading edge current spike due to transformer
interwinding capacitance and diode reverse recovery
time. This current spike can prematurely trip the current
sense comparator causing an instability in the regulator
circuit. A filter at the current sense input is normally
required to eliminate this instability.
This filter will in turn slow down the current sense loop.
A slow current sense loop will increase the minimum pulse
width which will increase the short-circuit current in an
overload condition. The LT1241 series devices blank (lock
out) the signal at the output of the current sense comparator for a fixed amount of time after the switch is turned on.
This effectively prevents the PWM latch from tripping due
to the leading edge current spike.
The blanking time will be a function of the voltage at the
feedback pin (Pin 2). The blanking time will be 100ns for
normal operating conditions (VFB = 2.5V). The blanking
time goes to zero as the feedback pin is pulled to 0V. This
means that the blanking time will be minimized during
start-up and also during an output short-circuit fault. This
blanking circuit eliminates the need for an input filter at the
current sense input except in extreme cases. Eliminating
the filter allows the current sense loop to operate with
minimum delays, reducing peak currents during fault
conditions.
9
LT1241 Series
U
W
U
UO
APPLICATI
S I FOR ATIO
Undervoltage Lockout
The LT1241 series devices incorporate an undervoltage
lockout comparator which prevents the internal reference
circuitry and the output from starting up until the supply
voltage reaches the start-up threshold voltage. The quiescent current, below the start-up threshold, has been
reduced to less than 250µA (170µA typ.) to minimize the
power loss due to the bleed resistor used for start-up in
off-line converters. In undervoltage lockout both VREF
(Pin 8) and the output (Pin 6) are actively pulled low by
Darlington connected PNP transistors. They are designed
to sink a few milliamps of current and will pull down to
about 1V. The pull-down transistor at the reference pin can
be used to reset the external soft start capacitor. The pulldown transistor at the output eliminates the external pulldown resistor required, with earlier devices, to hold the
external MOSFET gate low during undervoltage lockout.
Output
The LT1241 series devices incorporate a single high
current totem pole output stage. This output stage is
capable of driving up to ±1A of output current. Crossconduction current spikes in the output totem pole have
been eliminated. This device is primarily intended for
driving MOSFET switches. Rise time is typically 40ns and
fall time is typically 30ns when driving a 1.0nF load. A
clamp is built into the device to prevent the output from
rising above 18V in order to protect the gate of the
MOSFET switch.
The output is actively pulled low during undervoltage
lockout by a Darlington PNP. This PNP is designed to sink
several milliamps and will pull the output down to approximately 1V. This active pull-down eliminates the need for an
external resistor which was required in older designs. The
output pin of the device connects directly to the emitter of
the upper NPN drive transistor and the collector of the
lower NPN drive transistor in the totem pole. The collector
of the lower transistor, which is n-type silicon, forms a
p-n junction with the substrate of the device. This junction
is reverse biased during normal operation.
In some applications the parasitic LC of the external
MOSFET gate can ring and pull the OUTPUT pin below
10
ground. If the OUTPUT pin is pulled negative by more than
a diode drop the parasitic diode formed by the collector of
the output NPN and the substrate will turn on. This can
cause erratic operation of the device. In these cases a
Schottky clamp diode is recommended from the output to
ground.
Reference
The internal reference of the LT1241 series devices is a 5V
bandgap reference, trimmed to within ±1% initial tolerance. The reference is used to power the majority of
internal logic and the oscillator circuitry. The oscillator
charging current is supplied from the reference. The
feedback pin voltage and the clamp level for the current
sense comparator are derived from the reference voltage.
The reference can supply up to 20mA of current to power
external circuitry. Note that using the reference in this
manner, as a voltage regulator, will significantly increase
power dissipation in the device which will reduce the
useful operating ambient temperature range.
Design/Layout Considerations
LT1241 series devices are high speed circuits capable of
generating pulsed output drive currents of up to 1A peak.
The rise and fall time for the output drive current is in the
range of 10ns to 20ns. High speed circuit techniques must
be used to insure proper operation of the device. Do not
attempt to use Proto-boards or wire-wrap techniques to
breadboard high speed switching regulator circuits.
They will not work properly.
Printed circuit layouts should include separate ground
paths for the voltage feedback network, oscillator capacitor, and switch drive current. These ground paths should
be connected together directly at the ground pin (Pin 5) of
the LT124X. This will minimize noise problems due to
pulsed ground pin currents. VCC should be bypassed, with
a minimum of 0.1µF, as close to the device as possible.
High current paths should be kept short and they should
be separated from the feedback voltage network with
shield traces if possible.
LT1241 Series
UO
TYPICAL APPLICATI
S
Soft Start
External Clock Synchronization
VREF
VREF
8
5V REF
8
RT
R
RT/CT
4
EXTERNAL
SYNC
INPUT
OSCILLATOR
+
5.6V
–
2R
+
D1
47Ω
1V
1mA
FB
2
C
CT
0.01µF
5V REF
COMP
1
–
R
+
+
2.5V
1.5V
ISENSE
D1 IS REQUIRED IF THE SYNC AMPLITUDE IS LARGE
ENOUGH TO PULL THE BOTTOM OF CT MORE THAN
LT1241 • TA01
300mV BELOW GROUND.
–
3
LT1241 • TA02
Adjustable Clamp Level with Soft Start
5V REF
MAIN BIAS
VREF
8
REFERENCE ENABLE
REFERENCE PULL-DOWN
4
100k
FB
2
C
R1
OSCILLATOR
COMP
1
5.6V
T
1mA
–
7
OUTPUT
6
S
R
1V
18V
2R
+
–
VIN
VCC
OUTPUT
PULL-DOWN
RT/CT
R2
UV
LOCKOUT
GND
5
BLANKING
+
R
+
2.5V
1.5V
–
RS
ISENSE
3
VCLAMP ≈
(
1.67
R2
+1
R1
(
IPK (MAX) ≈
VCLAMP
RS
WHERE: 0V ≤ VCLAMP ≤ 1.0V
tSOFT START = –ln 1 –
VC
3 • VCLAMP
C
R1 R2
R1 + R2
LT1241 • TA03
11
LT1241 Series
UO
TYPICAL APPLICATI
S
300kHz Off-Line Power Supply
HOT
1
R5
1M
1/2W
90VAC
TO
240VAC
3
C2
0.1µF
250V
MP3-X2
2
NEU
D5
C3
0.1µF
250V
MP3-X2
T1
BALEN
C4
4700pF
250V
Y-CAP
–
+
2KBPO8M
4
1212-R6103
COILTRONICS
C6
4700pF
250V
Y-CAP
C5
4700pF
250V
Y-CAP
AC GND
RT1
MCID404
2KBPOO5M
D3
MUR420
L1
5 1/2 TURN
AIRCORE
20V
1.5A
T2
+
R1
200k
1/2W
C14
100µF
400V
R3
200k
1/2W
D6
1N5245B
15V
R2
660k
1/10W
R5
27k
2W
C1
470pF
R4
660k
1/10W
D1
MUR160
8
30T
2
4
12T
5
7
30T
1
CTX210433-1
LP = 100µH
C7
0.22µF
MKS-2
R8
152k
C12
22µF
25V
7
2
R9
200k
C9
0.01µF, 100V
MKS-2
VCC
FB
LT1241
1
COMP
8 V
REF
4
R10
20k
R13
12k
C10
0.1µF
MKS-2
RT/CT
OUTPUT
ISENSE
GND
5
R11
12
6
3
Q1
MPT2N60
D4
BAT 85
R12
1k
1/10W
R18
2Ω
1/4W
C11
220pF
NOTES: UNLESS OTHERWISE SPECIFIED
1. ALL RESISTANCES ARE IN OHMS, 1/4W, 5%.
2. ALL CAPACITANCES ARE IN MICROFARADS, 50V, 10%.
12
D2
BAV21
R14
39
C8
100pF
R16
2Ω
1/4W
C16
3.3µF
50V
R15
750Ω
1W
RTN
C13
4700pF
1kV
Y-CAP
3
13T
6
R7
510
1/10W
D7
BAV21
C15
3.3µF
50V
R17
2Ω
1/4W
LT1241 • TA06
LT1241 Series
UO
TYPICAL APPLICATI
S
Slope Compensation at ISENSE Pin
5V REF
MAIN BIAS
VREF
8
RT
REFERENCE ENABLE
UV
LOCKOUT
REFERENCE PULL-DOWN
VCC
OUTPUT
PULL-DOWN
RT/CT
4
OSCILLATOR
CT COMP
1
5.6V
–
7
T
OUTPUT
6
S
R
1V
1mA
FB
2
18V
2R
+
–
VIN
GND
5
BLANKING
+
R
+
1.5V
2.5V
–
ISENSE
RS
3
LT1241 • TA04
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
J8 Package
8-Lead CERDIP (Narrow 0.300, Hermetic)
(LTC DWG # 05-08-1110)
CORNER LEADS OPTION
(4 PLCS)
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
OPTION
0.045 – 0.068
(1.143 – 1.727)
FULL LEAD
OPTION
0.005
(0.127)
MIN
0.405
(10.287)
MAX
8
7
6
5
0.025
(0.635)
RAD TYP
0.220 – 0.310
(5.588 – 7.874)
1
0.300 BSC
(0.762 BSC)
2
3
4
0.200
(5.080)
MAX
0.015 – 0.060
(0.381 – 1.524)
0.008 – 0.018
(0.203 – 0.457)
0.385 ± 0.025
(9.779 ± 0.635)
0° – 15°
0.045 – 0.068
(1.143 – 1.727)
0.014 – 0.026
(0.360 – 0.660)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS.
0.125
3.175
0.100 ± 0.010 MIN
(2.540 ± 0.254)
J8 0694
13
LT1241 Series
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400*
(10.160)
MAX
8
7
6
5
1
2
3
4
0.255 ± 0.015*
(6.477 ± 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.009 – 0.015
(0.229 – 0.381)
(
+0.025
0.325 –0.015
8.255
+0.635
–0.381
)
0.045 – 0.065
(1.143 – 1.651)
0.065
(1.651)
TYP
0.005
(0.127)
MIN
0.100 ± 0.010
(2.540 ± 0.254)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
14
0.130 ± 0.005
(3.302 ± 0.127)
0.125
(3.175)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
0.015
(0.380)
MIN
N8 0695
LT1241 Series
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
8
7
6
5
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
2
3
0.053 – 0.069
(1.346 – 1.752)
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
0.014 – 0.019
(0.355 – 0.483)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
4
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
SO8 0695
15
LT1241 Series
U
TYPICAL APPLICATION
Slope Compensation at Error Amp
5V REF
MAIN BIAS
VREF
8
RT
RT/CT
CT
RSLOPE
REFERENCE PULL-DOWN
VCC
OUTPUT
PULL-DOWN
OSCILLATOR
4
TO
VOUT
UV
LOCKOUT
REFERENCE ENABLE
COMP
1
5.6V
OUTPUT
6
T
S
R
1V
1mA
Rf
2
–
FB
+
7
18V
2R
–
GND
5
BLANKING
+
R
+
2.5V
1.5V
–
ISENSE
3
LT1241 • TA05
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1246
1MHz Current Mode PWM
16V Start-Up Threshold, 10V Minimum Operating Voltage
LT1248/LT1249
Power Factor Controllers
Minimal Parts Count
LT1372
High Efficiency Switching Regulator
500kHz 1.5A Boost Regulator
LT1376
1.5A 500kHz Step-Down Switching Regulator
Steps Down from Up to 25V Using 4.7µH Inductors
LT1509
Power Factor and PWM Controller
Complete Solution for Universal Off-Line Switching Power Supplies
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417● (408) 432-1900
FAX: (408) 434-0507● TELEX: 499-3977 ● www.linear-tech.com
1241fa LT/TP 0297 5K REV A • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 1992
Similar pages