LINER LTC1153CN8 Auto-reset electronic circuit breaker Datasheet

LTC1153
Auto-Reset
Electronic Circuit Breaker
U
DESCRIPTIO
FEATURES
■
■
■
■
■
■
■
■
■
■
Programmable Trip Delay: 15µs to >100ms
Programmable Trip Current: 1mA to >20A
Programmbale Auto-Reset Time: 1ms to >10 sec.
4.5V to 18V Supply Range
Drives Low RDS(ON) N-Channel MOSFETs
Status Output Indicates Fault Condition
Thermal Trip with PTC Thermistor
8µA IQ in Standby Mode
No External Charge Pump Capacitors
Available in 8-Pin SOIC
UO
APPLICATI
■
■
■
■
■
Power Bus Circuit Breaker
SCSI Termination Power Protection
Regulator Over-Current Protection
Battery Short-Circuit Protection
DC Motor Stall Protection
Sensitive System Power Interrupt
The trip current, trip delay time and auto-reset period are
programmable over a wide range to accommodate a
variety of load impedances. An active high shutdown input
is also provided and interfaces directly to a PTC thermistor
for thermal circuit breaking. An open-drain output is
provided to report breaker status to the µP.
The LTC1153 is available in both 8-pin DIP and 8-pin SOIC
packages.
UO
■
S
The LTC1153 electronic circuit breaker drives a low cost
N-channel MOSFET to interrupt power to a sensitive
electronic load in the event of an over-current condition.
The breaker remains tripped for a period of time set by an
external timing capacitor and then is automatically reset.
This cycle continues until the over-current condition is
removed, protecting both the sensitive load and the
MOSFET switch.
TYPICAL APPLICATI
5V/1A Electronic Circuit Breaker with 1ms Trip Delay,
200ms Auto-Reset Period and 70°C Thermal Shutdown
Trip Delay Time
10
IN
CT
0.22µF
Z5U
CD
RD
0.01µF 100k
CT
*RSEN
0.1Ω
DS
LTC1153
TO µP
STATUS
IRLR024
G
51k
51k
GND
RSEN = 0.1Ω
RD = 100k
CD = 0.01µF
VS
SHUTDOWN
5V
**70°C
PTC
TRIP DELAY (ms)
ON/OFF
1
0.1
SENSITIVE
5V LOAD
ALL COMPONENTS SHOWN ARE SURFACE MOUNT.
* IMS026 INTERNATIONAL MANUFACTURING SERVICE, INC. (401) 683-9700
** RL2006-100-70-30-PT1 KEYSTONE CARBON COMPANY (814) 781-1591
0.01
1
10
CIRCUIT BREAKER CURRENT (A)
100
LTC1153 • TA02
LTC1153 • TA01
1
LTC1153
W W
W
AXI U
U
ABSOLUTE
RATI GS
Supply Voltage ........................................................ 22V
Input Voltage ..................... (VS + 0.3V) to (GND – 0.3V)
Timing Capacitor Voltage ... (VS + 0.3V) to (GND – 0.3V)
Gate Voltage ....................... (VS + 24V) to (GND – 0.3V)
Status Output Voltage .............................................. 15V
Current (Any Pin).................................................. 50mA
Operating Temperature
LTC1153C .............................................. 0°C to 70°C
Storage Temperature Range ................. – 65°c to 150°C
Lead Temperature (Soldering, 10 sec.)................ 300°C
U
W
U
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
TOP VIEW
IN 1
8
VS
TIMING CAP 2
7
DRAIN SENSE
STATUS 3
6
GATE
GND 4
5
SHUTDOWN
LTC1153CN8
ORDER PART
NUMBER
TOP VIEW
IN 1
8
VS
TIMING CAP 2
7
DRAIN SENSE
STATUS 3
6
GATE
GND 4
5
SHUTDOWN
S8 PACKAGE
8-LEAD PLASTIC SOIC
N8 PACKAGE
8-LEAD PLASTIC DIP
LTC1154 • PO02
LTC1153 • PO01
TJMAX = 100°C, θJA = 130°C/W (N8)
LTC1153CS8
S8 PART MARKING
TJMAX = 100°C, θJA = 150°C/W
1153
ELECTRICAL CHARACTERISTICS VS = 4.5V to 18V, TA = 25°C, CT = 0.1µF, VSD = 0V unless otherwise noted.
CONDITIONS
MIN
LTC1153C
TYP
SYMBOL
PARAMETER
VS
Supply Voltage
IQ
Quiescent Current OFF
VS = 5V, VIN = 0V
IQ
Quiescent Current ON
VS = 5V, VIN = 5V
IQ
Quiescent Current ON
VS =12V, VIN = 5V
180
VINH
Input High Voltage
●
VINL
Input Low Voltage
●
0.8
V
IIN
Input Current
●
±1
µA
CIN
Input Capacitance
VCT
Timing Capacitor Threshold Voltage
VS = 5V
VS = 12V
ICT
Timing Capacitor Current
VS = 12V
VSDH
Shutdown Input High Voltage
●
VSDL
Shutdown Input Low Voltage
●
ISD
Shutdown Input Current
VSEN
Drain Sense Threshold Voltage
●
0V < VIN < VS
0V < VIN < VS
2
Drain Sense Input Current
0V < VSEN < VS
V
8
20
µA
85
120
µA
400
µA
2
V
pF
2.1
2.0
2.5
2.6
2.9
3.2
V
V
3.0
4.2
6.0
µA
2
V
0.8
●
●
UNITS
18
5
●
ISEN
4.5
MAX
80
75
100
100
V
±1
µA
120
125
mV
mV
±0.1
µA
LTC1153
ELECTRICAL CHARACTERISTICS VS = 4.5V to 18V, TA = 25°C, CT = 0.1µF, VSD = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VGATE – VS Gate Voltage Above Supply
VS = 5V
VS = 6V
VS = 12V
●
●
●
MIN
LTC1153C
TYP
MAX
UNITS
6.0
7.5
15.0
7.0
8.3
18.0
9.0
15.0
25.0
V
V
V
0.05
0.4
V
1
µA
VSTAT
Status Output Low Voltage
ISTAT = 400µA
●
ISTAT
Status Output Leakage Current
VSTAT = 12V
●
tON
Turn-ON Time
VS = 5V, CGATE = 1000pF
Time for VGATE > VS + 2V
Time for VGATE > VS + 5V
30
100
110
450
300
1000
µs
µs
VS = 12V, CGATE = 1000pF
Time for VGATE > VS + 5V
Time for VGATE > VS + 10V
20
50
80
160
200
500
µs
µs
VS = 5V, CGATE = 1000pF
Time for VGATE < 1V
10
36
60
µs
VS = 12V, CGATE = 1000pF
Time for VGATE < 1V
10
28
60
µs
VS = 5V, CGATE = 1000pF
Time for VGATE < 1V
5
25
40
µs
VS = 12V, CGATE = 1000pF
Time for VGATE < 1V
5
23
40
µs
VS = 5V, CGATE = 1000pF
Time for VGATE < 1V
17
40
µs
VS = 12V, CGATE = 1000pF
Time for VGATE < 1V
13
35
µs
tOFF
Turn-OFF Time
tTD
Minimum Trip Delay
tSD
Shutdown Turn-OFF Time
The ● denotes specifications which apply over the operating temperature range.
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Standby Supply Current
VIN = 0V
TA = 25°C
24
TA = 25°C
900
SUPPLY CURRENT (µA)
40
35
30
25
20
15
22
800
20
700
18
VGATE – VS (V)
45
SUPPLY CURRENT (µA)
MOSFET Switch Gate Voltage
Supply Current ON
1000
50
600
500
400
16
14
12
300
10
10
200
8
5
100
6
0
0
4
0
5
10
15
SUPPLY VOLTAGE (V)
20
LTC1153 • TPC01
0
5
10
15
SUPPLY VOLTAGE (V)
20
LTC1153 • TPC02
0
5
10
15
SUPPLY VOLTAGE (V)
20
LTC1153 • TPC03
3
LTC1153
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Input Threshold Voltage
1.8
1.6
VON
1.4
VOFF
1.2
1.0
0.8
0.6
0.4
5
0
3.3µF
130
120
110
100
90
80
CGATE = 1000pF
400
VGS = 5V
VGS = 2V
5
CGATE = 1000pF
TIME FOR VGATE < 1V
40
35
35
25
20
10
5
5
0
5
0
20
10
15
SUPPLY VOLTAGE (V)
0
900
40
Input ON Threshold Voltage
SUPPLY CURRENT (µA)
25
20
0
–50 –25
2.4
VIN = 5V
2.2
800
30
VS = 18V
600
500
400
VS = 12V
200
100
VS = 5V
50
25
0
75
TEMPERATURE (°C)
700
300
100
125
LTC1153 • TPC10
20
10
15
SUPPLY VOLTAGE (V)
LTC1153 • TPC09
Supply Current ON
35
5
LTC1153 • TPC08
VIN = 0V
5
20
15
1000
10
25
10
Standby Supply Current
15
30
15
LTC1153 • TPC07
50
20
CGATE = 1000pF
TIME FOR VGATE < 1V
VSEN = VS – 1V
NO EXTERNAL DELAY
45
30
20
10
15
SUPPLY VOLTAGE (V)
15
Built-In Trip Delay
0
0
0
10
LTC1153 • TPC06
TRIP TIME (µs)
TURN OFF TIME (µs)
TURN ON TIME (µs)
500
5
SUPPLY VOLTAGE (V)
40
100
SUPPLY CURRENT (µA)
0
50
45
800
4
20
10
15
SUPPLY VOLTAGE (V)
MOSFET Gate Turn-OFF Time
700
0.1µF
0.01
5
50
200
0.1
LTC1153 • TPC05
MOSFET Gate Turn-ON Time
300
0.33µF
0.033µF
0
1000
600
1µF
60
LTC1153 • TPC04
900
1
70
50
20
10
15
SUPPLY VOLTAGE (V)
TA = 25°C
140
INPUT THRESHOLD VOLTAGE (V)
INPUT THRESHOLD VOLTAGE (V)
2.0
10
RESET PERIOD (SEC)
DRAIN SENSE THRESHOLD VOLTAGE (mV)
150
2.2
45
Auto-Reset Period
Drain Sense Threshold Voltage
2.4
VS = 5V
0
–50 –25
50
25
0
75
TEMPERATURE (°C)
2.0
1.8
1.6
1.4
1.2
1.O
VS = 5V
VS = 18V
0.8
0.6
100
125
LTC1153 • TPC11
0.4
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
LTC1153 • TPC12
LTC1153
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Shutdown Threshold Voltage
Auto-Reset Time*
1000
10
TA = 25°C
*SECONDS OF DELAY
PER µF CT
2.2
1.8
1.6
1.4
VS = 5V
1.2
VS = 18V
1.O
0.8
GATE DRIVE CURRENT (µA)
2.0
AUTO-RESET TIME (s/µF)
SHUTDOWN THRESHOLD VOLTAGE (V)
2.4
MOSFET Gate Drive Current
VS = 12V
VS = 5V
1
VS = 18V
100
VS = 18V
VS = 12V
10
VS = 5V
1
0.6
0.4
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
0.1
–50
0.1
–25
0
50
75
25
TEMPERATURE (°C)
LTC1153 • TPC13
100
125
LTC1153 • TPC14
0
4
8
12
16
GATE VOLTAGE ABOVE SUPPLY (V)
20
LTC1153 • TPC15
U
U
U
PI FU CTIO S
Input and Shutdown Pins
The LTC1153 input pin is active high and activates all of the
protection and charge pump circuitry when switched ON.
The shutdown pin is designed to break the circuit if a
secondary fault condition (over temperature, etc.) is detected. The LTC1153 logic and shutdown inputs are high
impedance CMOS gates with ESD protection diodes to
ground and supply and therefore should not be forced
beyond the power supply rails. The shutdown pin should
be connected to ground when not in use.
Timing Capacitor Pin (Auto-Reset Timer)
The small capacitor charging current (4.2µA) produces
large delays with relatively small valued capacitors, but
care must be taken to ensure that this current is not
shunted to ground through a leaky capacitor or printed
circuit board trace. The timing capacitor voltage is sensed
by a high impedance CMOS comparator input with ESD
clamp diodes to ground and supply and therefore should
not be forced beyond the power supply rails. This pin can
be grounded if the auto-reset function is not used.
MOSFET Gate Drive Pin
The MOSFET gate drive pin is either driven to ground when
the switch is turned OFF or driven above the supply rail
when the switch is turned ON. This pin is a relatively high
impedance when driven above the rail (the equivalent of a
few hundred kΩ). Care should be taken to minimize any
loading of this pin by parasitic resistance to ground or
supply.
Supply Pin
The supply pin of the LTC1153 serves two vital purposes.
The first is obvious: it powers the input, gate drive, regulation and protection circuitry. The second purpose is less
obvious: it provides a Kelvin connection to the top of the
drain sense resistor for the internal 100mV reference.
The LTC1153 is designed to be continuously powered so
that the gate of the MOSFET is actively driven at all times.
If it is necessary to remove power from the supply pin and
then re-apply it, the input pin (or enable pin) should be
cycled a few milliseconds after the power is re-applied to
reset the input latch and protection circuitry. Also, the
input and enable pins should be isolated with 10k resistors
to limit the current flowing through the ESD protection
diodes to the supply pin.
The supply pin of the LTC1153 should never be forced
below ground as this may result in permanent damage to
the device. A 300Ω resistor should be inserted in series
with the ground pin if negative supply voltage transients
are anticipated.
5
LTC1153
U
U
U
PI FU CTIO S
Drain Sense Pin
The drain sense pin is compared against the supply pin
voltage. If the voltage at this pin is more than 100mV
below the supply pin, the input latch will trip and the
MOSFET switch will be turned off.
This pin is also a high impedance CMOS gate with ESD
protection and therefore should not be forced beyond the
power supply rails.
Some loads, such as large supply capacitor, lamps, or
motors require high inrush currents. An RC time is added
between the sense resistor and the drain sense pin to
ensure that the drain sense circuitry does not false trigger
during start-up. This trip delay can be set from a few
microseconds to many seconds. However, very long delays may put the MOSFET switch in risk of being destroyed
by a short-circuit condition. (see Applications Information
Section).
Status Pin
The status pin is an open-drain output which is driven low
whenever the breaker is tripped. A 51k pull-up resistor
should be connected between this output and a logic
supply. The status pins of multiple LTC1153s can be OR’d
together if independent fault sensing is not required. No
connection is required to this pin when not in use.
W
BLOCK DIAGRA
DRAIN
SENSE
ANALOG SECTION
VS
LOW STANDBY
CURRENT
REGULATOR
SHUTDOWN
TTL-TO-CMOS
CONVERTER
10µs
DELAY
COMP
100mV
REFERENCE
SHUTDOWN
GATE CHARGE
AND DISCHARGE
CONTROL LOGIC
ANALOG
GATE
DIGITAL
R
INPUT
TTL-TO-CMOS
CONVERTER
VOLTAGE
REGULATORS
INPUT
LATCH
ONE
SHOT
S
OSCILLATOR
AND CHARGE
PUMP
FAST/SLOW
GATE CHARGE
LOGIC
GND
TIMER
CAP
STATUS
6
AUTO-RESET
TIMER
FAULT DETECTION
AND STATUS
OUTPUT DRIVER
LTC1153 • BD01
LTC1153
WU
W
TI I G DIAGRA
TEST CIRCUITS
5V
1
INPUT
51k
STATUS
2
0.1µF
Z5U 3
4
IN
VS
CT
DS
7
CP
0.01µF
RSEN
0.05Ω
STATUS
G
SD
6
OVER-CURRENT
(AUTO-CURRENT)
NORMAL
SHUTDOWN
OFF
INPUT
*200µs
RD100k
LTC1153
GND
OFF NORMAL
8
OUTPUT
IRLZ24
OUTPUT
5
S1
SHUTDOWN
10Ω
1Ω
LTC1153 • TC01
STATUS
TIMING
CAP
*90ms
SHUTDOWN
LTC1153 • TD01
S1 CLOSED
S1 OPEN
*TIMES FOR COMPONENTS SHOWN IN TEST CIRCUIT
LTC1153 OPERATIO
U
The LTC1153 is an electronic circuit breaker with built-in
MOSFET gate charge pump, over-current detection and
auto-reset circuitry. The LTC1153 consists of the following functional blocks:
TTL and CMOS Compatible Inputs
The LTC1153 input and shutdown input have been designed to accommodate a wide range of logic families.
Both input thresholds are set at about 1.3V with approximately 100mV of hysteresis.
Internal Voltage Regulation
The output of the TTL-to-CMOS converter drives two
regulated supplies which power the low voltage CMOS
logic and analog blocks. The regulator outputs are isolated
from each other so that the noise generated by the charge
pump logic is not coupled into the 100mV reference or the
analog comparator.
Gate Charge Pump
A low standby current voltage regulator provides continuous bias for the TTL-to-CMOS converter. The TTL-toCMOS converter output enables the rest of the circuitry. In
this way the power consumption is kept to a minimum in
the standby mode.
Gate drive for the MOSFET switch is produced by an
adaptive charge pump circuit which generates a gate
voltage substantially higher than the power supply voltage. The charge pump capacitors are included on-chip and
therefore no external components are required to generate
the gate drive.
Auto-Reset Timer
Drain Current Sense
An external timing capacitor, CT, is ramped up by a small
current whenever a fault is detected, i.e., the switch
latched off. When the timing capacitor ramps up to approximately 2.5V, the switch is turned back on and the
timing capacitor discharged. If the circuit breaker output
is still in an overload state, the breaker will latch off and this
cycle will continue until the fault condition is removed.
The LTC1153 is configured to sense the current flowing
into the drain of an N-channel MOSFET switch. An internal
100mV reference is compared to the drop across a sense
resistor (typically 0.002Ω to 0.10Ω) in series with the
drain lead. If the drop across this resistor exceeds the
internal 100mV threshold, the input latch is reset and the
gate is quickly discharged via a relatively large N-channel
transistor.
7
LTC1153
LTC1153 OPERATIO
U
Controlled Gate Rise and Fall Times
Status Output Driver
When the input is switched ON and OFF, the gate is
charged by the internal charge pump and discharged in a
controlled manner. The charge and discharge rates have
been set to minimize RFI and EMI emissions in normal
operation. If a short-circuit or current overload condition
is encountered, the gate is discharged very quickly (typically a few microseconds) by a large N-channel transistor.
The status circuitry continuously monitors the input and
the gate charge control logic. The open-drain output is
driven low when the input is turned ON and the breaker is
latched off. The status circuitry is reset along with the input
latch when the auto-reset circuitry retries the breaker or
the input is cycled low.
U
W
U
UO
APPLICATI
S I FOR ATIO
12V
MOSFET and Load Protection
The LTC1153 protects the power MOSFET switch by
removing drive from the gate as soon as an over-current
condition is detected and breaking the circuit to the load.
Resistive and inductive loads can be protected with no
external time delay in series with the drain sense pin. High
inrush current loads, however, require that the trip delay
time be set long enough to start the load but short enough
to ensure the safety of the MOSFET.
+
100µF
IN
CT
0.22µF
VS
CT
0.036Ω
DS
LTC1153
STATUS
G
IRFZ24
15V
GND
SD
RLOAD
12Ω
CLOAD ≤ 1µF
Resistive Loads
LTC1153 • F01
Loads that are primarily resistive should be protected with
as short a delay as possible to minimize the amount of time
that the MOSFET switch or the load is subjected to an
overload condition. The drain sense circuitry has a builtin trip delay of approximately 10µs to eliminate false
triggering by power supply or load transient conditions.
This delay is sufficient to “mask” short load current
transients and the starting of a small capacitor (<1µF) in
parallel with the load. The drain sense pin can therefore be
connected directly to the drain current sense resistor as
shown in Figure 1.
Inductive Loads
Loads that are primarily inductive, such as relays, solenoids and stepper motor windings should be protected
with as short a delay as possible to minimize the amount
of time that the MOSFET is subjected to an overload
condition. The built-in 10µs trip delay will ensure that the
breaker is not false-tripped by a supply or load transient.
No external delay components are required as shown in
Figure 2.
8
Figure 1. Protecting Resistive Loads
12V
+
100µF
IN
CT
0.22µF
VS
CT
0.036Ω
DS
LTC1153
STATUS
G
IRFZ24
15V
GND
SD
1N5400
12V, 1A
SOLENOID
LTC1153 • F02
Figure 2. Protecting Inductive Loads
Large inductive loads (>0.1mH) may require diodes connected directly across the inductor to safely divert the
stored energy to ground. Many inductive loads have these
diodes included. If not, a diode of the proper current rating
LTC1153
W
U
U
UO
APPLICATI
S I FOR ATIO
should be connected across the load, as shown in Figure
2, to safely divert the stored energy.
Using the values shown in Figure 3, the start-up current is
less than 100mA and does not false-trip the breaker.
Capacitive Loads
Lamp Loads
Large capacitive loads, such as complex electrical systems with large bypass capacitors, should be powered
using the circuit shown in Figure 3. The gate drive to the
power MOSFET switch is passed through an RC delay
network, R1 and C1, which greatly reduces the turn on
ramp rate of the switch. And since the MOSFET source
voltage follows the gate voltage, the load is powered
smoothly and slowly from ground. This dramatically reduces the start-up current flowing into the supply capacitor/s which, in turn, reduces supply transients and allows
for slower activation of sensitive electrical loads. (Diode,
D1, provides a direct path for the LTC1153 protection
circuitry to quickly discharge the gate).
The inrush current created by a lamp during turn-on can be
10 to 20 times greater than the rated operating current.
The circuit shown in Figure 4 shifts the trip threshold up by
a factor of 11:1 (to 30A) for 100ms while the bulb is turned
on. The trip threshold then drops down to 2.7A after the
inrush current has subsided.
12V
+
470µF
IN
VS
CT
CT
0.33µF
10k
0.036Ω
100k
DS
VN2222LL
LTC1153
STATUS
G
0.1µF
1M
12V
GND
+
SD
9.1V
470µF
IN
VS
0.036Ω
CD
0.01µF
CT
0.47µF
CT
DS
GND
G
RD
1OOk
12V/1A
BULB
D1
1N4148
LTC1153
STATUS
MTP3055EL
R1
1OOk
LTC1153 • F04
R2
1OOk
Figure 4. Lamp Driver with Delayed Protection
MTP3055E
SD
C1
0.33µF
OUT
15V
+
CLOAD
100µF
LTC1153 • F03
Selecting RD and CD
Figure 5 is a graph of normalized breaker trip time versus
breaker current. This graph is used to select the two delay
components, RD and CD, which make up a simple RC delay
between the drain sense resistor and the drain sense input.
Figure 3. Powering Large Capacitive Loads
The RC network, RD and CD, in series with the drain sense
input should be set to trip based on the expected characteristics of the load after start-up. With this circuit, it is
possible to power a large capacitive load and still react
quickly (10µs) to break the circuit if a short-circuit condition is encountered. The ramp rate at the output of the
switch as it lifts off ground is approximately:
TRIP DELAY TIME (1 = RC)
10
1
0.1
dV/dt = (VGATE – VTH)/(R1 × C1)
And therefore the current flowing into the capacitor during
start-up is approximately:
ISTART-UP = CLOAD × dV/dt
0.01
1
10
100
BREAKER CURRENT (1 = SET CURRENT)
LTC1153 • F05
Figure 5. Trip Delay Time vs Breaker Current
9
LTC1153
W
U
U
UO
APPLICATI
S I FOR ATIO
The Y axis of the graph is normalized to one RC time
constant. The X axis is normalized to the set current. (The
set current is defined as the current required to develop
100mV across the drain sense resistor).
Note that the trip delay time is shorter for increasing levels
of MOSFET current. This ensures that the total energy
dissipated by the MOSFET is always within the bounds
established by the manufacturer for safe operation. (See
MOSFET data sheet for further S.O.A. information).
12V
5V
+
120k 10k
10µF
IN
VS
0.05Ω
CT
0.47µF
5V
µP OR
CONTROL
LOGIC
CT
DS
LTC1153
10k
STATUS
MTP12N06
G
15V
GND
SD
10k LOAD
300Ω
Using a Speed-Up Diode
LTC1153 • F07
Another way to reduce the trip delay time is to “bypass”
the delay resistor with a small signal diode as shown in
Figure 6. The diode will engage when the drop across the
drain sense resistor exceeds about 0.7V, providing a direct
path to the sense pin and dramatically reducing the trip
delay time. The drain sense resistor value is selected to
limit the maximum DC breaker current to 4A.
12V
+
100µF
IN
VS
0.01µF
CT
0.22µF
CT
1N4148
0.036Ω
1OOk
DS
LTC1153
STATUS
IRF530
G
15V
GND
SD
LOAD
LTC1153 • F06
Figure 7. Reverse Battery Protection
Current Limited Power Supplies
The LTC1153 requires at least 3.5V at the supply pin to
ensure proper operation. It is therefore necessary that the
supply to the LTC1153 be held higher than 3.5V at all
times, even when the output of the switch is short circuited
to ground. The output voltage of a current limited regulator
may drop very quickly during short-circuit and pull the
supply pin of the LTC1153 below 3.5V before the shutdown circuitry has had time to respond and remove drive
from the gate of the power MOSFET. A supply filter should
be added as shown in Figure 8 which holds the supply pin
of the LTC1153 high long enough for the over-current
shutdown circuitry to respond and fully discharge the
gate, i.e., break the circuit.
>7V
5V/2A
REGULATOR
+
+
*20Ω
100µF
Figure 6. Using a Speed-Up Diode
+
Reverse Battery Protection
IN
*47µF
VS
0.1µF
The LTC1153 can be protected against reverse battery
conditions by connecting a resistor in series with the
ground lead as shown in Figure 7. The resistor limits the
supply current to less than 50mA with –12V applied. Since
the LTC1153 draws very little current while in normal
operation, the drop across the ground resistor is minimal.
the 5V µP (or control logic) is protected by the 10k
resistors in series with the input and status pins.
10
CT
0.1Ω
10µF
1N4148
100k
DS
LTC1153
1µF
STATUS
GND
IRLR024
G
SHORT
CIRCUIT
SD
*SUPPLY FILTER COMPONENTS
LTC1153 • F08
Figure 8. Supply Filter for Current Limited Supplies
LTC1153
W
U
U
UO
APPLICATI
S I FOR ATIO
Five volt linear regulators with small output capacitors
are the most difficult to protect as they can “switch”
from a voltage mode to a current limited mode very
quickly. The large output capacitors on many switching
regulators, on the other hand, may be able to hold the
supply pin of the LTC1153 above 3.5V sufficiently long
that this extra filtering is not required.
Because the LTC1153 is micropower in both the standby
and ON state, the voltage drop across the supply filter
is less than 2mV, and does not significantly alter the
accuracy of the 100mV drain sense threshold voltage.
U
TYPICAL APPLICATIO S
Over-Voltage Circuit Breaker
Over-Temperature Circuit Breaker
12V
4.75V TO 5.25V
+
+
10µF
100µF
5V
51k
IN
VS
CT
DS
0.47µF
STATUS
VS
CT
DS
5V
100Ω
51k
0.22µF
5V
LTC1153
IN
MTD3055E
G
LTC1153
STATUS
5.6V
IRLD024
G
30k
GND
GND
SD
*PTC
THERMISTOR
(100°C)
*RL3006-50-100-25-PT0 KEYSTONE
5V
LOAD
SWITCH IS SHUTDOWN WHEN VS > 5.7V
LTC1153 • TA03
24V TO 28V
+
100µF
IN
5V
51k
VS
CT
0.47µF
100µF
+
IN
10µF
DS
CT
51k
0.47µF
MTP12N06
G
VS
5V
LTC1153
STATUS
+
3k
18V
SD
*KEYSTONE RL2006-100-100-30-PT.
MOUNT ON MOSFET OR LOAD HEAT SINK.
+
18V
10µF
DS
STATUS
6.2k
1N4148
G
MTP15N06E
30k
GND
5V
*PTC
THERMISTOR
(100°C)
100k
LTC1153
30k
GND
LTC1153 • TA05
24V to 28V Over-Temperature Circuit Breaker
with Bootstrapped Supply
24V to 28V Over-Temperature Circuit Breaker
24V TO 28V
SD
12V
LOAD
24V TO 28V
LOAD
LTC1153 • TA04
SD
5V
*PTC
THERMISTOR
(100°C)
* KEYSTONE RL2006-100-100-30-PT.
MOUNT ON MOSFET OR LOAD HEAT SINK.
** BOOTSTRAPPING REDUCES IQ(OFF) TO 60µA, IQ(ON) = 1mA.
24V TO 28V
LOAD
LTC1153 • TA06
11
LTC1153
UO
TYPICAL APPLICATI
S
12V Lamp Driver/Circuit Breaker
with Auto-Reset
12V
Relay Driver with Over-Current Protection
and Status Feedback
12V
+
+
100µF
470µF
IN
10k
VS
2Ω
0.02Ω
100k
IN
5V
CT
DS
0.33µF
STATUS
G
0.01µF
CT
1µF
0.1µF
STATUS
SD
1N4148
DS
MTD3055E
LTC1153
1M
GND
10k
VS
5V
VN2222LL
LTC1153
G
IRFZ34
15V
GND
12V
SD
COIL CURRENT LIMITED TO 350mA
CONTACT CURRENT LIMITED TO 5A
LTC1153 • TA07
LTC1153 • TA08
SCSI Termination Power 1A Circuit Breaker with
Auto-Reset and Ramped Turn-On
0.1Ω
MTD3055EL
1N5817
+
4.25V/1A
+
100µF
10µF
20Ω
10k
1N4148
+
ON/OFF
IN
VS
47µF
0.1µF
51k
CT
0.47µF
Z5U
STATUS
1N4148
DS
LTC1153
100k
STATUS
100k
G
0.22µF
GND
SD
LTC1153 • TA09
Logic Controlled Battery Switch with Reverse Battery Protection,
Ramped Turn-On and 10µA Standby Current
Si9956DY
0.05Ω
+
+
4 TO 6
CELLS
SWITCHED
BATTERY
47µF/16V
ON/OFF
IN
VS
CT
DS
51k
0.47µF
STATUS
LTC1153
STATUS
1N4148
100k
100k
G
0.22µF
GND
SD
LTC1153 • TA10
300Ω
12
TO 12V
LOAD
1N4001
12V/2A
BULB
5V
0.02Ω
LTC1153
UO
TYPICAL APPLICATI
S
“4 Cell-to-5V” Regulator with 2A Current Limit, Auto-Reset,
Ramped Turn-On and 10µA Standby Current
+
+
4-CELL
BATTERY
PACK
100µF
ON/OFF
IN
VS
CT
DS
51k
0.47µF
STATUS
IRLR024
1N4148
200pF
LTC1153
STATUS
0.05Ω
100k
100k
10k
8
G
0.22µF
GND
1
3
LT1431
7
SD
6
5V/1A
4
+
470µF
ESR < 0.5Ω
5
LTC1153 • TA11
12V Step-Up Regulator with Soft Start, Auto-Reset Circuit Breaker (Pre-Regulator),
Status Feedback and 10µA Standby Current
0.02Ω
5V
1N5820
50µH
IRLZ24
+
+
470µF
20Ω
100k
1N4148
+
+
ON/OFF
IN
VS
CT
DS
5
150µF
VSW 4
LT1070
2
FB
VC
GND
0.22µF
51k
0.47µF
Z5U
1N4148
3
LTC1153
STATUS
STATUS
GND
100k
330µF
10.72k
1%
VIN
47µF
1
1.24k
1%
100k
G
12V/1A
1k
0.22µF
SD
1µF
LTC1153 • TA12
12V Step-Up Regulator with 1A Circuit Breaker (Post Regulator), Breaker Status
Feedback and Ramped Output
50µH
5V
1N5820
(12V)
+
+
5
150µF
330µF
VIN
VSW 4
LT1070
2
FB
VC
GND
3
1
1k
10.72k
1%
ON/OFF
IN
VS
CT
0.47µF
Z5U
STATUS
10k
0.1µF
51k
1.24k
1%
0.1Ω
1N4148
DS
LTC1153
STATUS
1N4148
100k
100k
G
IRF530
12V
1µF
GND
SD
+
0.22µF
12V/1A
47µF
16V
LTC1153 • TA13
13
LTC1153
UO
TYPICAL APPLICATI
S
Auto-Reset Circuit Breaker with Programmable (1-6) Number of
Retries Using Binary Counter
5V TO 18 V
+
100µF
ON/OFF
0.1Ω
IN
VS
5V
11
4
LOAD
CT
16
VCC
UP
74C193
CARRY
QD
ABCDGND
15 1 10 9
5
12
LTC1153
STATUS
100k
1N4148
DS
0.47µF
Z5U
100k
100k
G
IRF530
12V
7
GND
SD
+
0.22µF
47µF
8
14
FAULT
INPUTS*
LTC1153 • TA14
*SET WITH 3-BIT BINARY WORD = 7 – N
DC Motor Driver with Stall-Current Circuit Breaking (Auto-Reset),
Thermal Overload Shutdown and 10µA Standby Current
12V
+
470µF
ON/OFF
5V
IN
VS
CT
DS
0.1µF
51k
10k
2N2907
100k
G
IRFZ34
120k
MOTOR
FAULT
LED
0.02Ω
LTC1153
0.33µF
STATUS
240Ω
GND
12V
SD
*PTC
THERMISTOR
(100°C)
M
1N5400
*RL3006-50-100-25-PTO KEYSTONE
MOUNT ON MOTOR CHASIS OR MOSFET HEAT SINK
LTC1153 • TA15
14
OUTPUT
LTC1153
U
PACKAGE DESCRIPTIO
N8 Package
8-Lead Plastic Lead
0.300 – 0.320
(7.620 – 8.128)
0.045 – 0.065
(1.143 – 1.651)
0.130 ± 0.005
(3.302 ± 0.127)
8
7
6
5
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
(
0.400
(10.160)
MAX
+0.025
0.325 –0.015
+0.635
8.255
–0.381
0.250 ± 0.010
(6.350 ± 0.254)
0.045 ± 0.015
(1.143 ± 0.381)
)
0.100 ± 0.010
(2.540 ± 0.254)
0.125
(3.175)
MIN
0.020
(0.508)
MIN
1
2
3
4
0.018 ± 0.003
(0.457 ± 0.076)
N8 0392
S8 Package
8-Lead Plastic SOIC
0.189 – 0.197
(4.801 – 5.004)
0.010 – 0.020
× 45°
(0.254 – 0.508)
0°– 8°
TYP
7
6
5
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0.016 – 0.050
0.406 – 1.270
8
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
0.050
(1.270)
BSC
0.228 – 0.244
(5.791 – 6.197)
0.150 – 0.157
(3.810 – 3.988)
1
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of circuits as described herein will not infringe on existing patent rights.
2
3
4
SO8 0392
15
LTC1153
U.S. Area Sales Offices
NORTHEAST REGION
Linear Technology Corporation
One Oxford Valley
2300 E. Lincoln Hwy.,Suite 306
Langhorne, PA 19047
Phone: (215) 757-8578
FAX: (215) 757-5631
CENTRAL REGION
Linear Technology Corporation
Chesapeake Square
229 Mitchell Court, Suite A-25
Addison, IL 60101
Phone: (708) 620-6910
FAX: (708) 620-6977
SOUTHEAST REGION
Linear Technology Corporation
17060 Dallas Parkway
Suite 208
Dallas, TX 75248
Phone: (214) 733-3071
FAX: (214) 380-5138
SOUTHWEST REGION
Linear Technology Corporation
22141 Ventura Blvd.
Suite 206
Woodland Hills, CA 91364
Phone: (818) 703-0835
FAX: (818) 703-0517
NORTHWEST REGION
Linear Technology Corporation
782 Sycamore Dr.
Milpitas, CA 95035
Phone: (408) 428-2050
FAX: (408) 432-6331
International Sales Offices
FRANCE
Linear Technology S.A.R.L.
Immeuble "Le Quartz"
58 Chemin de la Justice
92290 Chatenay Mallabry
France
Phone: 33-1-46316161
FAX: 33-1-46314613
KOREA
Linear Technology Korea Branch
Namsong Building, #505
Itaewon-Dong 260-199
Yongsan-Ku, Seoul
Korea
Phone: 82-2-792-1617
FAX: 82-2-792-1619
TAIWAN
Linear Technology Corporation
Rm. 801, No. 46, Sec. 2
Chung Shan N. Rd.
Taipei, Taiwan, R.O.C.
Phone: 886-2-521-7575
FAX: 886-2-562-2285
GERMANY
Linear Techonolgy GMBH
Untere Hauptstr. 9
D-8057 Eching
Germany
Phone: 49-89-319741-0
FAX: 49-89-3194821
SINGAPORE
Linear Technology Pte. Ltd.
101 Boon Keng Road
#02-15 Kallang Ind. Estates
Singapore 1233
Phone: 65-293-5322
FAX: 65-292-0398
UNITED KINGDOM
Linear Technology (UK) Ltd.
The Coliseum, Riverside Way
Camberley, Surrey GU15 3YL
United Kingdom
Phone: 44-276-677676
FAX: 44-276-64851
JAPAN
Linear Technology KK
5F YZ Building
4-4-12 Iidabashi Chiyoda-Ku
Tokyo, 102 Japan
Phone: 81-3-3237-7891
FAX: 81-3-3237-8010
World Headquarters
Linear Technology Corporation
1630 McCarthy Blvd.
Milpitas, CA 95035-7487
Phone: (408) 432-1900
FAX: (408) 434-0507
10/92
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977
LT/GP 1092 10K REV 0
 LINEAR TECHNOLOGY CORPORATION 1992
Similar pages