LINER LTC1433 450ma, low noise current mode step-down dc/dc converter Datasheet

LTC1433/LTC1434
450mA, Low Noise
Current Mode Step-Down
DC/DC Converters
DESCRIPTION
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FEATURES
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The LTC®1433/LTC1434 are monolithic pulse width modulated step-down DC/DC converters. By utilizing current
mode switching techniques, they provide excellent AC and
DC load and line regulation. Both devices operate at a fixed
frequency with the LTC1434 phase-lockable to an external
clock signal.
High Efficiency: Up to 93%
Constant Frequency Adaptive PowerTM Operation
Input Voltage Range: 3V to 13.5V
Internal 0.6Ω Power Switch (VIN = 10V)
Low Dropout Operation: 100% Duty Cycle
Low-Battery Detector
Internal Power-On Reset Timer
Current Mode Operation for Excellent Line and Load
Transient Response
Low Quiescent Current: 470µA
Shutdown Mode Draws Only 15µA Supply Current
±1% Reference Accuracy
Available in 16- and 20-Lead Narrow SSOP
Both devices incorporate two internal P-channel power
MOSFETs with a parallel combined resistance of 0.6Ω (at
a supply of 10V). The Adaptive Power output stage selectively drives one or both of the switches at frequencies up
to 700kHz to reduce switching losses and maintain high
efficiencies at low output currents.
The LTC1433/LTC1434 are capable of supplying up to
450mA of output current and boasts a ±2.4% output
voltage accuracy. An internal low-battery detector has the
same level of accuracy as the output voltage. A power-on
reset timer (POR) is included which generates a signal
delayed by 65536/fCLK (300ms typ) after the output is
within 5% of the regulated output voltage.
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APPLICATIONS
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Cellular Telephones
Portable Instruments
Wireless Modems
RF Communications
Distributed Power Systems
Scanners
Battery-Powered Equipment
Ideal for current sensitive applications, the devices draw
only 470µA of quiescent current. In shutdown the devices
draw a mere 15µA. To further maximize the life of the
battery source, the internal P-channel MOSFET switch is
turned on continuously in dropout.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Adaptive Power is a trademark of Linear Technology Corporation.
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TYPICAL APPLICATION
LTC1433 Efficiency for
VOUT = 3.3V
68µF**
20V
0.1µF
+
100
D1
VOUT
3.3V
+
1
L1
100µH
2
100µF*
10V
4
3
5
6
0.1µF
7
8
16
PWRVIN
PGND 15
SSW
NC
BSW
NC
LTC1433
SGND
RUN/SS
LBO
LBI
SVIN
COSC
POR
ITH
VOSENSE
VPROG
14
VIN
3.5V TO 12V
90
10k
EFFICIENCY (%)
■
13
12
11
10
POWER-ON
RESET
5.1k
VIN = 5V
VIN = 12V
80
70
VIN = 9V
60
680pF
47pF
9
50
6800pF
D1: MOTOROLA MBRS130LT3 *AVX TPSD107M010R0100
** AVX TPSE686M020R0150
L1: COILCRAFT D03316-104
Figure 1. High Efficiency Step-Down Converter
1433/34 F01
40
0.001
0.01
0.1
LOAD CURRENT (A)
1
1433/34 TA01
1
LTC1433/LTC1434
W W
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AXI U
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ABSOLUTE
RATI GS
(Note 1)
(Voltages Referred to PGND Pin)
Input Supply Voltage (PWRVIN, SVIN) ... 13.5V to – 0.3V
DC Small Switch Current (SSW) ......................... 100mA
Peak Small Switch Current (SSW) ..................... 300mA
Small Switch Voltage
(SSW) ................................(VIN + 0.3V) to (VIN – 13.5V)
DC Large Switch Current (BSW) ....................... 600mA
Peak Large Switch Current (BSW) .......................... 1.2A
Large Switch Voltage
(BSW) ................................(VIN + 0.3V) to (VIN – 13.5V)
PLLIN, PLL LPF, ITH, COSC ........................2.7V to – 0.3V
POR, LBO .................................................. 12V to – 0.3V
LBI, VOSENSE ..............................................10V to – 0.3V
RUN/SS, VPROG Voltages
VIN ≥ 11.7V ...........................................12V to – 0.3V
VIN < 11.7V ............................... (VIN + 0.3V) to – 0.3V
Commercial Temperature Range
LTC1433C/LTC1434C .............................. 0°C to 70°C
Extended Commercial Operating Temperature
Range (Note 2) ....................................... – 40°C to 85°C
Industrial Temperature Range (Note 3)
LTC1433I/LTC1434I ........................... – 40°C to 85°C
Junction Temperature (Note 4)............................. 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
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PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
TOP VIEW
SSW
1
16 PWRVIN
NC
2
15 PGND
BSW
3
14 SVIN
NC
4
13 COSC
SGND
5
12 POR
RUN/SS
6
11 ITH
LBO
7
10 VOSENSE
LBI
8
9
LTC1433CGN
LTC1433IGN
VPROG
TOP VIEW
NC
1
20 PWRVIN
SSW
2
19 PGND
NC
3
18 SVIN
BSW
4
17 PLLIN
SGND
5
16 PLL LPF
NC
6
15 COSC
RUN/SS
7
14 POR
NC
8
13 ITH
LBO
9
12 VOSENSE
LBI 10
GN PACKAGE
16-LEAD PLASTIC SSOP
ORDER PART
NUMBER
LTC1434CGN
LTC1434IGN
11 VPROG
GN PACKAGE
20-LEAD PLASTIC SSOP
TJMAX = 125°C, θJA = 150°C/ W
TJMAX = 125°C, θJA = 150°C/ W
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS TA = 25°C, VIN = 10V, VRUN/SS = 5V, unless otherwise noted. (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
10
50
nA
1.178
3.220
4.880
1.190
3.300
5.000
1.202
3.380
5.120
V
V
V
1.24
1.28
1.32
V
0.002
0.01
%/V
0.5
– 0.5
0.8
– 0.8
%
%
Main Control Loop
IIN VOSENSE
Feedback Current
VPROG Pin Open (Note 5)
VOSENSE
Regulated Output Voltage
1.19V (Adjustable) Selected
3.3V Selected
5V Selected
(Note 5)
VPROG Pin Open
VPROG = 0V
VPROG = VIN
VOVL
Output Overvoltage Lockout
VPROG Pin Open
∆VOSENSE
Reference Voltage Line Regulation
VIN = 3.6V to 13V (Note 5), VPROG Pin Open
VLOADREG
Output Voltage Load Regulation
ITH Sinking 5µA (Note 5)
ITH Sourcing 5µA (Note 5)
2
●
●
●
●
●
LTC1433/LTC1434
ELECTRICAL CHARACTERISTICS TA = 25°C, VIN = 10V, VRUN/SS = 5V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
IPROG
VPROG Input Current
MIN
TYP
MAX
UNITS
0.5V > VPROG
VIN – 0.5V < VPROG < VIN
–4
4
– 10
10
µA
µA
(Note 6)
3.6V < VIN < 13V
VRUN/SS = 0V, 3.6V < VIN < 13V, LBI > 0.9V
VRUN/SS = 0V, 3.6V < VIN < 13V, LBI ≤ 0.48V
470
35
15
70
30
µA
µA
µA
0.8
1.3
2
V
VRUN/SS = 0V
1.2
3
4.5
µA
COSC = 100pF (Note 7)
VPLL LPF = 2.4V
112
200
125
240
142
kHz
kHz
Main Control Loop
IQ
Input DC Supply Current
Normal Mode
Shutdown, Reference Alive
Complete Shutdown
VRUN/SS
RUN/SS Threshold
IRUN/SS
Soft Start Current Source
●
Oscillator and Phase-Locked Loop
fOSC
Oscillator Frequency
VCO High
RPLLIN
PLL Input Resistance
IPLL LPF
Phase Detector Output Current
Sinking Capability
Sourcing Capability
50
fPLLIN < fOSC
fPLLIN > fOSC
10
10
kΩ
15
15
20
20
µA
µA
0.6
1.0
V
0.2
1.0
µA
– 7.5
–4
%
Power-On Reset
VSATPOR
POR Saturation Voltage
IPOR = 1.6mA, VOSENSE = 1V, VPROG Open
ILPOR
POR Leakage
VPOR = 10V, VOSENSE = 1.2V, VPROG Open
VTRPOR
POR Trip Voltage from Regulated
Output
VPROG Pin Open, VOSENSE Ramping Negative
tDPOR
POR Delay
VPROG Pin Open
– 11
65536
Cycles
Low-Battery Comparator
VSATLBO
LBO Saturation Voltage
ILBO = 1.6mA, VLBI = 1.1V
0.6
ILLBO
LBO Leakage
VLBO = 10V, VLBI = 1.4V
VTRLBI
LBI Trip Voltage
High to Low Transition on LBO
VHYSTLB
Low-Battery Comparator Hysteresis
VSDLB
Low-Battery Shutdown Trip Point
IINLBI
LBI Input Current
1.16
1.0
V
0.01
1.0
µA
1.19
1.22
V
40
mV
0.74
V
VLBI = 1.19V
1
50
nA
P-Channel Power FETs Characteristics
RSMFET
RDS(ON) of Small FET
ISSW = 15mA
3.3
4.1
Ω
RBIGFET
RDS(ON) of Big FET
IBSW = 150mA
0.8
1.2
Ω
ILSSW
Small FET Leakage
VRUN/SS = 0V
●
7
1000
nA
ILBSW
Big FET Leakage
VRUN/SS = 0V
●
5
1000
nA
The ● denotes specifications which apply over the specified temperature
range.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: C-grade device specifications are guaranteed over the 0°C to 70°C
temperature range. In addition, C-grade device specifications are assured
over the – 40°C to 85°C temperature range by design or correlation, but
are not production tested.
Note 3: I-grade device specifications are guaranteed over the – 40°C to
85°C temperature range by design, testing or correlation.
Note 4: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
LTC1433/LTC1434: TJ = TA + (PD)(150°C/W)
Note 5: The LTC1433/LTC1434 are tested in a feedback loop which servos
VOSENSE to the feedback point for the error amplifier (VITH = 1.19V).
Note 6: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 7: Oscillator frequency is tested by measuring the COSC charge and
discharge currents and applying the formula:
(
)(
)
8.4(10 8)
1 + 1 –1
fOSC (kHz) = C
OSC (pF) + 11 ICHG IDIS
3
LTC1433/LTC1434
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TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency of Figure 1 for L = 22µH
Dropout Characteristics at Different
Load Currents (VOUT = 3.3V)
Supply Current vs Supply Voltage
100
3.4
480
VIN = 3.6V
3.3
IOUT
3.2 300mA
VIN = 5V
80
70
VIN = 12V
60
VOUT = 3.3V
L = 22µH
CSOC = 47pF
50
40
0.001
0.01
0.1
LOAD CURRENT (A)
OUTPUT VOLTAGE (V)
460
SUPPLY CURRENT (µA)
EFFICIENCY (%)
90
440
420
400
360
1
3
8
9
6
5
7
SUPPLY VOLTAGE (V)
4
4.7
IOUT
300mA
4.5
VPROG = VIN
L = 20µH
COSC = 50pF
4.8
5.0 5.2 5.4 5.6 5.8
SUPPLY VOLTAGE (V)
6.0
1.202
700
1.198
VOUT
3.3V
600
500
VOUT
5V
400
300
200
6.2
7
1.8
5
3
9
11
7
SUPPLY VOLTAGE (V)
RDS(ON) OF BIG FET (Ω)
TA = 70°C
4
3
TA = 0°C
2
4
5
6 7 8 9 10 11 12 13
SUPPLY VOLTAGE (V)
1433/34 G07
–5
15 35 55 75
TEMPERATURE (°C)
115
1433/34 G06
280
VIN = 13.5V
1.4
TA = 25°C
1.2
TA = 70°C
1.0
0.8
0.6
0
95
Switch Leakage Current
vs Temperature
TA = 0°C
0.2
3
1.178
70
0.4
1
1.182
1.170
– 45 – 25
13
1.6
TA = 25°C
1.186
60
240
50
200
40
160
30
120
20
80
SSW PIN
10
40
BSW PIN
0
3
4
5
6 7 8 9 10 11 12 13
SUPPLY VOLTAGE (V)
1433/34 G08
0
20
80
60
100
40
TEMPERATURE (°C)
120
0
140
1433/34 G09
SWITCH LEAKAGE AT BSW PIN (nA)
2.0
5
1.190
1.174
Switch Resistance of Big FET
8
6
1.194
1433/34 G05
Switch Resistance of Small FET
RDS(ON) OF SMALL FET (Ω)
Reference Voltage
vs Temperature
L = 22µH
COSC = 50pF
1433/34 G04
4
1433/34 G03
REFERENCE VOLTAGE (V)
IOUT
400mA
4.2
4.6
VPROG = 0V
L = 20µH
COSC = 50pF
2.4
3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2
SUPPLY VOLTAGE (V)
11
SWITCH LEAKAGE AT SSW PIN (nA)
OUTPUT VOLTAGE (V)
MAXIMUM OUTPUT CURRENT (mA)
IOUT
200mA
4.3
2.7
Maximum Output Current
vs Input Supply
5.0
0
10
800
4.4
IOUT
500mA
2.8
1433/34 G02
5.1
4.6
IOUT
400mA
2.9
2.5
Dropout Characteristics at Different
Load Currents (VOUT = 5V)
4.8
3.0
2.6
380
1433/34 G01
4.9
3.1
LTC1433/LTC1434
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PIN FUNCTIONS
(LTC1433/LTC1434)
SSW (Pin 1/Pin 2): Drain of the Small P-Channel MOSFET
Switch.
BSW (Pin 3/Pin 4): Drain of the Large P-Channel MOSFET
Switch.
SGND (Pin 5): Small-Signal Ground. Must be routed
separately from other grounds to the (–) terminal of COUT.
RUN/SS (Pin 6/Pin 7): Combination of Soft Start and Run
Control Inputs. A capacitor to ground at this pin sets the
ramp time to full current output. The time is approximately 0.5s/µF. Forcing this pin below 1.3V causes all
circuitry to be shut down except the low-battery comparator. For input voltages above 6V this pin is clamped by
a 6V Zener (see Functional Diagram). Applying voltages
greater than 6V to this pin will cause additional current to
flow into this pin.
LBO (Pin 7/Pin 9): Open-Drain Output of an N-Channel
Pull-Down. This pin will sink current when LBI goes below
1.19V.
LBI (Pin 8/Pin 10): The (+) Input of the Low-Battery
Voltage Comparator. The (–) input is connected to the
1.19V reference. When LBI is grounded along with RUN/
SS, this comparator will shut down along with the rest of
the control circuitry. LBO will go to high impedance.
ITH (Pin 11/Pin 13): Error Amplifier Compensation Point.
The current comparator threshold increases with this
control voltage. Nominal voltage range for this pin is 0V
to 2.4V.
POR (Pin 12/Pin 14): Open-Drain Output of an N-Channel Pull-Down. This pin sinks current when the output
voltage is 7.5% out of regulation. When the output rises
to – 5% of its regulated value, the pin goes into high
impedance after 216 (65536) oscillator cycles. The POR
output is asserted when the device is in shutdown,
independent of VOUT.
COSC (Pin 13/Pin 15): External capacitor connects between this pin and ground to set the operating frequency.
PLL LPF (Pin 16 LTC1434): Output of the Phase Detector
and Control Input of the Oscillator. Normally a series RC
lowpass network is connected from this pin to ground. Tie
this pin to SGND in applications which do not use the
phase-locked loop. Can be driven by a 0V to 2.4V logic
signal for a frequency shifting option.
PLLIN (Pin 17 LTC1434): External Synchronizing Input to
the Phase Detector. This pin is internally terminated to
SGND with 50kΩ. Tie this pin to SGND in applications
which do not use the phase-locked loop.
SVIN (Pin 14/Pin 18): Main Supply for All the Control
Circuitry.
VPROG (Pin 9/Pin 11): The voltage at this pin selects the
output voltage. When VPROG = 0V or VPROG = VIN, the
output is set to 3.3V and 5V respectively, with VOSENSE
connected to the output. Leaving VPROG open (DC) allows
the output voltage to be set by an external resistive divider.
VOSENSE is then connected to the common node of the
resistive divider.
PGND (Pin 15/Pin 19): Switch Driver Ground. Connects to
the (–) terminal of CIN. Anode of the Schottky diode must
be connected close to this pin.
VOSENSE (Pin 10/Pin 12): This pin receives the feedback
voltage either from the output or from an external resistive
divider across the output. The VPROG pin determines at
which point VOSENSE must be connected.
NC (Pins 2, 4,/Pins 1, 3, 6, 8): No Connection.
VPROG = 0V
VOUT = 3.3V
VPROG = VIN
VOUT = 5V
VPROG = Open (DC)
VOUT = Adjustable
PWRVIN (Pin 16/Pin 20): Supply for the Internal Power
MOSFETs and Switch Drivers. Must decouple this pin
properly to ground.
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LTC1433/LTC1434
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FUNCTIONAL DIAGRA
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PWRVIN
PLLIN
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PLL
POR
50k
SLOPE
COMP
VCO
OSC
PLL LPF
COSC
LBO
FREQ
SHIFT
+
LOBAT
RSENSE
0.143Ω
CK Q
FF1
D
Q
LBI
BSW
VREF
SSW
+
–
LIDET
–
SB Q
FF2
RB Q
SVIN
VREF
IPEAK
DET
GM
SHDN
POR
+
30k
OVDET
6V
SB Q
FF3
RB Q
12mV
–
RUN/SS
+
+
–
180k
–
VOLTAGE
SELECT
ICOMP
–
SHDN
+
+
ITH
–
0.6V
VREF + 89mV
VSET
VPROG
120k
PGND
SHDN
SVIN
REF
AND
VCC
VREF (1.19V)
240k
60k
VOSENSE
1433/34 FD
SGND
VCC
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OPERATION
(Refer to Functional Diagram)
Main Control Loop
The LTC1433/LTC1434 is a constant frequency, pulsewidth modulated current mode switching regulator. During normal operation, the internal P-channel power MOSFET
is turned on each cycle when the oscillator sets the RS
latch FF3, and turned off when the main current comparator ICOMP resets the latch. The peak inductor current at
which the ICOMP resets the RS latch is controlled by the
voltage on the ITH pin , which is the output of error amplifier
GM. Pins VPROG and VOSENSE, described in the Pin Functions section, allow GM to receive an output feedback
voltage VFB from either the internal or external resistive
dividers. When the load current increases, it causes a
slight decrease in VFB relative to the 1.19V reference,
which in turn causes the ITH voltage to increase until the
average inductor current matches the new load current.
6
60k
The main control loop is shut down by pulling the RUN/SS
pin low. Releasing RUN/SS allows an internal 3µA current
source to charge up the soft start capacitor CSS. When CSS
reaches 1.3V, the main control loop is enabled with the ITH
voltage clamped at approximately 30% of its maximum
value. As CSS continues to charge, ITH is gradually released allowing normal operation to resume.
Comparator OVDET guards against transient overshoots
> 7.5% by turning off the P-channel power MOSFETs and
keeping them off until the fault is removed.
Low Current Operation
The LTC1433/LTC1434 have two internal P-channel
MOSFETs sized for low and high load current conditions.
At low load current, only the small MOSFET will be turned
on while at high load current both MOSFETs will be on.
LTC1433/LTC1434
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OPERATION
(Refer to Functional Diagram)
Having only the small MOSFET on with low load current
reduces switching and gate charge losses, hence boosting
efficiency. For the device to go into low current mode, two
conditions must be satisfied: the peak current of the
inductor should not exceed 260mA and the voltage at the
ITH pin should not exceed 0.6V. When either one of the
conditions is exceeded, the big MOSFET will be turned on
at the next clock cycle.
source connected to the PLLIN pin. The output of the
phase detector at the PLL LPF pin is also the control input
of the oscillator, which operates over a 0V to 2.4V range
corresponding to – 30% to + 30% in the oscillator’s center
frequency. When locked, the PLL aligns the turn-on of the
MOSFETs to the rising edge of the synchronizing signal.
When the PLLIN is left open, PLL LPF goes low, forcing the
oscillator to minimum frequency.
Dropout Operation
When the input supply voltage decreases toward the
output voltage, the rate of change of inductor current
during the on cycle decreases. This reduction means that
the P-channel MOSFETs will remain on for more than one
oscillator cycle since the ICOMP is not tripped. Further
reduction in input supply voltage will eventually cause the
P-channel MOSFET to be turned on 100%, i.e., DC. The
output voltage will then be determined by the input voltage
minus the voltage drop across the MOSFETs. Typically
under dropout, both the power MOSFETs are on since the
voltage on the ITH pin is greater than 0.6V.
Power-On Reset
Frequency Synchronization
The POR pin is an open-drain output which pulls low when
the regulator is out of regulation. When the output voltage
rises to within 5% of regulation, a timer is started which
releases POR after 216 (65536) oscillator cycles. In shutdown the POR output is pulled low.
Short-Circuit Protection
When the output is shorted to ground, the frequency of the
oscillator will be reduced to about 1/4.5 of its designed
rate. This low frequency allows the inductor current to
discharge, thereby preventing runaway. The oscillator’s
frequency will gradually increase to its designed rate when
the output voltage increases above 0.65V.
A phase-locked loop (PLL) is available on the LTC1434 to
allow the oscillator to be synchronized to an external
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APPLICATIONS INFORMATION
The basic LTC1434 application circuit is shown in
Figure 1. External component selection is driven by the
load requirement and begins with the selection of COSC
and L. Next, the Schottky diode D1 is selected followed by
CIN and COUT.
COSC Selection for Operating Frequency
The LTC1433/LTC1434 use a constant frequency architecture with the frequency determined by an external
oscillator capacitor COSC. During the on-time, COSC is
charged by a fixed current plus an additional current
which is proportional to the output voltage of the phase
detector (VPLL LPF on LTC1434). When the voltage on the
COSC capacitor reaches 1.19V, it is reset to ground. The
process then repeats.
The value of COSC is calculated from the desired operating
frequency. Assume the phase-locked loop has no external
oscillator input, i.e. VPLL LPF = 0V.

 4
 1.37  10 
COSC pF = 
 Frequency kHz

( )
( )


 – 11


A graph for selecting COSC vs Frequency is given in Figure
2. For the LTC1433, the expression above is also applicable since its oscillator is internally set up to run at a
condition equal to VPLL LPF = 0V. Therefore when using the
graph for determining the capacitance value for the oscillator frequency, the VPLL LPF = 0V curve should be used for
LTC1433.
7
LTC1433/LTC1434
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APPLICATIONS INFORMATION
700
LTC1433/LTC1434 are used at 100% duty cycle with low
input voltages.
600
FREQUENCY (kHz)
VPLLLPF = 2.5V
500
Inductor Value Calculation
400
The operating frequency and inductor selection are interrelated in that higher operating frequencies permit the use
of a smaller inductor for the same amount of inductor
ripple current. However, this is at the expense of efficiency
due to an increase in MOSFET gate charge losses.
300
VPLLLPF = 1.19V
200
VPLLLPF = 0V
100
0
0
50
100
150
CAPACITANCE ON COSC PIN (pF)
200
1433/34 F02
Figure 2. Selecting COSC for Oscillator Frequency
As the operating frequency is increased the gate charge
losses will be higher, reducing efficiency. The maximum
recommended switching frequency is 700kHz. When using Figure 2 for synchronizable applications, the value of
COSC is selected corresponding to a frequency 30% below
your center frequency (see Phase-Locked Loop and Frequency Synchronization).
Low Supply Operation
The LTC1433/LTC1434 can function down to 3V and the
maximum allowable output current is also reduced at low
input voltages. Figure 3 shows the amount of change as
the supply is reduced down to 2.5V. The minimum guaranteed input supply is 3V.
90
NOT RECOMMENDED
MAXIMUM OUTPUT CURRENT (%)
100
80
70
60
50
4.0
3.0
3.5
SUPPLY VOLTAGE (V)
∆IL =
 V

1
VOUT  1– OUT 
VIN 

( f)(L)
Core losses are dependent on the peak-to-peak ripple
current and core material. Hence, by choosing a larger
inductance the peak-to-peak inductor ripple current will
decrease, therefore decreasing core loss. To further reduce losses, low core loss material such as molypermalloy
or Kool Mµ® can be chosen as the inductor core material.
An indirect way that the inductor affects efficiency is
through the usage of the big P-channel at low load
currents. Lower inductance values will result in high peak
inductor current. Because one of the conditions that
determines the turning on of the large P-channel is peak
current, this will result in the usage of the large P-channel
even though the load current is low. Hence, efficiency at
low load current will be affected. See Efficiency Considerations.
Inductor Core Selection
2.5
1433/34 F03
Figure 3. Maximum Allowable Output Current vs Supply Voltage
Another important point to note is that at a low supply
voltages, the RDS(ON) of the P-channel switch increases
(see Typical Performance Characteristics). Therefore, the
user should calculate the power dissipation when the
8
The inductor value has a direct effect on ripple current. The
ripple current ∆IL decreases with higher inductance or
frequency and increases with higher VIN or VOUT:
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron
cores, forcing the use of more expensive ferrite,
molypermalloy or Kool Mµ cores. Actual core loss is
independent of core size for a fixed inductor value, but it
is very dependent on inductance selected. As inductance
increases, core losses go down. Unfortunately, increased
inductance requires more turns of wire and therefore
copper losses will increase.
Kool Mµ is a registered trademark of Magnetics, Inc.
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Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that inductance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss core material for toroids, but it is more expensive than
ferrite. A reasonable compromise from the same manufacturer is Kool Mµ. Toroids are very space efficient,
especially when you can use several layers of wire. Because they generally lack a bobbin, mounting is more
difficult. However, designs for surface mount are available
which do not increase the height significantly.
Catch Diode Selection
The catch diode carries load current during the off-time.
The average diode current is therefore dependent on the
P-channel switch duty cycle. At high input voltages the
diode conducts most of the time. As VIN approaches VOUT
the diode conducts only a small fraction of the time. The
most stressful condition for the diode is when the output
is short circuited. Under this condition the diode must
safely handle IPEAK at close to 100% duty cycle. A fast
switching diode must also be used to optimize efficiency.
Schottky diodes are a good choice for low forward drop
and fast switching times. Most LTC1433/LTC1434 circuits
will be well served by either a 1N5818, an MBRS130LT3 or
an MBRM5819 Schottky diode.
CIN and COUT Selection
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle VOUT/VIN. To
prevent large voltage transients, a low ESR input capacitor
sized for the maximum RMS current must be used. The
maximum RMS capacitor current is given by:
CIN required IRMS ≈ IMAX
[V (V
OUT
IN − VOUT
)]
1/ 2
VIN
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations
do not offer much relief. Note that capacitor manufacturer’s
ripple current ratings are often based on 2000 hours of life.
This makes it advisable to further derate the capacitor, or
choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to
meet size or height requirements in the design. Always
consult the manufacturer if there is any question.
The selection of COUT is driven by the required effective
series resistance (ESR). Typically once the ESR requirement is satisfied the capacitance is adequate for filtering.
The output ripple (∆VOUT) is determined by:

1 
∆VOUT ≈ ∆IL ESR +
4fCOUT 

where f = operating frequency, COUT = output capacitance
and ∆IL = ripple current in the inductor. The output ripple
is highest at maximum input voltage since ∆IL increases
with input voltage. For the LTC1433/LTC1434, the general
rule for proper operation is:
COUT required ESR < 0.25Ω
Manufacturers such as Nichicon, United Chemicon and
Sanyo should be considered for high performance
through-hole capacitors. The OS-CON semiconductor
dielectric capacitor available from Sanyo has the lowest
ESR/size ratio of any aluminum electrolytic at a somewhat higher price. Once the ESR requirement for COUT
has been met, the RMS current rating generally far
exceeds the IRIPPLE(P-P) requirement.
In surface mount applications multiple capacitors may
have to be paralleled to meet the ESR or RMS current
handling requirements of the application. Aluminum electrolytic and dry tantalum capacitors are both available in
surface mount configurations. In the case of tantalum, it is
critical that the capacitors are surge tested for use in
switching power supplies. An excellent choice is the AVX
TPS series of surface mount tantalums, available in case
heights ranging from 2mm to 4mm. Other capacitor types
include Sanyo OS-CON, Nichicon PL series and Panasonic
SP series. Consult the manufacturer for other specific
recommendations.
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Efficiency Considerations
Since there are two separate pins for the drain of the small
and large P-channel switch, we could utilize two inductors to further enhance the efficiency of the regulator over
the low load current range. Figure 4 shows the circuit
connection.(Also refer to the Typical Applications section.)
L1
BSW
LTC1433/
LTC1434
D1
L2
Hence, the dual inductor configuration is good for the user
who requires as high an efficiency as possible at low load
while retaining constant frequency operation.
Output Voltage Programming
The LTC1433/LTC1434 family all have pin selectable output voltage programming. The output voltage is selected
by the VPROG pin as follows:
VPROG = 0V
VOUT = 3.3V
VPROG = VIN
VOUT = 5V
VPROG = Open (DC)
VOUT = Adjustable
SSW
D2
1433/34 F04
Figure 4. Using Two Inductors for Higher Low Current Efficiency
To reduce core losses, the user can use a higher value
inductor on the small P-channel switch. Since this switch
only carries a small part of the overall current, the user can
still use a small physical size inductor without sacrificing
on copper losses. The Schottky diode can also be chosen
with a lower current rating. For the graph in Figure 5, a
Coilcraft DT1608C series inductor is used along with a
MBRS0520LT3 Schottky diode on the SSW pin. As can be
seen from Figure 5, the average efficiency gain over the
region where the small P-channel is on is about 3%.
100
90
The LTC1433/LTC1434 family also has remote output
voltage sense capability. The top of the internal resistive
divider is internally connected to VOSENSE. For fixed output
voltage applications, the VOSENSE pin is connected to the
output voltage as shown in Figure 6. When using an
external resistive divider, the VPROG pin is left open DC and
the VOSENSE pin is connected to the feedback resistors as
shown in Figure 7. To prevent stray pickup, a 100pF
capacitor is suggested across R1 located close to the
LTC1433/LTC1434.
VPROG
LTC1433/ VOSENSE
LTC1434
GND: VOUT = 3.3V
VIN: VOUT = 5V
VOUT
+
COUT
SGND
VOUT = 3.3V
COSC = 47pF
1433/34 F06
VIN = 5V
EFFICIENCY (%)
Figure 6. LTC1433/LTC1434 Fixed Output Applications
80
VIN = 9V
70
VOUT
VPROG
60
50
40
0.001
LTC1433/ VOSENSE
LTC1434
ONE 22µH INDUCTOR
ON SSW AND BSW
100µH ON SSW
22µH ON BSW
0.01
0.1
LOAD CURRENT (A)
100pF
R2
R1
SGND
1
( )
VOUT = 1.19V 1 +
1433/34 • F05
Figure 5. Efficiency Comparison Between Single Inductor
and Dual Inductor
10
OPEN (DC)
R2
R1
1433/34 F07
Figure 7. LTC1433/LTC1434 Adjustable Applications
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Power-On Reset Function (POR)
The power-on reset function monitors the output voltage
and turns on an open-drain device when it is out of
regulation. An external pull-up resistor is required on the
POR pin.
When power is first applied or when coming out of
shutdown, the POR output is pulled to ground. When the
output voltage rises above a level which is 5% below the
regulated output value, an internal counter starts. After
counting 216 (65536) clock cycles the POR pull-down
device turns off.
The POR output will go low whenever the output voltage
drops below 7.5% of its regulated value for longer than
approximately 30µs, signaling an out-of-regulation condition. In shutdown the POR output is pulled low even if the
regulator’s output is held up by an external source.
Run/Soft Start Function
The RUN/SS pin is a dual purpose pin which provides the
soft start function and a means to shut down the LTC1433/
LTC1434. Soft start reduces input surge currents by
providing a gradual ramp-up of the internal current limit.
Power supply sequencing can also be accomplished using
this pin.
An internal 3µA current source charges up an external
capacitor CSS. When the voltage on RUN/SS reaches 1.3V
the LTC1433/LTC1434 begins operating. As the voltage
on RUN/SS continues to ramp from 1.3V to 2.4V the
internal current limit is also ramped at a proportional
linear rate. The current limit begins at approximately
350mA (at VRUN/SS = 1.3V) and ends at 1.2A (VRUN/SS =
2.4V). The output voltage thus ramps up slowly, charging
the output capacitor while input surge currents are reduced. If RUN/SS has been pulled all the way to ground
there is a delay of approximately 0.5s/µF before starting,
followed by a like time to reach full current.
tDELAY = 5(105)CSS seconds
By pulling the RUN/SS pin below 1.3V, the LTC1433/
LTC1434 are put in low current shutdown. This pin can be
driven directly from logic as shown in Figure 8. Diode D1
in Figure 8 reduces the start delay but allows CSS to ramp
up slowly providing the soft start function. This diode can
be deleted if soft start is not needed. The RUN/SS pin has
an internal 6V Zener clamping the voltage on this pin (see
Functional Diagram).
RUN/SS
RUN/SS
D1
CSS
CSS
1433/34 F08
Figure 8. RUN/SS Pin Interfacing
Phase-Locked Loop and Frequency Synchronization
The LTC1434 has an internal voltage-controlled oscillator and phase detector comprising a phase-locked loop.
This allows the MOSFET turn-on to be locked to the rising
edge of an external source. The frequency range of the
voltage-controlled oscillator is ±30% around the center
frequency fO. The value of COSC is calculated from the
desired operating frequency (fO) with the following
expression (assuming the phase-locked loop is locked,
i.e VPLL LPF = 1.19V):

 4
 2.06  10 
COSC pF = 
 Frequency kHz

( )
( )


 – 11


Instead of using the above expression, Figure 2 graphically shows the relationship between the oscillator frequency and the value of COSC under various voltage
conditions at the PLL LPF pin.
The phase detector used is an edge sensitive digital type
which provides zero degrees phase shift between the
external and internal oscillators. This type of phase detector
will not lock up on input frequencies close to the harmonics
of the VCO center frequency. The PLL hold-in range ∆fH is
equal to the capture range, ∆fH = ∆fC = ±0.3fO.
The output of the phase detector is a pair of complementary current sources charging or discharging the external
filter network on the PLL LPF pin. The relationship
between the voltage on the PLL LPF pin and operating
frequency is shown in Figure 9. A simplified block diagram
is shown in Figure 10.
11
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stable input to the voltage controlled oscillator. The filter
components CLP and RLP determine how fast the loop
acquires lock. Typically RLP = 10k and CLP is 0.01µF to
0.1µF. Be sure to connect the low side of the filter to SGND.
FREQUENCY (kHz)
1.3fO
The PLL LPF pin can be driven with external logic to obtain
a 1:1.9 frequency shift. The circuit shown in Figure 11 will
provide a frequency shift from fO to 1.9fO as the voltage
VPLL LPF increases from 0V to 2.4V. Do not exceed 2.4V on
VPLL LPF.
fO
0.7fO
0
0.5
1.0
1.5
VPLLLPF (V)
2.5
2.0
3.3V OR 5V
PLL LPF
1433/34 F09
2.4V MAX
Figure 9. Relationship Between Oscillator Frequency
and Voltage at PLL LPF Pin
1433/34 F11
EXTERNAL
FREQUENCY
RLP
Figure 11. Directly Driving PLL LPF Pin
2.4V
Low-Battery Comparator
PLL LPF
PLLIN
DIGITAL
PHASE/
FREQUENCY
DETECTOR
COSC
CLP
PHASE
DETECTOR
50k
18k
COSC
OSC
The LTC1433/LTC1434 have an on-chip, low-battery comparator which can be used to sense a low-battery condition when implemented as shown in Figure 12. The resistor divider R3/R4 sets the comparator trip point as follows:
 R4 
VLBTRIP = 1.19 
+ 1
 R3 
1433/34 F10
Figure 10. Phase-Locked Loop Block Diagram
VIN
R4
If the external frequency (VPLLIN) is greater than the center
frequency f0, current is sourced continuously, pulling up
the PLL LPF pin. When the external frequency is less than
f0, current is sunk continuously, pulling down the PLL LPF
pin. If the external and internal frequencies are the same
but exhibit a phase difference, the current sources turn on
for an amount of time corresponding to the phase difference. Thus the voltage on the PLL LPF pin is adjusted until
the phase and frequency of the external and internal
oscillators are identical. At this stable operating point the
phase comparator output is open and the filter capacitor
CLP holds the voltage.
The loop filter components CLP and RLP smooth out the
current pulses from the phase detector and provide a
12
LTC1433/LTC1434
–
R3
+
1.19V REFERENCE
1433/34 F12
Figure 12. Low-Battery Comparator
The divided down voltage at the negative (–) input to the
comparator is compared to an internal 1.19V reference. A
40mV hysteresis is built in to assure rapid switching. The
output is an open-drain MOSFET and requires a pull-up
resistor to operate. This comparator is active in shutdown.
To save more shutdown quiescent current, this comparator can be shut down by taking the LBI pin below 0.74V,
LTC1433/LTC1434
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4. Is the Schottky diode closely connected between the
power ground and switch pin?
further reducing the current to 15µA. The low side of the
resistive divider should connect to SGND.
5. Keep the switching nodes, SSW and BSW away from
sensitive small-signal nodes VOSENSE, PLLIN, PLL LPF,
COSC, ITH and LBI.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1433/LTC1434. These items are also illustrated graphically in the layout diagram of Figure 13. Check the following in your layout:
Design Example
As a design example, assume VIN = 6V, VOUT = 5V, IMAX =
400mA and fOSC = 200kHz. With these requirements we
can start choosing all of the important components.
1. Are the signal and power grounds segregated? The
LTC1433/LTC1434 signal ground pin must return to
the (–) plate of COUT. The power ground returns to the
anode of the Schottky diode and the (–) plate of CIN,
which should have as short lead lengths as possible.
With no frequency synchronization required, the LTC1433
can be used for this circuit. From Figure 2, the VPLL LPF =
0V curve is used to determine the value of the oscillator
capacitor. From the graph a value of 50pF will provide the
desired frequency.
2. Does the LTC1433/LTC1434 VOSENSE pin connect to the
(+) plate of COUT? In adjustable applications, the resistive divider R1/R2 must be connected between the (+)
plate of COUT and signal ground.
Next the inductor value is selected. From the Maximum
Output Current vs Input Supply graph in the Typical
Performance Characteristics section, a value of L = 22µH
would be able to meet the requirement for the output load
current.
3. Does the (+) plate of CIN connect to the power VIN as
close as possible? This capacitor provides the AC
current to the internal P-channel MOSFETs and their
drivers.
For the catch diode, a MBRS130LT3 is selected.
0.1µF
CIN
D1
+
OUTPUT DIVIDER REQUIRED
WITH ADJUSTABLE VERSION
ONLY. CONNECT VOSENSE
TO VOUT FOR FIXED
OUTPUT VOLTAGE
L1
1
2
VOUT
COUT
3
+
4
5
6
CSS
7
8
9
10
20
PWRVIN
PGND 19
NC
SSW
NC
LTC1434
BSW
SGND
SVIN
PLLIN
PLL LPF
NC
COSC
RUN/SS
POR
NC
LBO
LBI
ITH
VOSENSE
VPROG
18
17
16
15
14
13
COSC
12
11
1433/34 F13
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 13. LTC1434 Layout Diagram (See Board Layout Check List)
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CIN will require an RMS current rating of at least 0.2A at
temperature and COUT will require an ESR of less than
0.25Ω. In most of the applications, the requirements for
these capacitors are fairly similar.
Latchup Prevention (Figure 15)
In applications where the input supply can momentarily
dip below the output voltage, it is recommended that a
Schottky diode (D2) be connected from VOUT to VIN. This
diode will prevent the output capacitor from forward
biasing the parasitic diode of the internal monolithic power
MOSFET, preventing a large amount of current from
flowing into the substrate to create a potential latchup
condition.
Figure 14 shows the complete circuit along with its efficiency curve.
100
D1: MBRS130LT3
L1: SUMIDA CD54-220
*AVX TPSD107M010R0100
+
L1
22µH
2
100µF*
10V
4
3
5
6
0.1µF
7
8
16
PWRVIN
PGND 15
SSW
NC
BSW
NC
LTC1433
SGND
RUN/SS
LBO
LBI
SVIN
COSC
POR
ITH
VOSENSE
VPROG
EFFICIENCY (%)
VOUT
5V
400mA
1
90
+
D1
100µF*
10V
0.1µF
VIN
6V
10k
14
13
12
POWER-ON
RESET
11
10
5.1k
VIN = 6V
VOUT = 5V
COSC = 50pF
L = 22µH
80
70
60
50
680pF
40
0.001
50pF
9
6800pF
0.01
0.1
LOAD CURRENT (A)
1
1433/34 F14
Figure 14. Design Example Circuit and its Efficiency Curve
VIN
D2
SW
L
+
LTC1434
D1
VOUT
COUT
1433/34 F15
Figure 15
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Highest Efficiency 3.3V/5V Converter
L1
100µH
D1
D2
2
L2
22µH
VOUT
+
1
3
4
100µF*
10V
5
6
0.1µF
7
8
BSW
LTC1433
NC
SGND
14
SVIN
POWER-ON
RESET
11
10
VOSENSE
LBI
0.1µF
100k
12
ITH
LBO
100pF
68µF**
20V
13
COSC
POR
RUN/SS
+
15
PGND
NC
VIN
3.5V TO 12.5V FOR VOUT = 3.3V
6V TO 12.5V FOR VOUT = 5V
16
PWRVIN
SSW
5.1k
9
VPROG
VPROG = 0V, VOUT = 3.3V
VPROG = VIN, VOUT = 5V
680pF
6800pF
1433/34 TA02
*AVX TPSD107M010R0100
D1: MOTOROLA MBRS0520LT3
** AVX TPSE686M020R0150
D2: MOTOROLA MBRS130LT3
L1: COILCRAFT DT1608C SERIES
L2: SUMIDA CD54 SERIES
Positive-to-Negative – 5V Converter
L1
68µH
+
1
2
100µF*
10V
3
4
D1
5
VOUT
–5V
6
0.01µF
7
8
D1: MOTOROLA MBRS130LT3
L1: COILCRAFT DO3316 SERIES
PWRVIN
SSW
NC
PGND
BSW
NC
LTC1433
SGND
RUN/SS
LBO
LBI
SVIN
COSC
POR
ITH
VOSENSE
VPROG
*AVX TPSD107M010R0100
** AVX TPSE107M016R0100
16
+
15
14
100µF**
16V
VIN
3.5V TO 7.5V
0.1µF
100pF
13
12
6800pF
VIN (V) IOUT(MAX) (mA)
11
10
9
680pF
5.1k
1433/34 TA03
3.0
4.0
5.0
6.0
7.0
7.5
180
240
290
340
410
420
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Negative Boost Converter
+
+
100µF*
16V VOUT
–9V
+
VIN
– 3V TO – 7V
68µF**
20V
100µF* L1
100µH
16V
1
VIN (V) IOUT(MAX) (mA)
NC
NC
5
LTC1433
SGND
6
SVIN
COSC
POR
RUN/SS
7
LBO
8
D1: MOTOROLA MBRS130LT3
L1: COILCRAFT DO3316 SERIES
PGND
BSW
4
0.1µF
PWRVIN
SSW
3
180
300
400
540
680
310k
1%
D1
2
–3
–4
–5
–6
–7
0.1µF
ITH
VOSENSE
LBI
VPROG
16
50k
1%
100pF
15
14
100pF
13
12
6800pF
5.1k
680pF
11
10
1433/34 TA05
9
*AVX TPSE107M016R0100
** AVX TPSE686M020R0150
Ultralow Output Ripple 5V to – 1.25V MR Head Amplifier Supply
0.1µF
+
D1: MOTOROLA MBRM5819
L1: SUMIDA CD54 SERIES
L2: J.W. MILLER PM20-R33M
*AVX TPSD107M010R0100
1
2
L1
22µH
+
VOUT
–1.25V
280mA
100µF* L2
0.33µH
10V
+
100µF*
10V
3
D1
6
0.1µF
1.2k
1%
4
5
23.8k
1%
100pF
100µF*
10V
7
8
PWRVIN
SSW
NC
PGND
BSW
NC
LTC1433
SGND
RUN/SS
LBO
LBI
SVIN
COSC
POR
ITH
VOSENSE
VPROG
16
15
14
VIN
5V
10k
13
12
11
10
POWER-ON
RESET
5.1k
680pF
100pF
9
6800pF
1433/34 TA04
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9V to 12V, – 12V Outputs
D1
L1B
100µH
47µF**
•
1N914
L1A
100µH
2
•
VOUT
12V
+
3
34k
1%
4
Si6447DQ
D2
301k
1%
68µF*
20V
1
5
VOUT
–12V
100pF
6
+
68µF*
20V
0.1µF
7
8
NC
LOW-BATTERY
TRIP AT VIN = 5V
PGND
BSW
NC
LTC1433
SGND
SVIN
COSC
POR
RUN/SS
LBO
LBI
30k
*AVX TPSE686M020R0150
** WIMA MKS2
PWRVIN
SSW
ITH
VOSENSE
VPROG
16
+
15
14
50pF
68µF*
20V
VIN
4.5V TO 12.5V
0.1µF
100k
13
12
POWER-ON
RESET
11
10
680pF
1k
9
6800pF
100k
96k
1433/34 TA07
L1A
L1B
3
2
TOP VIEW
4
1•
L1B
L1A
D1, D2: MOTOROLA MBRS130LT3
L1A, L1B:
MANUFACTURER
PART NO.
COILTRONICS
DALE
CTX100-4
LPT4545-101LA
EACH OUTPUT
VIN (V) IOUT(MAX) (mA)
4.5
5.0
6.0
7.0
8.0
9.0
10.0
11.0
12.0
12.5
50
60
70
100
110
130
145
160
200
205
17
LTC1433/LTC1434
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
GN Package
16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.189 – 0.196*
(4.801 – 4.978)
16 15 14 13 12 11 10 9
0.229 – 0.244
(5.817 – 6.198)
0.150 – 0.157**
(3.810 – 3.988)
1
0.015 ± 0.004
× 45°
(0.38 ± 0.10)
0.007 – 0.0098
(0.178 – 0.249)
0.053 – 0.068
(1.351 – 1.727)
2 3
4
5 6
7
8
0.004 – 0.0098
(0.102 – 0.249)
0° – 8° TYP
0.016 – 0.050
(0.406 – 1.270)
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
18
0.009
(0.229)
REF
0.008 – 0.012
(0.203 – 0.305)
0.025
(0.635)
BSC
GN16 (SSOP) 0398
LTC1433/LTC1434
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
GN Package
20-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.337 – 0.344*
(8.560 – 8.737)
20 19 18 17 16 15 14 13 12
11
0.229 – 0.244
(5.817 – 6.198)
0.150 – 0.157**
(3.810 – 3.988)
1
0.015 ± 0.004
× 45°
(0.38 ± 0.10)
0.007 – 0.0098
(0.178 – 0.249)
0.058
(1.473)
REF
2 3
4
5 6
7
8
0.053 – 0.068
(1.351 – 1.727)
9 10
0.004 – 0.0098
(0.102 – 0.249)
0° – 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.008 – 0.012
(0.203 – 0.305)
0.025
(0.635)
BSC
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
GN20 (SSOP) 0398
19
LTC1433/LTC1434
U
TYPICAL APPLICATIO
5V to ±5V Outputs
IOUT(MAX) = 130mA
IOUT(MIN) = 10mA
VOUT = 5V
2
100µF*
10V
+
L1B
20µH
3
100µF* +
10V
D1
4.7µF**
•
•
L1A
20µH
1
1
2
3
4
4
D2
IOUT(MAX) = 130mA
IOUT(MIN) = 5mA
VOUT = – 5V
5
6
0.01µF
7
8
PWRVIN
SSW
NC
PGND
BSW
NC
LTC1433
SVIN
COSC
SGND
POR
RUN/SS
LBO
LBI
ITH
VOSENSE
VPROG
16
+
15
14
100µF*
10V
VIN
5V
0.1µF
100k
50pF
13
12
POWER-ON
RESET
11
10
5.1k
680pF
9
6800pF
1433/34 TA06
D1: MOTOROLA MBRS130LT3 *AVX TPSD107M010R0100
** WIMA MKS2
L1A, L1B:
MANUFACTURER
PART NO.
COILTRONICS
DALE
CTX20-4
LPT4545-200LA
L1A
L1B
3
2
TOP VIEW
4
1•
L1A
L1B
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT®1074/LT1076
Step-Down Switching Regulators
100kHz, 5A (LT1074) or 2A (LT1076) Internal Switch
LTC1174/LTC1174-3.3/
LTC1174-5
High Efficiency Step-Down and Inverting DC/DC Converters
Burst ModeTM Operation
LTC1265
1.2A High Efficiency Step-Down DC/DC Converter
Burst Mode Operation
LT1375/LT1376
1.5A, 500kHz Step-Down Switching Regulators
High Frequency, Small Inductor, High Efficiency
Switchers, 1.5A Switch
LTC1474
High Efficiency Step-Down Converter
Low IQ = 10µA, 8-Pin MSOP
LTC1435
High Efficiency Synchronous Step-Down Controller
16-Pin Narrow SO and SSOP
LTC1436/LTC1436-PLL
High Efficiency Low Noise Synchronous Step-Down Controllers
24-Pin Narrow and 28-Pin SSOP
LTC1438/LTC1439
Dual High Efficiency Low Noise Synchronous Step-Down Controllers
Up to Four Outputs Capability
LTC1538-AUX
Dual High Efficiency Synchronous Step-Down Controller
Auxiliary Linear Regulator 5V Standby in Shutdown
LTC1539
Dual High Efficiency Low Noise Synchronous Step-Down Controller
Auxiliary Linear Regulator 5V Standby in Shutdown
LTC1627
High Efficiency Monolithic Synchronous DC/DC Converter
Low Supply Voltage: 2.65V to 10V, 0.5A
Burst Mode is a trademark of Linear Technology Corporation.
20
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
14334fa LT/TP 1298 2K REV A • PRINTED IN THE USA
 LINEAR TECHNOLOGY CORPORATION 1996
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