LTC1473 Dual PowerPathTM Switch Driver U FEATURES ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Power Path Management for Systems with Multiple DC Sources All N-Channel Switching to Reduce Power Losses and System Cost Switches and Isolates Sources Up to 30V Adaptive High Voltage Step-Up Regulator for N-Channel Gate Drive Capacitor Inrush and Short-Circuit Current Limited User-Programmable Timer to Limit Switch Dissipation Small Footprint: 16-Pin Narrow SSOP U APPLICATIO S ■ ■ ■ ■ Notebook Computers Portable Instruments Handi-Terminals Portable Medical Equipment Portable Industrial Control Equipment The LTC1473 senses current to limit surge currents both into and out of the batteries and the system supply capacitor during switch-over transitions or during fault conditions. A user-programmable timer monitors the time the MOSFET switches are in current limit and latches them off when the programmed time is exceeded. A unique “2-diode mode” logic ensures system start-up regardless of which input receives power first. , LTC and LT are registered trademarks of Linear Technology Corporation. PowerPath is a trademark of Linear Technology Corporation. U ■ The LTC®1473 provides a power management solution for single and dual battery notebook computers and other portable equipment. The LTC1473 drives two sets of backto-back N-channel MOSFET switches to route power to the input of the main system switching regulator. An internal boost regulator provides the voltage to fully enhance the logic level N-channel MOSFET switches. TYPICAL APPLICATION MBRD340 Si9926DY BAT1 MMBD2838LTI 1 FROM POWER MANAGEMENT µP DCIN 2 3 4 5 CTIMER 4700pF 6 1µF 1mH* 1µF 7 8 LTC1473 IN1 GA1 IN2 SAB1 DIODE TIMER V+ VGG SW GND GB1 16 15 14 RSENSE 0.04Ω 13 SENSE + 12 SENSE – 11 GA2 10 SAB2 9 GB2 COUT INPUT OF SYSTEM HIGH EFFICIENCY DC/DC SWITCHING REGULATOR (LTC1735, ETC) MMBD914LTI BAT2 *COILCRAFT 1812LS-105XKBC Si9926DY 1473 TA01 1 LTC1473 W U PACKAGE/ORDER INFORMATION U W W W (Note 1) DCIN, BAT1, BAT2 Supply Voltage .............. – 0.3 to 32V SENSE +, SENSE –, V + .................................. – 0.3 to 32V GA1, GB1, GA2, GB2 ................................... – 0.3 to 42V SAB1, SAB2 ................................................. – 0.3 to 32V SW, VGG ...................................................... – 0.3 to 42V IN1, IN2, DIODE ........................................– 0.3V to 7.5V Junction Temperature (Note 2) ............................. 125°C Operating Temperature Range Commercial ............................................. 0°C to 70°C Industrial ........................................... – 40°C to 85°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C U ABSOLUTE MAXIMUM RATINGS ORDER PART NUMBER TOP VIEW IN1 1 16 GA1 IN2 2 15 SAB1 DIODE 3 14 GB1 TIMER 4 13 SENSE + V+ 5 12 SENSE – VGG 6 11 GA2 SW 7 10 SAB2 GND 8 9 LTC1473CGN LTC1473IGN GN PART MARKING GB2 1473 1473I GN PACKAGE 16-LEAD NARROW PLASTIC SSOP TJMAX = 125°C, θJA = 150°C/ W Consult factory for Military grade parts. ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. Test circuit, V + = 20V, unless otherwise specified. SYMBOL PARAMETER V+ Supply Operating Range CONDITIONS MIN TYP 4.75 + – MAX UNITS 30 V 100 200 µA 7.5 8.5 9.5 V 2.7 3.1 3.5 V 0.75 1 1.25 V IS Supply Current VGS VGS Gate Supply Voltage VIN1 = VDIODE = 5V, VIN2 = 0V, VSENSE = VSENSE = 20V VGS = VGG – V+ V +UVLO V + Undervoltage Lockout Threshold V + Ramping Down V +UVLOHYS V + Undervoltage Lockout Hysteresis VHIDIGIN Digital Input Logic High ● VLODIGIN Digital Input Logic Low ● IIN Input Current VGS(ON) Gate-to-Source ON Voltage IGA1 = IGA2 = IGB1 = IGB2 = – 1µA, VSAB1 = VSAB2 = 20V ● VGS(OFF) Gate-to-Source OFF Voltage IGA1 = IGA2 = IGB1 = IGB2 = 100µA, VSAB1 = VSAB2 = 20V ● IBSENSE + SENSE + Input Bias Current VSENSE + = VSENSE – = 20V VSENSE + = VSENSE – = 0V (Note 3) ● ● IBSENSE – SENSE – Input Bias Current VSENSE + = VSENSE – = 20V VSENSE + = VSENSE – = 0V (Note 3) VSENSE Inrush Current Limit Sense Voltage VSENSE – = 20V (VSENSE + – VSENSE –) VSENSE – = 0V (VSENSE + – VSENSE –) IPDSAB SAB1, SAB2 Pull-Down Current VIN1 = VIN2 = VDIODE = 0.8V VIN1 = VIN2 = 0.8V, VDIODE = 2V ITIMER Timer Source Current VIN1 = 0.8V, VIN2 = VDIODE = 2V, VTIMER = 0V, VSENSE + – VSENSE – = 300mV VTIMER Timer Latch Threshold Voltage VIN1 = 0.8V, VIN2 = VDIODE = 2V t ON Gate Drive Rise Time CGS = 1000pF, VSAB1 = VSAB2 = 0V (Note 4) 33 µs t OFF Gate Drive Fall Time CGS = 1000pF, VSAB1 = VSAB2 = 20V (Note 4) 2 µs t D1 Gate Drive Turn-On Delay CGS = 1000pF, VSAB1 = VSAB2 = 0V (Note 4) 22 µs t D2 Gate Drive Turn-Off Delay CGS = 1000pF, VSAB1 = VSAB2 = 20V (Note 4) fOVGG VGG Regulator Operating Frequency 2 ● ● 2 1.6 1.5 VIN1 = VIN2 = VDIODE = 5V 5.0 V 0.8 V ±1 µA 5.7 7.0 V 0 0.4 V 2 – 300 4.5 – 160 6.5 – 100 µA µA ● ● 2 – 300 4.5 – 160 6.5 – 100 µA µA ● 0.15 0.10 0.20 0.20 0.25 0.30 V V 5 30 20 200 30 300 µA µA ● 3 5.5 8 µA ● 1.1 1.2 1.3 V 1 µs 30 kHz LTC1473 ELECTRICAL CHARACTERISTICS Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD)(150°C/W) Note 3: IS increases by the same amount as IBSENSE + + IBSENSE – when their common mode falls below 5V. Note 4: Gate turn-on and turn-off times are measured with no inrush current limiting, i.e., VSENSE = 0V. Gate rise times are measured from 1V to 4.5V and fall times are measured from 4.5V to 1V. Delay times are measured from the input transition to when the gate voltage has risen or fallen to 3V. U W TYPICAL PERFORMANCE CHARACTERISTICS DC Supply Current vs Temperature 140 140 130 VDIODE = VIN1 = 5V VIN2 = 0V 120 100 VDIODE = 5V VIN1 = VIN2 = 0V 80 60 40 20 0 5 10 15 20 25 30 SUPPLY VOLTAGE (V) 35 500 V + = 20V VDIODE = VIN1 = 5V VIN2 = 0V 120 110 VDIODE = 5V VIN1 = VIN2 = 0V 100 90 80 70 350 300 250 200 100 – 25 25 50 75 0 TEMPERATURE (°C) 1473 G01 100 Undervoltage Lockout Threshold (V +) vs Temperature VGS Gate Supply Voltage vs Temperature 9.0 5.9 5.0 8.9 5.8 4.5 5.6 5.5 5.4 4.0 3.0 2.5 2.0 5.2 1.5 – 25 25 50 75 0 TEMPERATURE (°C) 100 125 1473 G04 SHUTDOWN THRESHOLD 3.5 5.3 5.1 – 50 START-UP THRESHOLD VGS GATE SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) V + = VSAB =20V 5.7 5 7.5 10 12.5 15 17.5 20 |VSENSE| COMMON MODE(V) 1473 • TPC02.5 5.5 6.0 2.5 0 125 1473 G02 VGS Gate-to-Source ON Voltage vs Temperature VGS GATE-TO-SOURCE ON VOLTAGE (V) 400 150 50 – 50 40 V+ = 20V VDIODE = VIN1 = 5V VIN2 = 0V VSENSE + – VSENSE – = 0V 450 60 VSENSE + = VSENSE – = V + 0 DC Supply Current vs VSENSE SUPPLY CURRENT (µA) 160 SUPPLY CURRENT (µA) SUPPLY CURRENT (µA) DC Supply Current vs Supply Voltage 1.0 – 50 V + = 20V VGS = VGG – V + 8.8 8.7 8.6 8.5 8.4 8.3 8.2 – 25 25 50 75 0 TEMPERATURE (°C) 100 125 1473 G05 8.1 – 50 – 25 25 50 75 0 TEMPERATURE (°C) 100 125 1473 G03 3 LTC1473 U W TYPICAL PERFORMANCE CHARACTERISTICS 2.0 1.8 45 V + = 20V CLOAD = 1000pF VSAB = 20V GATE FALL TIME 1.6 1.4 TURN-OFF DELAY 1.2 1.0 0.8 0.6 0.4 – 50 – 25 25 50 75 0 TEMPERATURE (°C) 100 40 35 V + = 20V CLOAD = 1000pF VSAB = 0V 40 TURN-ON DELAY 25 20 15 10 1.7 1.6 VHIGH 1.4 1.3 VLOW 1.1 1.0 – 50 – 25 25 50 75 0 TEMPERATURE (°C) 100 25 50 75 0 TEMPERATURE (°C) 100 125 1.28 VHIGH 1.7 1.6 1.5 VLOW 1.4 1.3 1.2 1.1 1.0 – 50 – 25 25 50 75 0 TEMPERATURE (°C) 100 1.24 1.22 1.20 1.18 1.16 1.14 1.12 1.10 – 50 125 – 25 25 50 75 0 TEMPERATURE (°C) 175 V+ = 20V VDIODE = VIN1 = 5V VIN2 = 0V VSENSE + – VSENSE – = 0V 150 7.0 6.5 6.0 5.5 5.0 125 100 75 50 25 0 –25 – 25 25 50 75 0 TEMPERATURE (°C) 100 125 1473 G13 0 100 125 1473 G12 Sense Pin Source Current IBSENSE vs VSENSE SENSE PIN CURRENT (µA) TIMER SOURCE CURRENT (µA) V + = 20V 1.26 1473 G11 7.5 10000 Timer Latch Threshold Voltage vs Temperature V + = 20V 4.5 4 100 1000 GATE CAPACITIVE LOADING (pF) 1473 G08 1.8 V + = 20V TIMER = 0V 4.0 – 50 FALL TIME VSAB = 20V 10 125 Timer Source Current vs Temperature 8.0 10 0 – 25 1473 G10 8.5 15 5 TIMER LATCH THRESHOLD VOLTAGE (V) LOGCI INPUT THRESHOLD VOLTAGE (V) LOGIC INPUT THRESHOLD VOLTAGE (V) 1.9 1.2 20 Logic Input Threshold Voltage vs Temperature V + = 5V 1.5 25 1473 G06 Logic Input Threshold Voltage vs Temperature 1.8 RISE TIME VSAB = 0V 30 5 1473 G07 1.9 35 GATE RISE TIME 30 0 – 50 125 Rise and Fall Time vs Gate Capacitive Loading RISE AND FALL TIME (µs) 2.2 Turn-On Delay and Gate Rise Time vs Temperature TURN-ON DELAY AND GATE RISE TIME (µs) TURN-OFF DELAY AND GATE FALL TIME (µs) Turn-Off Delay and Gate Fall Time vs Temperature 2.5 5 7.5 10 12.5 VSENSE (V) 15 17.5 20 1473 • TPC14 LTC1473 U U U PIN FUNCTIONS IN1 (Pin 1): Logic Input of Gate Drivers GA1 and GB1. IN1 is disabled when IN2 is high or DIODE is low. IN2 (Pin 2): Logic Input of Gate Drivers GA2 and GB2. IN2 is disabled when IN1 is high or DIODE is low. DIODE (Pin 3): “2-Diode Mode” Logic Input. DIODE overrides IN1 and IN2 by forcing the two back-to-back external N-channel MOSFET switches to mimic two diodes. TIMER (Pin 4): Fault Timer. A capacitor connected from this pin to GND programs the time the MOSFET switches are allowed to be in current limit. To disable this function, Pin 4 can be grounded. V+ (Pin 5): Input Supply. Bypass this pin with at least a 1µF capacitor. VGG (Pin 6): Gate Driver Supply. This high voltage supply is intended only for driving the internal micropower gate drive circuitry. Do not load this pin with any external circuitry. Bypass this pin with at least 1µF. SW (Pin 7): Open Drain of an internal N-Channel MOSFET Switch. This pin drives the bottom of the VGG switching regulator inductor which is connected between this pin and the V+ pin. GND (Pin 8): Ground. GA2, GB2 (Pins 11, 9): Switch Gate Drivers. GA2 and GB2 drive the gates of the second back-to-back external N-channel switches. SAB2 (Pin 10): Source Return. The SAB2 pin is connected to the sources of SW A2 and SW B2. A small pull-down current source returns this node to 0V when the switches are turned off. SENSE – (Pin 12): Inrush Current Input. This pin should be connected directly to the bottom (output side) of the low value current sense resistor in series with the two input power selector switch pairs, SW A1/B1 and SW A2/B2, for detecting and controlling the inrush current into and out of the power supply sources and the output capacitor. SENSE + (Pin 13): Inrush Current Input. This pin should be connected directly to the top (switch side) of the low value current sense resistor in series with the two input power selector switch pairs, SW A1/B1 and SW A2/B2, for detecting and controlling the inrush current into and out of the power supply sources and the output capacitor. Current limit is invoked when (VSENSE + – VSENSE –) exceeds ±0.2V. GA1, GB1 (Pins 16, 14): Switch Gate Drivers. GA1 and GB1 drive the gates of the first back-to-back external N-channel switches. SAB1 (Pin 15): Source Return. The SAB1 pin is connected to the sources of SW A1 and SW B1. A small pull-down current source returns this node to 0V when the switches are turned off. 5 LTC1473 W FUNCTIONAL DIAGRA U U 16 GA1 SW A1/B1 GATE DRIVERS IN1 1 IN2 2 DIODE 15 SAB1 14 GB1 13 SENSE + INRUSH CURRENT SENSE 12 SENSE – 3 11 GA2 V+ SW A2/B2 GATE DRIVERS 5.5µA 10 SAB2 9 GB2 TIMER 4 TO GATE DRIVERS V+ 5 VGG 6 SW 7 R 900k VGG SWITCHING REGULATOR GND LATCH + S – 1.20V 8 1473 FD 6 LTC1473 U OPERATION The LTC1473 is responsible for low-loss switching and isolation at the “front end” of the power management system, where up to two battery packs can be connected and disconnected seamlessly. Smooth switching between input power sources is accomplished with the help of lowloss N-channel switches. They are driven by special gate drive circuitry which limits the inrush current in and out of the battery packs and the system power supply capacitors. All N-Channel Switching The LTC1473 drives external back-to-back N-channel MOSFET switches to direct power from two sources: the primary battery and the secondary battery or a battery and a wall unit. (N-channel MOSFET switches are more cost effective and provide lower voltage drops than their Pchannel counterparts.) two switch pairs, SW A1/B1 and SW A2/B2, during the transitions. Figure 2 shows a block diagram of a switch driver pair, SW A1/B1. A bidirectional current sensing and limiting circuit determines when the voltage drop across RSENSE reaches ±200mV. The gate-to-source voltage, VGS, of the appropriate switch is limited during the transition period until the inrush current subsides, generally within a few milliseconds, depending upon the value of the following system’s input capacitor. This scheme allows capacitors and MOSFET switches of differing sizes and current ratings to be used in the same system without circuit modifications. DCIN LTC1473 L1 1mH The gate drive for the low-loss N-channel switches is supplied by an internal micropower boost regulator which is regulated at approximately 8.5V above V +, up to 37V maximum. In two battery systems, the LTC1473 V + pin is diode ORed through three external diodes connected to the three main power sources, DCIN, BAT1 and BAT2. Thus, VGG is regulated at 8.5V above the highest power source and will provide the overdrive required to fully enhance the MOSFET switches. (8.5V + V +) TO GATE DRIVERS VGG C1 1µF 50V SW VGG SWITCHING REGULATOR C2 1µF 50V GND 1473 F01 Figure 1. VGG Switching Regulator SW B1 SW A1 RSENSE OUTPUT LOAD BAT1 + COUT GA1 Inrush and Short-Circuit Current Limiting The LTC1473 uses an adaptive inrush current limiting scheme to reduce current flowing in and out of the two main power sources and the following system’s input capacitor during switch-over transitions. The voltage across a single small valued resistor, RSENSE, is measured to ascertain the instantaneous current flowing through the BAT2 V+ Gate Drive (VGG) Power Supply For maximum efficiency the top of the boost regulator inductor is connected to V + as shown in Figure 1. C1 provides filtering at the top of the 1mH switched inductor, L1, which is housed in a small surface mount package. An internal diode directs the current from the 1mH inductor to the VGG output capacitor C2. BAT1 6V SAB1 6V VGG SW A/B GATE DRIVERS GB1 VSENSE + VSENSE – ± 200mV THRESHOLD BIDIRECTIONAL INRUSH CURRENT SENSING AND LIMITING LTC1473 1473 F02 Figure 2. SW A1/B1 Inrush Current Limiting 7 LTC1473 U W U U APPLICATIONS INFORMATION After the transition period, the VGS of both MOSFETs in the selected switch pair rises to approximately 5.6V. The gate drive is set at 5.6V to provide ample overdrive for standard logic-level MOSFET switches without exceeding their maximum VGS rating. In the event of a fault condition the current limit loop will limit the inrush current into the short. At the instant the MOSFET switch is in current limit, i.e., when the voltage drop across RSENSE is ±200mV, a fault timer will start timing. It will continue to time as long as the MOSFET switch is in current limit. Eventually the preset time will lapse and the MOSFET switch will latch off. The latch is reset by deselecting the gate drive input. Fault time-out is programmed by an external capacitor connected between the TIMER pin and ground. POWER PATH SWITCHING CONCEPTS Power Source Selection The LTC1473 drives low-loss switches to direct power in the main power path of a single or dual rechargeable battery system, the type found in many notebook computers and other portable equipment. Figure 3 is a conceptual block diagram that illustrates the main features of an LTC1473 dual battery power management system starting with the three main power sources and ending at the output load (i.e.: system DC/DC regulator). Switches SW A1/B1 and SW A2/B2 direct power from either batteries to the input of the DC/DC switching regulator. Each of the switches is controlled by a TTL/CMOS compatible input that can interface directly with a power management system µP. Using Tantalum Capacitors The inrush (and “outrush”) current of the system DC/DC regulator input capacitor is limited by the LTC1473, i.e., the current flowing both in and out of the capacitor during transitions from one input power source to another is limited. In many applications, this inrush current limiting makes it feasible to use smaller tantalum surface mount capacitors in place of larger aluminum electrolytics. Note: The capacitor manufacturer should be consulted for specific inrush current specifications and limitations and some experimentation may be required to ensure compliance with these limitations under all possible operating conditions. Back-to-Back Switch Topology The simple SPST switches shown in Figure 3 actually consist of two back-to-back N-channel switches. These low-loss N-channel switch pairs are housed in 8-pin SO and SSOP packaging and are available from a number of manufacturers. The back-to-back topology eliminates the problems associated with the inherent body diodes in power MOSFET switches and allows each switch pair to DCIN OUTPUT LOAD SW A1/B1 INRUSH CURRENT LIMITING BAT1 SW A2/B2 + CIN BAT2 LTC1473 HIGH EFFICIENCY DC/DC SWITCHING REGULATOR POWER MANAGEMENT µP 1473 F03 Figure 3. LTC1473 PowerPath Conceptual Diagram 8 12V 5V 3.3V LTC1473 U W U U APPLICATIONS INFORMATION The back-to-back topology also allows for independent control of each half of the switch pair which facilitates bidirectional inrush current limiting and the so-called “2-diode mode” described in the following section. management µP is powered even under start-up or abnormal operating conditions. (An undervoltage lockout circuit defeats this mode when the V + pin drops below approximately 3.2V. The supply to V + comes from the main power sources, DCIN, BAT1 and BAT2 through three external diodes as shown in Figure 1.) The 2-Diode Mode The 2-diode mode is asserted by applying an active low to the DIODE input. block current flow in either direction when both switches are turned off. Under normal operating conditions, both halves of each switch pair are turned on and off simultaneously. For example, when the input power source is switched from BAT1 to BAT2 in Figure 4, both gates of switch pair SW A1/B1 are normally turned off and both gates of switch pair SW A2/B2 are turned on. The back-to-back body diodes in switch pair, SW A1/B1, block current flow in or out of the BAT1 input connector. In the “2-diode mode,” only the first half of each power path switch pair, i.e., SW A1 and SW A2, are turned on; and the second half, i.e., SW B1 and SW B2 are turned off. These two switch pairs now act simply as two diodes connected to the two main input power sources as illustrated in Figure 4. The power path diode with the highest input voltage passes current through to the output load (i.e. input of the DC/DC converter) to ensure that the power COMPONENT SELECTION N-Channel Switches The LTC1473 adaptive inrush current limiting circuitry permits the use of a wide range of logic-level N-Channel MOSFET switches. A number of dual, low RDS(ON) N-channel switches in 8-lead surface mount packages are available that are well suited for LTC1473 applications. The maximum allowable drain-source voltage, VDS(MAX), of the two switch pairs, SW A1/B1 and SW A2/B2 must be high enough to withstand the maximum DC supply voltage. If the DC supply is in the 20V to 28V range, use 30V MOSFET switches. If the DC supply is in the 10V to 18V range, and is well regulated, then 20V MOSFET switches will suffice. DCIN SW B1 OUTPUT LOAD RSENSE SW A1 BAT1 ON SW B2 OFF SW A2 + CIN HIGH EFFICIENCY DC/DC SWITCHING REGULATOR 12V 5V 3.3V BAT2 ON OFF LTC1473 POWER MANAGEMENT µP 1473 F04 Figure 4. LTC1473 PowerPath Switches in 2-Diode Mode 9 LTC1473 U W U U APPLICATIONS INFORMATION As a general rule, select the switch with the lowest RDS(ON) and able to withstand the maximum allowable VDS. This will minimize the heat dissipated in the switches while increasing the overall system efficiency. Higher switch resistances can be tolerated in some systems with lower current requirements, but care should be taken to ensure that the power dissipated in the switches is never allowed to rise above the manufacturers’ recommended level. The fault time delay is programmed with an external capacitor between the TIMER pin and GND. At the instant the MOSFET switch enters current limit, a 5.5µA current source starts charging CTIMER through the TIMER pin. When the voltage across CTIMER reaches 1.2V an internal latch is set and the MOSFET switch is turned off. To reset the latch, the logic input of the MOSFET gate driver is deselected. Inrush Current Sense Resistor, RSENSE The fault time delay should be programmed as large as possible, at least 3× to 5× the maximum switching transition period, to avoid prematurely tripping the protection circuit. Conversely, for the protection circuit to be effective, the fault time delay must be within the safe operating area of the MOSFET switches, as stated in the manufacturer’s data sheet. A small valued sense resistor (current shunt) is used by the two switch pair drivers to measure and limit the inrush or short-circuit current flowing through the conducting switch pair. The inrush current limit should be set at approximately 2× or 3× the maximum required output current. For example, if the maximum current required by the DC/DC converter is 2A, an inrush current limit of 6A is set by selecting a 0.033Ω sense resistor, RSENSE, using the following formula: RSENSE = (200mV)/IINRUSH Note that the voltage drop across the resistor in this example is only 66mV under normal operating conditions. Therefore, the power dissipated in the resistor is extremely small (132mW), and a small 1/4W surface mount resistor can be used in this application (the resistor will tolerate the higher power dissipation during current limit for the duration of the fault time-out). A number of small valued surface mount resistors are available that have been specifically designed for high efficiency current sensing applications. Programmable Fault Timer Capacitor, CTIMER A fault timer capacitor, CTIMER, is used to program the time duration the MOSFET switches are allowed to be in continuous current limit. In the event of a fault condition, the MOSFET switch is driven into current limit by the inrush current limit loop. The MOSFET switch operating in current limit is in a high dissipation mode and can fail catastrophically if not promptly terminated. The maximum switching transition period happens during a cold start, when a fully charged battery is connected to an unpowered system. The inrush current charging the system supply capacitor to the battery voltage determines the switching transition period. The following example illustrates the calculation of CTIMER. Assume the maximum battery voltage is 20V, the system supply capacitor is 68µF, the inrush current limit is 6A and the maximum current required by the DC/DC converter is 2A. Then, the maximum switching transition period is calculated using the following formula: tSW(MAX) = (VBAT(MAX))(CIN(DC/DC)) IINRUSH – ILOAD tSW(MAX) = (20)(68µF) = 340µs 6A – 2A Multiplying 3 by 340µs gives 1.02ms, the minimum fault delay time. Make sure this delay time does not fall outside of the safe operating area of the MOSFET switch dissipating 60W (6A • 20V/2). Using this delay time the CTIMER can be calculated using the following formula: CTIMER = 1.02ms ) ) 5.5µA = 4700pF 1.20V Therefore, CTIMER should be 4700pF. 10 LTC1473 U W U U APPLICATIONS INFORMATION VGG Regulator Inductor and Capacitors The VGG regulator provides a power supply voltage 8.5V higher than any of the three main power source voltages to allow the control of N-channel MOSFET switches. This micropower, step-up voltage regulator is powered by the highest potential available from the three main power sources for maximum regulator efficiency. Three external components are required by the VGG regulator: L1, C1 and C2, as shown in Figure 5. L1 is a small, low current, 1mH surface mount inductor. C1 provides filtering at the top of the 1mH switched inductor and should be at least 1µF to filter switching transients. The VGG output capacitor, C2, provides storage and filtering for the VGG output and should be at least 1µF and rated for 50V operation. C1 and C2 can be ceramic capacitors. DCIN LTC1473 BAT1 BAT2 V+ L1* 1mH TO GATE DRIVERS (8.5V + V +) VGG C1 1µF 50V SW VGG SWITCHING REGULATOR C2 1µF 50V GND *COILCRAFT 1812LS-105 XKBC. (708) 639-6400 1473 F05 Figure 5. VGG Step-Up Switching Regulator 11 LTC1473 U TYPICAL APPLICATIONS Input Power Routing Circuit for Microprocessor Controlled Dual Battery Dual Chemistry System Si9926DY Si9926DY 16 15 14 RSENSE 0.033Ω MMBD2838LT1 LTC1473 1 IN1 2 IN2 3 DIODE GA1 SAB1 GB1 13 SENSE + TIMER 12 SENSE – V+ 11 10 9 GA2 VGG SAB2 SW GND GB2 4 LTC1473 16 IN1 GA1 2 IN2 15 SAB1 3 14 DIODE GB1 13 4 + TIMER SENSE 12 5 + – V SENSE 11 6 VGG GA2 10 7 SW SAB2 9 8 GND GB2 1 750k CTIMER 4700pF CTIMER 4700pF 500k 5 6 7 C7 1µF 8 Si9926DY C8 1µF L1* 1mH Si9926DY MMBD914LT1 BAT2 8.4V Li-Ion BAT1 12V NiCd POWER MANAGEMENT µP RSENSE 0.033Ω HIGH EFFICIENCY DC/DC SWITCHING REGULATOR SMBus MBRD340 1473 TA02 DCIN BATTERY CHARGER * COILCRAFT 1812LS-105XKBC 12 LTC1473 U TYPICAL APPLICATIONS Complete Front End Including Battery Charger and DC/DC Converter with Automatic Switchover Between Battery and DCIN C2, 0.1µF COSC 57pF 1 CSS, 0.1µF RC, 10k TG RUN/SS 3 CC2, 51pF C1 100pF COSC 2 BOOST ITH SW 16 15 14 13 LTC1735 12 INTVCC SGND 11 6 BG VOSENSE 10 7 – SENSE PGND 9 8 SENSE + EXTVCC VOUT 4 CC 330pF SFB C4 0.1µF D1 CMDSH-3 VIN L1* 10µH 5 C5 1000pF CIN 22µF 35V ×2 + Q1 Si4412DY + C3 4.7µF 16V Q2 Si4412DY RSENSE 0.015Ω COUT 100µF 10V ×3 D2 MBRS140T3 VOUT 5V/3.5A + R1 105k 1% C6 100pF SGND R2 20k 1% Si9926DY 74C00 13 11 MMBD2838LT1 1 12 2 3 10 7 8 4 6 3 9 1 2 5 4700pF CTIMER 5 4 14 R5 500k 6 C7 1µF C8 1µF 7 L2** 1mH 8 LTC1473 IN1 GA1 IN2 SAB1 DIODE GB1 16 15 14 RSENSE 0.033Ω + 13 TIMER SENSE V+ SENSE – VGG GA2 SW SAB2 GND GB2 12 11 10 9 DCIN D4 MBRD340 D3 6.8V Si9926DY RSENSE 0.033Ω D5 MBRD340 R14 510Ω 1 R6 900k 1% R7 130k 1% R8 427k 1% R9 113k 1% 2 3 4 OUT A V– OUT B LTC1442 V+ IN + A REF IN – B HYST C10 1µF 8 L3*** 20µH 7 6 5 1 2,3 R10 50k 1% R11 1132k 1% 1,4 R12 3k 1% C9 0.1µF C11 0.47µF D6 MBR0540T 2 3 4 5 6 7 R13 5.1k 1% 8 9 *SUMIDA CDRH125-10 **COILCRAFT 1812LS-105XKBC ***COILTRONICS CTX20-4 10 11 12 C16 220pF GND GND SW GND BOOST VCC1 GND VCC2 GND VCC3 24 23 C12 10µF 22 21 C13 10µF 20 19 PROG LT ®1511 18 GND VC 17 OVP UVOUT 16 CLP GND 15 CLN COMP2 14 COMP1 BAT 13 SENSE SPIN UV R15 1k C15 0.33µF + C17 10µF R20 395k 0.1% R21 164k 0.1% R17 4.93k R19 200Ω 1% R18, 200Ω, 1% RSENSE 0.033Ω 8.4V Li-Ion BATTERY R16 300Ω C14 1µF 1473 TA03 13 LTC1473 U TYPICAL APPLICATION Protected Automatic Switchover Between Two Supplies 1 5V LT1121-5 8 Q1 Si9926DY 3 SUPPLY V1 10k 1µF 1M D1 MMBD2838LT1 1M 3 + 8 LT1490 1 2 – 1 5 4 1M 10k 3 7 6 1M 2 + 4 – 5 C6 4700pF 6 + C7 1µF L1*, 1mH + C5 1µF 7 8 LTC1473 IN1 GA1 IN2 SAB1 16 15 14 DIODE GB1 TIMER SENSE + V+ 12 SENSE – VGG GA2 SW SAB2 GND GB2 R3 0.033Ω 13 OUT 11 10 9 SUPPLY V2 *1812LS-105XKBC, COILCRAFT 14 Q2 Si9926DY 1473 TA04 LTC1473 U PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. GN Package 16-Lead Plastic SSOP (Narrow 0.150) (LTC DWG # 05-08-1641) 0.189 – 0.196* (4.801 – 4.978) 16 15 14 13 12 11 10 9 0.229 – 0.244 (5.817 – 6.198) 0.150 – 0.157** (3.810 – 3.988) 1 0.015 ± 0.004 × 45° (0.38 ± 0.10) 0.007 – 0.0098 (0.178 – 0.249) 0.009 (0.229) REF 2 3 4 5 6 7 0.053 – 0.068 (1.351 – 1.727) 8 0.004 – 0.0098 (0.102 – 0.249) 0° – 8° TYP 0.016 – 0.050 (0.406 – 1.270) 0.008 – 0.012 (0.203 – 0.305) 0.0250 (0.635) BSC * DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. GN16 (SSOP) 1098 15 LTC1473 U TYPICAL APPLICATIONS Protected Hot SwapTM Switchover Between Two Supplies DOCKING CONNECTOR OTHER 5V LOGIC SUPPLY 5V LONG PIN 100k Q1 Si4936DY SUPPLY V1 5V D1 MMBD2838LT1 1 2 3 4 100k 5 C6 4700pF 6 L1*, 1mH C7 1µF C5 1µF 7 8 LTC1473 IN1 GA1 IN2 SAB1 16 15 14 DIODE GB1 TIMER 13 SENSE + V+ SENSE – VGG GA2 SW SAB2 GND GB2 SUPPLY V2 12V R3 0.1Ω OUT 12 LONG PIN 11 10 9 Q2 Si4936DY *1812LS-105XKBC, COILCRAFT ON SHORT PIN 1473 • TA05 Hot Swap is a trademark of Linear Technology Corporation. RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1155 Dual High Side Micropower MOSFET Driver Internal Charge Pump Requires No External Components LTC1161 Quad Protected High Side MOSFET Driver Rugged, Designed for Harsh Environment LTC1473L Dual PowerPath Switch Driver Low Voltage Version of the LTC1473; Operates with 3.3V Input LTC1479 PowerPath Controller for Dual Battery Systems Designed to Interface with a Power Management µP LT1505 Synchronous Constant-Voltage/Constant-Current Battery Charger Up to 6A Charge Current; High Efficiency; Adaptive Current Limiting LT1510 Constant-Voltage/Constant-Current Battery Charger Up to 1.5A Charge Current for Lithium-Ion, NiCd and NiMH Batteries LT1511 3A Constant-Voltage/Constant-Current Battery Charger High Efficiency, Minimal External Components to Fast Charge Lithium, NiMH and NiCd Batteries LTC1628 2-Phase Dual Synchronous Step-Down Controller Minimum Input Capacitors; 4.5V ≤ VIN ≤ 36V LTC1735 High Efficiency Synchronous Switching Regulator Constant Frequency, VIN ≤ 36V, Fault Protection 16 Linear Technology Corporation 1473fa LT/TP 0400 REV A 2K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com LINEAR TECHNOLOGY CORPORATION 1997