LINER LTC3530 Wide input voltage synchronous buck-boost dc/dc converter Datasheet

LTC3530
Wide Input Voltage
Synchronous Buck-Boost
DC/DC Converter
DESCRIPTION
FEATURES
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Regulated Output with Input Voltages Above, Below
or Equal to the Output
1.8V to 5.5V Input and 1.8V to 5.25V Output Range
250mA Continuous Output Current from 1.8V VIN
600mA Continuous/1A Peak Output Current from
Li-Ion
Single Inductor
Synchronous Rectification: Up to 96% Efficiency
Programmable Automatic Burst Mode® Operation
Output Disconnect in Shutdown
Pin Compatible with the LTC3440
Programmable Frequency from 300kHz to 2MHz
<1μA Shutdown Current
Small Thermally Enhanced 10-Lead (3mm × 3mm)
DFN and 10-Lead MS Packages
APPLICATIONS
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The LTC®3530 is a wide VIN range, highly efficient, fixed
frequency, buck-boost DC/DC converter that operates
from input voltages above, below or equal to the output
voltage. The topology incorporated in the IC provides a
continuous transfer function through all operating modes,
making the product ideal for single lithium-ion, two-cell
alkaline or NiMH applications where the output voltage is
within the battery voltage range.
The LTC3530 is pin compatible with the LTC3440 buckboost DC/DC converter but adds programmable automatic
Burst Mode operation and extends the VIN/VOUT range to
1.8V. Switching frequencies up to 2MHz are programmed
with an external resistor. Automatic Burst Mode operation
allows the user to program the load current threshold for
Burst Mode operation using a single resistor from the
BURST pin to GND.
Other features include 1μA shutdown, short circuit protection, programmable soft-start control, current limit
and thermal shutdown. The LTC3530 is available in a
thermally enhanced 10-lead (3mm × 3mm) DFN or MSOP
package.
MP3 Players
Handheld Instruments
Digital Cameras
Smart Phones
Portable GPS Units
Miniature Hard Disk Drive Power
L, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Patents Pending.
TYPICAL APPLICATION
Efficiency
4.7μH
100
Burst Mode VIN = 3.6V
90
SW2
VOUT
3.3V AT
250mA
VOUT
1.8V TO 5.5V
33pF
VIN LTC3530
1M
15k
SHDN/SS
OFF ON
RT
10μF
FB
VC
22μF
10k
VIN = 3.6V
70
60
50
40
30
576k
20
560pF
33.2k
80
EFFICIENCY (%)
SW1
VIN = 4.2V
VIN = 2.0V
10
BURST
GND
0.01μF
0
0.1
100k
3530 TA01a
1
10
100
LOAD CURRENT (mA)
1000
3350 TA01b
3530fb
1
LTC3530
ABSOLUTE MAXIMUM RATINGS
(Note 1)
VIN, VOUT Voltage ......................................... –0.3V to 6V
SW1, SW2 Voltage
DC............................................................ –0.3V to 6V
Pulsed < 100ns ........................................ –0.3V to 7V
VC, RT, FB, SHDN/SS, BURST Voltage .......... –0.3V to 6V
Operating Temperature (Note 2)............... –40°C to 85°C
Maximum Junction Temperature (Note 4)............. 125°C
Storage Temperature Range................... –65°C to 150°C
PIN CONFIGURATION
TOP VIEW
RT
1
10 VC
BURST
2
9 FB
SW1
3
SW2
4
7 VIN
GND
5
6 VOUT
11
TOP VIEW
RT
BURST
SW1
SW2
GND
8 SHDN/SS
10
9
8
7
6
1
2
3
4
5
VC
FB
SHDN/SS
VIN
VOUT
MS PACKAGE
10-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 120°C/W, θJC = 45°C/W
DD PACKAGE
10-LEAD (3mm s 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 43°C/W, θJC = 4.3°C/W
EXPOSED PAD IS GND (PIN 11) MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3530EDD#PBF
LTC3530EDD#TRPBF
LCBH
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 85°C
LTC3530EMS#PBF
LTC3530EMS#TRPBF
LTCBJ
10-Lead Plastic MSOP
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = VOUT = 3.6V, RT = 33.2k, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Operating Range
l
1.8
5.5
V
Output Voltage Adjust Range
l
1.8
5.25
V
Feedback Voltage
l
1.191
1.215
1.239
V
Feedback Input Current
VFB = 1.215V
1
50
nA
Quiescent Current, Burst Mode Operation
VFB = 1.215V, BURST = 0V (Note 3)
40
60
μA
Quiescent Current, Shutdown
SHDN = 0V, Not Including Switch Leakage
0.1
1
μA
Quiescent Current, Active
VC = 0V, BURST = 3V (Note 3)
700
1200
μA
Input Current Limit
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1
2
A
3530fb
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LTC3530
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = VOUT = 3.6V, RT = 33.2k, unless otherwise noted.
PARAMETER
CONDITIONS
NMOS Switch Leakage
MIN
TYP
MAX
Switches B and C
0.1
5
μA
PMOS Switch Leakage
Switches A and D
0.1
10
μA
NMOS Switch On Resistance
Switches B and C
0.21
Ω
PMOS Switch On Resistance
Switches A and D
0.24
Ω
Maximum Duty Cycle
Boost (% Switch C On)
Buck (% Switch A On)
80
100
90
%
%
0.7
1
l
l
Minimum Duty Cycle
l
Frequency
l
UNITS
0
%
1.3
MHz
Error Amp AVOL
90
dB
Error Amp Source Current
300
μA
Error Amp Sink Current
300
μA
Burst Threshold
1
Burst Input Current
VBURST = 5.5V
SHDN/SS Threshold
When IC is Enabled
When EA is at Maximum Boost Duty Cycle
SHDN/SS Input Current
VSHDN = 5.5V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3530E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlations
with statistical process controls.
l
Burst Mode Quiescent Current
3.0
1.5 MHz
2.5
1.0 MHz
2.0
1.5
0.5 MHz
1.0
NO SWITCHING
0.5
0.0
2.5
4.0
VIN (V)
4.5
5.0
5.5
3530 G01
1
μA
3.0
35
30
25
20
15
2.5
2.0
1.5
1.0
10
0.5
0
3.5
0.01
40
5
3.0
V
V
Peak Current Clamp vs VIN
INPUT CURRENT (A)
VIN QUIESCENT CURRENT (μA)
VIN QUIESCENT CURRENT (mA)
2.0 MHz
1.4
3.5
45
3.5
0.85
1.6
TA = 25°C, unless otherwise specified.
50
4.0
μA
Note 3: Current measurements are performed when the outputs are not
switching.
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may result in device degradation or failure.
TYPICAL PERFORMANCE CHARACTERISTICS
Quiescent Current vs VIN
(Fixed Frequency Mode)
0.4
V
2
2.5
3.0
3.5
4.0
VIN (V)
4.5
5.0
5.5
3530 G02
0.0
2.5
3.0
3.5
4.0
VIN (V)
4.5
5.0
5.5
3530 G03
3530fb
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LTC3530
TYPICAL PERFORMANCE CHARACTERISTICS
Automatic Burst Mode Threshold
vs RBURST
1.84
80
1.82
LEAVE Burst Mode
OPERATION
60
50
40
30
ENTER Burst Mode
OPERATION
20
Average Input Current Limit
vs Temperature
5%
4%
1.78
1.76
1.74
125 175 225 275 325 375 425 475 500
RBURST (kΩ)
1%
0%
–1%
–2%
–4%
1.70
–45 –25 –5
0
2%
–3%
1.72
10
VIN = VOUT = 3.3V
3%
1.80
CHANGE FROM 25°C
MINIMUM START VOLTAGE (V)
LOAD CURRENT (mA)
Minimum Start Voltage
vs Temperature
90
70
TA = 25°C, unless otherwise specified.
15
35
55
75
TEMPERATURE (°C)
95 115
–5%
–55 –35 –15
5 25 45 65 85 105 125
TEMPERATURE (°C)
3530 G05
3530 G04
Frequency Change vs Temperature
3530 G06
Switch Pins Before Entering
Boost Mode
Feedback Voltage vs Temperature
1.25
1.225
1.23
1.220
FEEDBACK VOLTAGE (V)
FREQUENCY (MHz)
1.21
1.19
1.17
1.15
1.13
1.11
1.09
SW1
2V/DIV
1.215
1.210
SW2
2V/DIV
1.205
1.07
1.05
–45 –25 –5
15 35 55 75
TEMPERATURE (°C)
95 115
1.200
–45 –25 –5
15 35 55 75
TEMPERATURE (°C)
3530 G07
95 115
3530 G08
Switch Pins Entering
Buck-Boost Mode
Switch Pins in Buck-Boost Mode
VIN = 2.7V
SW2
2V/DIV
SW2
2V/DIV
3530 G09
LTC3530 Output Ripple
500mA Load
SW1
2V/DIV
SW1
2V/DIV
50ns/DIV
VIN = 2.9V
VOUT = 3.3V AT 500mA
VIN = 3.3V
VIN = 4.2V
50ns/DIV
VIN = 3.3V
VOUT = 3.3V AT 500mA
3530 G10
50ns/DIV
VIN = 4.2V
VOUT = 3.3V AT 500mA
3530 G11
1μs/DIV
VOUT = 3.3V
20mV/DIV
AC COUPLED
COUT = 22μF, X5R CERAMIC
3530 G12
3530fb
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LTC3530
TYPICAL PERFORMANCE CHARACTERISTICS
Load Transient Response in
Auto Burst Mode Operation,
No Load to 500mA
Load Transient Response in Fixed
Frequency Mode, No Load to 300mA
VOUT
100mV/DIV
VOUT
100mV/DIV
LOAD
0.25A/DIV
LOAD
0.25A/DIV
100μs/DIV
VIN = 3.6V
VOUT = 3.3V
COUT = 22μF, X5R CERAMIC
TA = 25°C, unless otherwise specified.
3530 G13
Typical Burst Mode Waveforms
VOUT
50mV/DIV
INDUCTOR
CURRENT
0.25A/DIV
3530 G14
100μs/DIV
VIN = 3.6V
VOUT = 3.3V
COUT = 47μF, X5R CERAMIC + 100μF
LOW ESR TANTALUM
Transition from Burst Mode
Operation to Fixed Frequency Mode
22μs/DIV
COUT = 22μF, X5R CERAMIC
3530 G15
Maximum Output Current vs VIN
2000
VOUT
200mV/DIV
1800
1600
CURRENT (mA)
BURST
2V/DIV
INDUCTOR
CURRENT
0.5A/DIV
200μs/DIV
COUT = 22μF, X5R CERAMIC
3530 G16
1400
1200
IOUT
1000
800
600
400
250mA AT 1.8V
200
1.5
2.5
3.5
VIN (V)
4.5
5.5
3530 G17
PIN FUNCTIONS
RT (Pin 1): Programs the Frequency of the Internal Oscillator. Connect a resister from RT to ground.
f(kHz) = 33,170/RT (kΩ)
BURST (Pin 2): Used to Set the Automatic Burst Mode
Threshold. Connect a resistor and capacitor in parallel
from this pin to ground. See the Applications Information
section for component value selection. For manual control,
ground the pin to force Burst Mode operation, connect to
VIN to force fixed frequency PWM mode.
SW1 (Pin 3): Switch Pin Where the Internal Switches A and
B are Connected. Connect inductor from SW1 to SW2. An
optional Schottky diode can be connnected from SW1 to
ground for a moderate efficiency improvement. Minimize
trace length to keep EMI down.
SW2 (Pin 4): Switch Pin Where the Internal Switches C
and D are Connected. For applications with output voltages
over 4.3V, a Schottky diode is required from SW2 to VOUT
to ensure the SW pin does not exhibit excessive voltage.
3530fb
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LTC3530
PIN FUNCTIONS
FB (Pin 9): Feedback Pin. Connect resistor divider tap here.
The output voltage can be adjusted from 1.8V to 5.25V.
The feedback reference is typically 1.215V.
GND (Pin 5): Ground for the IC.
VOUT (Pin 6): Output of the Synchronous Rectifier. A filter
capacitor is placed from VOUT to GND. A ceramic bypass
capacitor is recommended as close to the VOUT and GND
pins as possible.
R1
VOUT = 1.215V • 1+ R2 VIN (Pin 7): Input Supply Voltage. Internal VCC for the IC.
A 10μF ceramic capacitor is recommended as close to the
VIN and GND pins as possible.
VC (Pin10): Error Amp Output. An R-C network is connected from this pin to FB for loop compensation. Refer
to “Closing the Feedback Loop” section for component
selection guidelines. During Burst Mode operation, VC is
internally clamped.
SHDN/SS (Pin 8): Combined Soft-Start and Shutdown.
Applied voltage <0.4V shuts down the IC. Tie to >1.4V to
enable the IC and >1.6V to ensure the error amp is not
clamped from soft-start. An R-C from the shutdown command signal to this pin will provide a soft-start function
by limiting the rise time of VC.
BLOCK DIAGRAM
Exposed Pad (Pin 11, DD Package Only): Ground. This
pin must be soldered to the PCB and electrically connected
to ground.
L1
SW2
SW1
3
4
ANTI-RING
VIN
VOUT
SW D
SW A
6
SW B
GATE
DRIVERS
AND
ANTICROSS
CONDUCTION
COUT
SW C
–
CIN
+
7
REVERSE
AMP
RSS
R1
+
Gm = 1/60k
SHUTDOWN
SOFT-START
+
SHUTDOWN
–
SHDN/SS
8
–
2A
CSS
ERROR
AMP
1.215V
FB
–
9
+
PWM
LOGIC
CP1
VC
PWM
COMPARATORS
R2
10
–
+
AUTOMATIC
BURST MODE
CONTROL
SLEEP
RT
1
OSC
BURST
RT
2
VREF
1.215V
VREF
RBURST
CBURST
THERMAL
SHUTDOWN
GND
5
3530 BD
3530fb
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LTC3530
OPERATION
The LTC3530 provides high efficiency, low noise power
for a wide variety of handheld electronic devices. The
LTC proprietary topology allows input voltages above,
below or equal to the output voltage by properly phasing
the output switches. The error amp output voltage on VC
determines the output duty cycle of the switches. Since
VC is a filtered signal, it provides rejection of frequencies
from well below the switching frequency. The low RDS(ON),
low gate charge synchronous switches provide high frequency pulse width modulation control at high efficiency.
High efficiency is achieved at light loads when Burst Mode
operation is entered and the LTC3530’s quiescent current
drops to a low 40μA.
LOW NOISE FIXED FREQUENCY OPERATION
Oscillator
The frequency of operation is programmed by an external
resistor from RT to ground, according to the following
equation:
f (kHz)
33,170
=
R T(k)
Error Amp
The error amplifier is a voltage mode amplifier. The loop
compensation components are configured around the
amplifier (from FB to VC) to obtain stability of the converter.
For improved bandwidth, an additional R-C feed-forward
network can be placed across the upper feedback divider
resistor. The voltage on SHDN/SS clamps the error amp
output, VC, to provide a soft-start function.
Internal Current Limit
There are two different current limit circuits in the LTC3530.
Each has internally fixed thresholds which vary inversely
with VIN.
The first circuit is a high speed peak current limit comparator that will shut off switch A once the current exceeds
2.5A typical. The delay to output of this comparator is
typically 50ns.
A second amplifier will source current out of FB to drop
the output voltage once the peak input current exceeds
2A typical. This method provides a closed loop means of
clamping the input current. During conditions where VOUT
is near ground, such as during a short-circuit or during
startup, this threshold is cut to 670mA (typ), providing a
foldback feature. For this current limit feature to be most
effective, the Thevenin resistance from FB to ground should
be greater than 100kΩ.
Reverse Current Limit
During fixed frequency operation, the LTC3530 operates
in forced continuous conduction mode. The reverse current limit amplifier monitors the inductor current from
the output through switch D. Once the negative inductor
current exceeds 640mA typical, the LTC3530 will shut off
switch D.
Four-Switch Control
Figure 1 shows a simplified diagram of how the four internal switches are connected to the inductor, VIN, VOUT
and GND. Figure 2 shows the regions of operation for the
LTC3530 as a function of the internal control voltage, VCI.
85%
DMAX
BOOST
V4 (≈1.5V)
A ON, B OFF
BOOST REGION
PWM CD SWITCHES
VIN
VOUT
7
6
PMOS A
PMOS D
SW1
SW2
3
4
NMOS B
DMIN
BOOST
DMAX
BUCK
V3 (≈1.15V)
FOUR SWITCH PWM
BUCK/BOOST REGION
V2 (≈1V)
D ON, C OFF
PWM AB SWITCHES BUCK REGION
V1 (≈0.7V)
0%
NMOS C
3530 F01
Figure 1. Simplified Diagram of Output Switches
DUTY
CYCLE
3530 F02
INTERNAL
CONTROL
VOLTAGE, VCI
Figure 2. Switch Control vs Internal Control Voltage, VCI
3530fb
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LTC3530
OPERATION
Depending on the control voltage, the IC will operate in
either buck, buck/boost or boost mode. The VCI voltage
is a level shifted voltage from the output of the error amp
(VC). The four power switches are properly phased so the
transfer between operating modes is continuous, smooth
and transparent to the user. When VIN approaches VOUT
the buck/boost region is reached where the conduction
time of the four switch region is typically 150ns. Referring
to Figures 1 and 2, the various regions of operation will
now be described.
Buck Region (VIN > VOUT)
Switch D is always on and switch C is always off during
this mode. When the internal control voltage, VCI, is above
voltage V1, output A begins to switch. During the off-time of
switch A, synchronous switch B turns on for the remainder
of the time. Switches A and B will alternate similar to a
typical synchronous buck regulator. As the control voltage increases, the duty cycle of switch A increases until
the maximum duty cycle of the converter in buck mode
reaches DMAX_BUCK, given by:
DMAX_BUCK = 100 – D4SW %
where D4SW = duty cycle % of the four switch range.
D4SW = (150ns • f) • 100 %
where f = operating frequency, Hz.
Beyond this point the “four switch,” or buck/boost region
is reached.
Buck/Boost or Four Switch (VIN ≈ VOUT)
When the internal control voltage, VCI, is above voltage
V2, switch pair AD remain on for duty cycle DMAX_BUCK,
and the switch pair AC begins to phase in. As switch pair
AC phases in, switch pair BD phases out accordingly.
When the VCI voltage reaches the edge of the buck/boost
range, at voltage V3, the AC switch pair completely phase
out the BD pair, and the boost phase begins at duty cycle
D4SW. The input voltage, VIN, where the four switch region
begins is given by:
VOUT
VIN =
1– (150ns • f)
The point at which the four switch region ends is given
by:
VIN = VOUT(1 – D) = VOUT(1 – 150ns • f) V
Boost Region (VIN < VOUT)
Switch A is always on and switch B is always off during
this mode. When the internal control voltage, VCI, is above
voltage V3, switch pair CD will alternately switch to provide
a boosted output voltage. This operation is typical of a
synchronous boost regulator. The maximum duty cycle
of the converter is limited to 90% typical and is reached
when VCI is above V4.
BURST MODE OPERATION
Burst mode reduces the LTC3530’s quiescent current
consumption at light loads and improves overall conversion efficiency, increasing battery life. During Burst Mode
operation the LTC3530 delivers energy to the output until
it is regulated and then goes into sleep mode where the
outputs are off and quiescent current drops to 40μA (typ).
In this mode the output ripple has a variable frequency
component that depends upon load current, and will
typically be about 2% peak-to-peak. Burst Mode operation ripple can be reduced slightly by using more output
capacitance (47μF or greater). Another method of reducing
Burst Mode operation ripple is to place a small feed-forward
capacitor across the upper resistor in the VOUT feedback
divider network (as in Type III compensation).
During the period where the device is delivering energy to
the output, the peak switch current will be equal to 450mA
typical and the inductor current will terminate at zero
current for each cycle. In this mode the typical maximum
average output current is given by:
450mA
;VOUT < VIN
2
450mA VIN ;VOUT > VIN
IMAX(BURST)BOOST •
2
V IMAX(BURST)BUCK OUT
I MAX(BURST) Buck-Boost ≈ 350mA; V OUT ≈ V IN.
Since the input and output are connected together for
most of the cycle.
3530fb
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LTC3530
OPERATION
The efficiency below 1mA becomes dominated primarily
by the quiescent current. The Burst Mode operation efficiency is given by:
EFFICIENCY •ILOAD
40μA +ILOAD
where η is typically 90% during Burst Mode operation.
Automatic Burst Mode Operation Control
Burst Mode operation can be automatic or manually controlled with a single pin. In automatic mode, the IC will
enter Burst Mode operation at light load and return to fixed
frequency operation at heavier loads. The load current at
which the mode transition occurs is programmed using a
single external resistor from BURST to ground, according
to the following equations:
Enter Burst Mode: IBURST =
8.8
RBURST
Leave Burst Mode: IBURST = 11.2
RBURST
where RBURST is in kΩ and IBURST is the load transition
current in Amps. Do not use values of RBURST greater
than 500kΩ.
For automatic operation, a filter capacitor must also be
connected from BURST to ground. The equation for the
minimum capacitor value is:
CBURST(MIN) COUT • VOUT
60,000
where CBURST(MIN) and COUT are in μF
In the event that a load transient causes FB to drop by more
than 4% from the regulation value while in Burst Mode
operation, the IC will immediately switch to fixed frequency
mode and an internal pull-up will be momentarily applied
to BURST, rapidly charging CBURST. This prevents the IC
from immediately re-entering Burst Mode operation once
the output achieves regulation.
Manual Burst Mode Operation
For manual control of Burst Mode operation, the RC
network connected to BURST can be eliminated. To force
fixed frequency mode, BURST should be connected to
VIN. To force Burst Mode operation, BURST should be
grounded. When commanding Burst Mode operation
manually, the circuit connected to BURST should be able
to sink up to 2mA.
For optimum transient response with large dynamic loads,
the operating mode should be controlled manually by the
host. By commanding fixed frequency operation prior to
a sudden increase in load, output voltage droop can be
minimized. Note that if the load current applied during
forced Burst Mode operation (BURST pin is grounded)
exceeds the current that can be supplied, the output voltage
will start to droop and the IC will automatically come out
of Burst Mode operation and enter fixed frequency mode,
raising VOUT. Once regulation is achieved, the IC will then
enter Burst Mode operation once again, and the cycle will
repeat, resulting in about 4% output ripple.
Burst Mode Operation to Fixed Frequency Transient
Response
In Burst Mode operation, the compensation network is
not used and VC is disconnected from the error amplifier.
During long periods of Burst Mode operation, leakage
currents in the external components or on the PC board
could cause the compensation capacitor to charge (or
discharge), which could result in a large output transient
when returning to fixed frequency mode of operation, even
at the same load current. To prevent this, the LTC3530
incorporates an active clamp circuit that holds the voltage
on VC at an optimal voltage during Burst Mode operation.
This minimizes any output transient when returning to
fixed frequency mode operation. For optimum transient
response, Type 3 compensation is also recommended to
broad band the control loop and roll off past the two pole
response of the output LC filter. See Closing the Feedback
Loop under Applications Information.
3530fb
9
LTC3530
OPERATION
where f = operating frequency, Hz
VIN
SHDN/SS
ΔIL = maximum allowable inductor ripple current, A
VCI
VIN(MIN) = minimum input voltage, V
VC
VIN(MAX) = maximum input voltage, V
VOUT = output voltage, V
3530 F05
IOUT(MAX) = maximum output load current
Figure 3.
Soft-Start
The soft-start function is combined with shutdown.
When the SHDN/SS pin is brought above 1V typical, the
IC is enabled but the EA duty cycle is clamped from VC.
A detailed diagram of this function is shown in Figure 3.
The components RSS and CSS provide a slow ramping
voltage on SHDN/SS to provide a soft-start function. To
ensure that VC is not being clamped, SHDN/SS must be
raised above 1.6V.
For high efficiency, choose a ferrite inductor with a high
frequency core material to reduce core loses. The inductor should have low ESR (equivalent series resistance) to
reduce the I2R losses, and must be able to handle the peak
inductor current without saturating. Molded chokes or chip
inductors usually do not have enough core to support the
peak inductor currents in the 1A to 2A region. To minimize
radiated noise, use a shielded inductor. See Table 1 for a
suggested list of inductor suppliers.
Output Capacitor Selection
The bulk value of the output filter capacitor is set to reduce
the ripple due to charge into the capacitor each cycle. The
steady state ripple due to charge is given by:
COMPONENT SELECTION
Inductor Selection
The high frequency operation of the LTC3530 allows the
use of small surface mount inductors. The inductor ripple
current is typically set to 20% to 40% of the maximum
inductor current. For a given ripple the inductance terms
are given as follows:
LBOOST >
LBUCK >
VIN(MIN) • (VOUT – VIN(MIN) )
f • IL • VOUT
VOUT • (VIN(MAX) – VOUT )
f • IL • VIN(MAX)
% Ripple_Boost =
IOUT(MAX) • (VOUT – VIN(MIN) ) • 100
COUT • VOUT 2 • f
%
% Ripple_Buck =
H
H
1
(VIN(MAX) – VOUT ) • 100
8LCf 2
VIN(MAX)
%
where COUT = output filter capacitor in Farads and
f = switching frequency in Hz.
Table 1. Inductor Vendor Information
SUPPLIER
PHONE
FAX
WEB SITE
Coilcraft
(847) 639-6400
(847) 639-1469
www.coilcraft.com
CoEv Magnetics
(800) 227-7040
(650) 361-2508
www.circuitprotection.com/magnetics.asp
Murata
(814) 237-1431
(800) 831-9172
(814) 238-0409
www.murata.com
Sumida
USA: (847) 956-0666
Japan: 81(3) 3607-5111
USA: (847) 956-0702
Japan: 81(3) 3607-5144
www.sumida.com
TDK
(847) 803-6100
(847) 803-6296
www.component.tdk.com
TOKO
(847) 297-0070
(847) 699-7864
www.tokoam.com
3530fb
10
LTC3530
APPLICATIONS INFORMATION
The output capacitance is usually many times larger than
the minimum value in order to handle the transient response
requirements of the converter. For a rule of thumb, the ratio
of the operating frequency to the unity-gain bandwidth of
the converter is the amount the output capacitance will
have to increase from the above calculations in order to
maintain the desired transient response.
The other component of ripple is due to the ESR (equivalent series resistance) of the output capacitor. Low ESR
capacitors should be used to minimize output voltage
ripple. For surface mount applications, Taiyo Yuden or
TDK ceramic capacitors, AVX TPS series tantalum capacitors or Sanyo POSCAP are recommended. See Table 2 for
contact information.
Input Capacitor Selection
Since VIN is the supply voltage for the IC, as well as the
input to the power stage of the converter, it is recommended
to place at least a 10μF, low ESR ceramic bypass capacitor close to the VIN and GND pins. It is also important to
minimize any stray resistance from the converter to the
battery or other power source.
Optional Schottky Diodes
Schottky diodes across the synchronous switches B and
D are not required (VOUT < 4.3V), but provide a lower drop
during the break-before-make time (typically 15ns) improving efficiency. Use a surface mount Schottky diode such as
an MBRM120T3 or equivalent. Do not use ordinary rectifier
diodes, since the slow recovery times will compromise
efficiency. For applications with an output voltage above
4.3V, a Schottky diode is required from SW2 to VOUT.
Output Voltage < 1.8V
The LTC3530 can operate as a buck converter with output
voltages as low as 0.4V. Synchronous switch D is powered
from VOUT and the RDS(ON) will increase at low output voltages, therefore a Schottky diode is required from SW2 to
VOUT to provide the conduction path to the output. Note
that Burst Mode operation is inhibited at output voltages
below 1V typical. Note also that if VOUT is less than 1V,
the current limit will be 670mA (typ).
Output Voltage > 4.3V
A Schottky diode from SW2 to VOUT is required for output
voltages over 4.3V. The diode must be located as close to
the pins as possible in order to reduce the peak voltage on
SW2 due to the parasitic lead and trace inductance.
Input Voltage > 4.5V
For applications with input voltages above 4.5V which
could exhibit an overload or short-circuit condition, a
2Ω/1nF series snubber is required between SW1 and
GND. A Schottky diode from SW1 to VIN should also be
added as close to the pins as possible. For the higher input
voltages, VIN bypassing becomes more critical; therefore,
a ceramic bypass capacitor as close to the VIN and GND
pins as possible is also required.
Operating Frequency Selection
Higher operating frequencies allow the use of a smaller
inductor and smaller input and output filter capacitors,
thus reducing board area and component height. However, higher operating frequencies also increase the IC’s
total quiescent current due to the gate charge of the four
switches, as given by:
Buck:
Iq = (0.6 • VIN • f) mA
Boost:
Iq = [0.8 • (VIN + VOUT) • f] mA
Buck/Boost: Iq = [f • (1.4 • VIN + 0.4 • VOUT)] mA
Table 2. Capacitor Vendor Information
SUPPLIER
PHONE
FAX
WEB SITE
AVX
(803) 448-9411
(803) 448-1943
www.avxcorp.com
Murata
(814) 237-1431, (800) 831-9172
(814) 238-0409
www.murata.com
Sanyo
(619) 661-6322
(619) 661-1055
www.sanyovideo.com
Taiyo Yuden
(408) 573-4150
(408) 573-4159
www.t-yuden.com
TDK
(847) 803-6100
(847) 803-6296
www.component.tdk.com
3530fb
11
LTC3530
APPLICATIONS INFORMATION
where f = switching frequency in MHz. Therefore frequency
selection is a compromise between the optimal efficiency
and the smallest solution size.
Closing the Feedback Loop
The LTC3530 incorporates voltage mode PWM control.
The control to output gain varies with operation region
(buck, boost, buck/boost), but is usually no greater than
15. The output filter exhibits a double pole response, as
given by:
(in buck mode)
VIN
2 • VOUT • • L • COUT
Hz
(in boost mode)
The output filter zero is given by:
1
2 • • RESR • COUT
1
Hz (referring to Figure 4).
2 • • R1• CP1
Most applications demand an improved transient response
to allow a smaller output filter capacitor. To achieve a higher
bandwidth, Type III compensation is required, providing
two zeros to compensate for the double-pole response of
the output filter. Referring to Figure 5, the location of the
poles and zeros are given by:
1
Hz
2 • • 32,000 • R1• CP1
(which is extremely close to DC)
1
Hz
fZERO1 =
2 • • R Z • CP1
1
fZERO2 =
Hz
2 • • R1• CZ1
1
fPOLE2 =
Hz
2 • • R Z • CP2
fPOLE1 where L is in henries and COUT is in farads.
f FILTER — ZERO =
A simple Type I compensation network can be incorporated
to stabilize the loop, but at a cost of reduced bandwidth
and slower transient response. To ensure proper phase
margin using Type I compensation, the loop must be
crossed over a decade before the LC double pole. The
unity-gain frequency of the error amplifier with the Type
I compensation is given by:
fUG =
1
f FILTER —POLE =
Hz
2 • • L • COUT
f FILTER —POLE =
The loop gain is typically rolled off before the RHP zero
frequency.
Hz
where RESR is the equivalent series resistance of the
output capacitor.
A troublesome feature in boost mode is the right-half plane
zero (RHP), given by:
VIN2
f RHPZ =
Hz
2 • •IOUT • L • VOUT
where resistance is in ohms and capacitance is in
farads.
VOUT
+
VOUT
+
ERROR
AMP
–
1.215V
R1
FB
11
–
1.215V
R1
CZ1
FB
12
VC
12
VC
ERROR
AMP
CP1
RZ
R2
11
CP1
R2
CP2
3530 F04
3530 F03
Figure 4. Error Amplifier with Type I Compensation
Figure 5. Error Amplifier with Type III Compensation
3530fb
12
LTC3530
TYPICAL APPLICATIONS
1MHz Li-Ion to 3.3V at 500mA Converter with Manual Mode Control
L1
3.3μH
2.7V TO 4.2V
SW1
VIN
LTC3530
RSS
1M
CIN
10μF
RT
CSS
RT
0.01μF 33.2k
VOUT
3.3V
500mA
VOUT
R1
1M
FB
SHDN/SS
Li-Ion
SW2
VC
BURST
RZ
10k
GND
BURST FIXED FREQ
CP1
560pF
RFF
15k
CZ1
33pF
COUT
22μF
R2
576k
CIN: TAIYO YUDEN JMK212BJ106MG
COUT: TAIYO YUDEN JMK325BJ226MM
L1: TDK RLF7030T-3R3M4R
3530 TA02
1MHz Li-Ion to 3.3V/600mA Converter with USB Power Input Option,
Li Battery Charger and Power Path Management.
L1
4.7μH
5V (NOM)
FROM USB
CABLE VBUS
SW1
1Ω
IN1
OUT
IN2
BAT
VNTC
10μF
VIN
+
10μF
Li-Ion
CELL
RSS
1M
CHRG
LTC4055
ACPR
SHDN
SUSPEND USB POWER
SUSP
500mA/100mA SELECT
HPWR
TIMER PROG
0.1μF
CLPROG
97.6k
GND
SW2
VOUT
R1
1M
FB
SHDN/SS
NTC
WALL
LTC3530
RT
CSS
0.01μF
VC
RZ
10k
BURST
GND
RT
33.2k
RBURST
200k
CP1
560pF
RFF
15k
CZ1
33pF
R2
576k
VOUT
3.3V
500mA
COUT
22μF
CBURST
0.01μF
CIN: TAIYO YUDEN JMK212BJ106MG
COUT: TAIYO YUDEN JMK325BJ226MM
L1: TDK RLF7030T-4R7M3R4
3530 TA03
97.6k
3530fb
13
LTC3530
TYPICAL APPLICATIONS
High Efficiency Li-Ion Powered Constant Current Lumiled Driver
L1
3.3μH
SW1
SW2
VIN
VOUT
SD/SS
OFF ON
CIN
10μF
FB
VC
CP1
1nF
LHXL-PW01
R2
100k
GND
RT
44.2k
R3
95.3k
12,810 (R1+R2+R3+R4)
ILED =
R1 • R3
COUT
4.7μF
R4
100k
BURST
RT
R2 = R1/1.5
ILED = 500mA
D1
LTC3530
CBURST
470pF
R1
301k
3530 TA04a
VIN
2.2V TO
4.2V
CIN = TAIYO YUDEN JMK212BJ106MG
COUT = TAIYO YUDEN JMK325BJ475MM
D1 = BAT54
Lumiled Driver Efficiency vs LED Current
100
98
VIN = 3.6V
1MHz
EFFICIENCY (%)
96
94
92
90
88
86
84
82
80
0.5
0.1
LED CURRENT (A)
3530 TA04b
3530fb
14
LTC3530
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1695)
R = 0.115
TYP
6
0.38 ± 0.10
10
0.675 ±0.05
3.50 ±0.05
2.15 ±0.05
1.65 ±0.05
(2 SIDES)
1.65 ± 0.10
(2 SIDES)
3.00 ±0.10
(4 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
(DD10) DFN 1103
5
0.25 ± 0.05
0.50
BSC
2.38 ± 0.05
(2 SIDES)
0.25 ± 0.05
0.50 BSC
0.75 ±0.05
0.200 REF
PACKAGE
OUTLINE
1
2.38 ± 0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
5. EXPOSED PAD SHALL BE SOLDER PLATED
2. DRAWING NOT TO SCALE
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
3. ALL DIMENSIONS ARE IN MILLIMETERS
TOP AND BOTTOM OF PACKAGE
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.254
(.010)
10 9 8 7 6
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
0.50
0.305 ± 0.038
(.0197)
(.0120 ± .0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.497 ± 0.076
(.0196 ± .003)
REF
1 2 3 4 5
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
0.18
(.007)
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
SEATING
PLANE
0.86
(.034)
REF
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MS) 0307 REV E
3530fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC3530
TYPICAL APPLICATION
USB to 5V Converter with Output Disconnect
L1
10μH
1nF
2Ω
D2**
USB
4.35V TO
5.25V
R4 1M
4
SW1
SW2
LTC3530
6
7
VIN
VOUT
2
C3 *
0.1μF
1
SHDN/SS
FB
BURST
VC
RT
GND
*0 = Burst Mode OPERATION
1 = FIXED FREQUENCY
** LOCATE COMPONENTS AS
CLOSE TO IC AS POSSIBLE
33pF
R1
1M
15k
9
10
5
RT
= 1MHz
f
33.2k OSC
SD
VOUT
5VIN – 435mA MAX
4.35VIN – 350mA MAX
3
8
C1
10μF
D1**
C2**
22μF
10k
C4
560pF
R2
324k
3530 TA05
C1: TAIYO YUDEN JMK212BJ106MG
C2: TAIYO YUDEN JMK325BJ226MM
D1, D2: ON SEMICONDUCTOR MBRM120T3
L1: SUMIDA CDRH4D28-100
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC3400/LTC3400B 600mA (ISW), 1.2MHz Synchronous Step-Up DC/DC Converter
LTC3401/LTC3402
1A/2A (ISW), 3MHz Synchronous Step-Up DC/DC Converter
LTC3406/LTC3406B 600mA (IOUT), 1.5MHz Synchronous Step-Up DC/DC Converter
VIN: 0.85V to 5V, VOUT(MAX) = 5V,
IQ = 19μA/300μA, ISD < 1μA, ThinSOT Package
VIN: 0.5V to 5V, VOUT(MAX) = 5V, IQ = 38mA,
ISD < 1μA, MS Package
VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 20μA,
ISD ≤ 1μA, ThinSOT Package
LTC3407
600mA (IOUT), 1.5MHz Dual Synchronous Step-Up DC/DC Converter
VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40μA,
ISD ≤ 1μA, MS Package
LTC3411
1.25A (IOUT), 4MHz Synchronous Step-Up DC/DC Converter
VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60μA,
ISD ≤ 1μA, MS Package
LTC3412
2.5A (IOUT), 4MHz Synchronous Step-Up DC/DC Converter
VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60μA,
ISD ≤ 1μA, TSSOP16E Package
LTC3421
3A (ISW), 3MHz Synchronous Step-Up DC/DC Converter
VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12μA,
ISD < 1μA, QFN Package
LTC3425
5A (ISW), 8MHz Multiphase Synchronous Step-Up DC/DC Converter
VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12μA,
ISD < 1μA, QFN Package
LTC3429
600mA (ISW), 500kHz Synchronous Step-Up DC/DC Converter
VIN: 0.5V to 4.4V, VOUT(MAX) = 5V, IQ = 20μA,
ISD < 1μA, QFN Package
LTC3440
600mA (IOUT), 2MHz Synchronous Buck-Boost DC/DC Converter
VIN: 2.5V to 5.5V, VOUT(MAX) = 5.5V, IQ = 25μA,
ISD < 1μA, MS, DFN Package
LTC3441
600mA (IOUT), 2MHz Synchronous Buck-Boost DC/DC Converter
VIN: 2.5V to 5.5V, VOUT(MAX) = 5.5V, IQ = 25μA,
ISD < 1μA, DFN Package
LTC3442/LTC3443
1.2A (IOUT), Synchronous Buck-Boost DC/DC Converters,
LTC3442 (1MHz), LTC3443 (600kHz)
VIN: 2.4V to 5.5V, VOUT(MAX) = 5.25V, IQ = 28μA,
ISD < 1μA, MS Package
LTC3444
500mA (IOUT), 1.5MHz Synchronous Buck-Boost DC/DC Converter with VIN: 2.7V to 5.5V, VOUT = 0.5V to 5.25V, 3mm x 3mm
Wide VOUT Range
DFN Package, Ideal for WCDMA PA Bias
LTC3532
500mA (IOUT), 2MHz Synchronous Buck-Boost DC/DC Converter
VIN: 2.4V to 5.5V, VOUT(MAX) = 5.25V, IQ = ISD < 1μA,
DFN Package
ThinSOT is a trademark of Linear Technology Corporation.
3530fb
16
Linear Technology Corporation
LT 0807 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2006
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