LINER LTC4008 4a, high efficiency, multi-chemistry battery charger Datasheet

LTC4008
4A, High Efficiency,
Multi-Chemistry Battery Charger
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FEATURES
DESCRIPTIO
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The LTC®4008 is a constant-current/constant-voltage
charger controller. The PWM controller uses a synchronous, quasi-constant frequency, constant off-time architecture that will not generate audible noise even when
using ceramic capacitors. Charging current is programmable with a sense resistor and programming resistor to
±4% typical accuracy. Charging current can be monitored
as a voltage across the programming resistor. An external
resistor divider and precision internal reference set the
final float voltage.
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General Purpose Charger Controller
High Conversion Efficiency: Up to 96%
Output Currents Exceeding 4A
±0.8% Voltage Accuracy
AC Adapter Current Limiting Maximizes
Charge Rate*
Thermistor Input for Temperature Qualified Charging
Wide Input Voltage Range: 6V to 28V
Wide Output Voltage: 3V to 28V
0.5V Dropout Voltage; Maximum Duty Cycle: 98%
Programmable Charge Current: ±4% Accuracy
Indicator Outputs for Charging, C/10 Current
Detection, AC Adapter Present, Input Current
Limiting and Faults
Charging Current Monitor Output
Available in a 20-Pin Narrow SSOP Package
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APPLICATIO S
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Notebook Computers
Portable Instruments
Battery Backup Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
*Protected by U.S. Patents including 5723970
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The LTC4008 includes a thermistor sensor input that will
suspend charging if an unsafe temperature condition is
detected and will automatically resume charging when
battery temperature returns to within safe limits; a FAULT
pin indicates this condition. A FLAG pin indicates when
charging current has decreased below 10% of the programmed current. An external sense resistor programs
AC adapter current limiting. The ICL pin indicates when the
charging current is being reduced by input current limiting
so that the charging algorithm can adapt.
TYPICAL APPLICATIO
12.3V, 4A Li-Ion Charger
INPUT SWITCH
DCIN
0V TO 28V
0.1µF
140k*
VLOGIC
100k
LTC4008
BATMON
DCIN
VFB
100k
ICL
ICL
ACP
ACP/SHDN
TGATE
FLAG
FLAG
BGATE
NTC
PGND
RT
THERMISTOR
10k
NTC
150k
0.47µF
ITH
6.04k
GND
0.12µF
NOTE: * 0.25% TOLERANCE
ALL OTHER RESISTORS ARE 1% TOLERANCE
SYSTEM
LOAD
20µF
CLN
FAULT
15k*
0.02Ω
4.99k
CLP
FAULT
32.4k
0.1µF
INFET
Q1
10µH
Q2
0.025Ω
20µF
Li-Ion
BATTERY
CSP
BAT
3.01k
3.01k
PROG
0.0047µF
26.7k
Q1: Si4431BDY
Q2: FDC645N
CHARGING
CURRENT
MONITOR
4008 TA01
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LTC4008
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ABSOLUTE MAXIMUM RATINGS
(Note 1)
Voltage from DCIN, CLP, CLN to GND ....... +32V/–0.3 V
PGND with Respect to GND .................................. ±0.3V
CSP, BAT to GND ........................................ +28V/–0.3V
VFB, RT to GND ............................................. +7V/–0.3V
NTC ............................................................. +10V/–0.3V
ACP/SHDN, FLAG, FAULT, ICL .................... +32V/–0.3V
CLP to CLN ........................................................... +0.5V
Operating Ambient Temperature Range
(Note 4) ...............................................–40°C to 85°C
Operating Junction Temperature ...........–40°C to 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
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PACKAGE/ORDER INFORMATION
TOP VIEW
DCIN
1
20 INFET
ORDER PART
NUMBER
ORDER PART
NUMBER
TOP VIEW
DCIN
1
20 NC
ICL
2
19 BGATE
SHDN
3
18 PGND
RT
4
17 TGATE
16 CLP
FAULT
5
16 CLP
15 CLN
GND
6
15 CLN
7
14 FLAG
VFB
7
14 FLAG
NTC
8
13 BATMON
NTC
8
13 BATMON
ITH
9
12 BAT
ITH
9
12 BAT
PROG 10
11 CSP
PROG 10
11 CSP
ICL
2
19 BGATE
ACP/SHDN
3
18 PGND
RT
4
17 TGATE
FAULT
5
GND
6
VFB
LTC4008EGN
GN PACKAGE
20-LEAD NARROW PLASTIC SSOP
GN PACKAGE
20-LEAD NARROW PLASTIC SSOP
TJMAX = 125°C, θJA = 90°C/W
TJMAX = 125°C, θJA = 90°C/W
LTC4008EGN-1
THE LTC4008EGN-1
Does Not Have the
Input FET Function
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range (Note 4), otherwise specifications are at TA = 25°C. VDCIN = 20V, VBAT = 12V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
DCIN Operating Range
6
IQ
Operating Current
Charging Sum of Current from CLP, CLN, DCIN
VTOL
Voltage Accuracy
(Notes 2, 5)
3
●
ITOL
TYP
BATMON Error (Note 5)
Measured from BAT to BATMON,
RLOAD = 100k
Charge Current Accuracy (Note 3)
VCSP – VBAT Target = 100mV
UNITS
28
V
5
mA
0.8
1.0
%
%
80
mV
4
5
%
%
20
35
10
µA
µA
–0.8
–1.0
0
MAX
35
●
–4
–5
DCIN = 0V (LTC4008 Only)
ACP/SHDN = 0V
●
●
–10
DCIN Rising, VBAT = 0V
●
4.2
4.7
5.5
V
●
1
1.6
2.5
V
2
3
Shutdown
Battery Leakage Current
UVLO
Undervoltage Lockout Threshold
Shutdown Threshold at ACP/SHDN
Operating Current in Shutdown
VSHDN = 0V, Sum of Current from CLP,
CLN, DCIN
mA
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LTC4008
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range (Note 4), otherwise specifications are at TA = 25°C. VDCIN = 20V, VBAT = 12V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Current Sense Amplifier, CA1
Input Bias Current Into BAT Pin
CMSL
CA1/I1 Input Common Mode Low
CMSH
CA1/I1 Input Common Mode High
VOS
Input Voltage Offset
µA
11.66
●
VDCIN ≤ 28V
0
V
●
VCLN – 0.2
–3.5
V
3.5
mV
200
mV
Current Comparators ICMP and IREV
ITMAX
Maximum Current Sense Threshold (VCSP – VBAT)
ITREV
Reverse Current Threshold (VCSP – VBAT)
VITH = 2.5V
●
140
165
– 30
mV
Current Sense Amplifier, CA2
Transconductance
1
mmho
Source Current
Measured at ITH, VITH = 1.4V
– 40
µA
Sink Current
Measured at ITH, VITH = 1.4V
40
µA
Current Limit Amplifier
Transconductance
VCLP
Current Limit Threshold
ICLN
CLN Input Bias Current
1.4
●
93
100
mmho
107
100
mV
nA
Voltage Error Amplifier, EA
Transconductance
VREF
Reference Voltage Used to Calculate VFLOAT
IBEA
Input Bias Current
Sink Current
OVSD
1
mmho
1.19
±4
Measured at ITH, VITH = 1.4V
Overvoltage Shutdown Threshold as a Percent
of Programmed Charger Voltage
V
±25
nA
µA
36
●
102
107
110
%
●
0
0.17
0.25
V
25
50
Input P-Channel FET Driver (INFET) (LTC4008 Only)
DCIN Detection Threshold (VDCIN – VCLP)
DCIN Voltage Ramping Up
from VCLP – 0.1V
●
Forward Regulation Voltage (VDCIN – VCLP)
DCIN Voltage Ramping Down
●
– 60
– 25
INFET “On” Clamping Voltage (VCLP – VINFET)
IINFET = 1µA
●
5
5.8
INFET “Off” Clamping Voltage (VCLP – VINFET)
IINFET = – 25µA
Reverse Voltage Turn-Off Voltage (VDCIN – VCLP)
mV
mV
6.5
V
0.25
V
Thermistor
NTCVR
Reference Voltage During Sample Time
4.5
V
High Threshold
VNTC Rising
●
NTCVR
• 0.48
NTCVR
• 0.5
NTCVR
• 0.52
V
Low Threshold
VNTC Falling
●
NTCVR
• 0.115
NTCVR
• 0.125
NTCVR
• 0.135
V
Thermistor Disable Current
VNTC ≤ 10V
10
µA
V
Indicator Outputs (ACP/ SHDN, FLAG, ICL, FAULT
C10TOL
FLAG (C/10) Accuracy
Voltage Falling at PROG
ICL Threshold Accuracy
VCLP – VCLN
VOL
Low Logic Level of ACP/SHDN, FLAG, ICL, FAULT
IOL = 100µA
VOH
High Logic Level of ACP/SHDN, ICL
IOH = –1µA
IOFF
Off State Leakage Current of FLAG, FAULT
VOH = 3V
IPO
Pull-Up Current on ACP/SHDN, ICL
V = 0V
●
●
0.375
0.397
0.420
83
93
105
mV
0.5
V
1
µA
2.7
V
–1
–10
µA
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LTC4008
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range (Note 4), otherwise specifications are at TA = 25°C. VDCIN = 20V, VBAT = 12V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
345
UNITS
Oscillator
fOSC
Regulator Switching Frequency
255
300
fMIN
Regulator Switching Frequency in Drop Out
Duty Cycle ≥ 98%
20
25
kHz
kHz
DCMAX
Regulator Maximum Duty Cycle
VCSP = VBAT
98
99
%
Gate Drivers (TGATE, BGATE)
VTGATE High (VCLP – VTGATE)
ITGATE = –1mA
VBGATE High
CLOAD = 3000pF
VTGATE Low (VCLP – VTGATE)
CLOAD = 3000pF
VBGATE Low
IBGATE = 1mA
TGTR
TGTF
TGATE Transition Time
TGATE Rise Time
TGATE Fall Time
CLOAD = 3000pF, 10% to 90%
CLOAD = 3000pF, 10% to 90%
BGTR
BGTF
BGATE Transition Time
BGATE Rise Time
BGATE Fall Time
CLOAD = 3000pF, 10% to 90%
CLOAD = 3000pF, 10% to 90%
50
mV
5.6
10
V
5.6
10
V
50
mV
50
50
110
100
ns
ns
40
40
90
80
ns
ns
VTGATE at Shutdown (VCLP – VTGATE)
ITGATE = –1µA, DCIN = 0V, CLP = 12V
100
mV
VBGATE at Shutdown
IBGATE = 1µA, DCIN = 0V, CLP = 12V
100
mV
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: See Test Circuit.
Note 3: Does not include tolerance of current sense resistor or current
programming resistor.
Note 4: The LTC4008E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 5: Voltage accuracy includes BATMON error and voltage reference
error. Does not include error of external resistor divider.
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TYPICAL PERFOR A CE CHARACTERISTICS
INFET Response Time to
Reverse Current
(TA = 25°C unless otherwise noted)
VFB vs DCIN
BATMON Offset
0.02
0.05
Vgs OF PFET (2V/DIV)
Vgs = 0
0
Id (REVERSE) OF
PFET (5A/DIV)
VBATTERY - VBATMON (V)
Vs = 0V
VFB (%)
0
Vs OF PFET (5V/DIV)
–0.05
–0.10
–0.15
1.25µs/DIV
TEST PERFORMED ON DEMOBOARD
VCHARGE = 12.6V
VIN = 15VDC
CHARGER = ON
INFET = 1/2 Si4925DY
ICHARGE = <10mA
4008 G01
–0.02
–0.04
–0.06
–0.08
–0.20
Id = 0A
BATMON LOAD = 100kΩ
DCIN = 15V
DCIN = 20V
DCIN = 24V
–0.10
6
11
16
21
DCIN (V)
26
3
4008 G02
8
13
18
BATTERY VOLTAGE (V)
23
4008 G03
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LTC4008
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TYPICAL PERFOR A CE CHARACTERISTICS
VOUT vs IOUT
Disconnect/Reconnect Battery
(Load Dump)
PWM Frequency vs Duty Cycle
0
350
–0.5
3A STEP
300
PWM FREQUENCY (kHz)
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
250
1A STEP
–4.5 DCIN = 20V
VBAT = 12.6V
–5.0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
OUTPUT CURRENT (A)
200
150
PROGRAMMED CURRENT = 10%
100
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
DUTY CYCLE (VOUT/VIN)
4008 G05
RECONNECT
DISCONNECT
DCIN = 15V
DCIN = 20V
DCIN = 24V
50
Battery Leakage Current vs
Battery Voltage
LOAD CURRENT = 1A, 2A, 3A
DCIN = 20V
VFLOAT = 12.6V
4008 G06
Efficiency at 19VDC VIN
100
VDCIN = 0V
35
16.8V
95
30
12.6V
EFFICIENCY (%)
BATTERY LEAKAGE CURRENT (µA)
3A STEP
LOAD
STATE
4008 G04
40
1A STEP
VFLOAT
1V/(DIV)
–4.0
25
20
15
10
90
85
80
5
0
75
0
5
10
15
20
BATTERY VOLTAGE (V)
25
30
0.50
1.00
1.50
2.00
2.50
CHARGE CURRENT (A)
4008 G07
3.00
4008 G09
Charging Voltage Error
TEMP = 27°C, ILOAD = 0.120A
Efficiency at 12.6V with 15VDC VIN
0.150
100
OUTPUT VOLTAGE ERROR (V)
0.125
95
EFFICIENCY (%)
OUTPUT VOLTAGE ERROR (%)
(TA = 25°C unless otherwise noted)
90
85
80
0.100
0.075
0.050
DCIN = 20V
0.025
DCIN = 15V
0
–0.025
–0.050
–0.075
–0.100
–0.125
75
–0.150
0.50
1.00
1.50
2.00
2.50
CHARGE CURRENT (A)
3.00
4008 G10
0
2
4
6 8 10 12 14 16 18 20 22
CHARGING VOLTAGE (V)
4008 G11
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LTC4008
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PI FU CTIO S
DCIN (Pin 1): External DC Power Source Input. Bypass
this pin with at least 0.01µF. See Applications Information
section.
ICL (Pin 2): Input Current Limit Indicator. Active low digital
output. Internal 10µA pull-up to 3.5V. Pulled low if the
charger current is being reduced by the input current
limiting function. The pin is capable of sinking at least
100µA. If VLOGIC > 3.3V, add an external pull-up.
charging current in conjunction with the current sensing
resistor. The voltage at this pin provides a linear indication
of charging current. Peak current is equivalent to 1.19V.
Zero current is approximately 0.309V. A capacitor from
PROG to ground is required to filter higher frequency
components. The maximum program resistance to ground
is 100k. Values higher than 100k can cause the charger to
shut down.
ACP/SHDN (Pin 3): Open-drain output used to indicate if
the AC adapter voltage is adequate for charging. Active high
digital output. Internal 10µA pull-up to 3.5V. The charger
can also be shutdown by pulling this pin below 1V. The pin
is capable of sinking at least 100µA. If VLOGIC > 3.3V, add
an external pull-up. (LTC4008-1: ACP function disabled.)
CSP (Pin 11): Current Amplifier CA1 Input. The CSP and
BAT pins measure the voltage across the sense resistor,
RSENSE, to provide the instantaneous current signals required for both peak and average current mode operation.
RT (Pin 4): Thermistor Clocking Resistor. Use a 150k
resistor as a nominal value. This resistor is always required. If this resistor is not present, the charger will not
start.
BATMON (Pin 13): Output Voltage Representing Battery
Voltage. Switched off to reduce standby current drain
when AC is not present. An external voltage divider from
BATMON to VFB sets the charger float voltage. Recommended minimum load resistance is 100k.
FAULT (Pin 5): Active low open-drain output that indicates
that charger operation has suspended due to the thermistor exceeding allowed values. A pull-up resistor is
required if this function is used. The pin is capable of
sinking at least 100µA.
GND (Pin 6): Ground for Low Power Circuitry.
VFB (Pin 7): Input of Voltage Feedback Error Amplifier, EA,
in the Block Diagram.
NTC (Pin 8): A thermistor network is connected from NTC
to GND. This pin determines if the battery temperature is
safe for charging. The charger and timer are suspended
and the FAULT pin is driven low if the thermistor indicates
a temperature that is unsafe for charging. The thermistor
function may be disabled with a 300k to 500k resistor from
DCIN to NTC.
ITH (Pin 9): Control Signal of the Inner Loop of the Current
Mode PWM. Higher ITH voltage corresponds to higher
charging current in normal operation. A 6k resistor in
series with a capacitor of at least 0.1µF to GND provides
loop compensation. Typical full-scale output current is
40µA. Nominal voltage range for this pin is 0V to 3V.
PROG (Pin 10): Current Programming/Monitoring Input/
Output. An external resistor to GND programs the peak
6
BAT (Pin 12): Battery Sense Input and the Negative
Reference for the Current Sense Resistor.
FLAG (Pin 14): Active low open-drain output that indicates
when charging current has declined to 10% of max programmed current. A pull-up resistor is required if this
function is used. The pin is capable of sinking at least
100µA. This function is latching. To clear it, user must
cycle the ACP/SHDN pin.
CLN (Pin 15): Negative Input to the Input Current Limiting
Amplifier CL1. The threshold is set at 100mV below the
voltage at the CLP pin. When used to limit input current, a
filter is needed to filter out the switching noise. If no
current limit function is desired, connect this pin to CLP.
CLP (Pin 16): This pin serves as a positive reference for the
input current limit amplifier, CL1. It also serves as the
power supply for the IC.
TGATE (Pin 17): Drives the top external PMOSFET of the
battery charger buck converter.
PGND (Pin 18): High Current Ground Return for BGATE
Driver.
BGATE (Pin 19): Drives the bottom external N-MOSFET of
the battery charger buck converter.
INFET (Pin 20): Drives the gate of the external input
P-MOSFET. (LTC4008-1: No Connection)
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LTC4008
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BLOCK DIAGRA
0.1µF
VIN
DCIN
INFET*
Q3
1
5.8V
20
*
*
–
+
*NOT USED IN THE LTC4008-1
CLP
ACP/SHDN 3
CONTROL
BLOCK
OSCILLATOR
4
THERMISTOR
8
150k
RT
FAULT 5
TBAD
NTC
32.4k
10k
NTC
0.47µF
FLAG 14
BATMON
397mV
+
35mV
6
11.67µA
–
GND
–
C/10
13
+
–
16
15
gm = 1.4m
11
CSP
20µF
3k
9k
CL1
100mV
+
gm = 1m
–
Ω
CLN
–
7
3k
RSENSE
CA1
Ω
RCL
EA
+
CLP
0.1µF
5k
Ω
VFB
gm = 1m
BAT
–
+
1.19V
12
CA2
ICL 2
+
DCIN
OSCILLATOR
WATCHDOG
DETECT tOFF
20µF
1.19V
9
+
1.28V
–
OV
÷5
ITH
6K
BUFFERED ITH
0.12µF
CLP
Q
S
R
Q2
BGATE
PGND
19
PWM
LOGIC
ICMP
–+
–
17
+
Q1
TGATE
CHARGE
18
IREV
–
17mV
L1
+
10
PROG
4.7nF
RPROG
26.7k
4008 BD
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LTC4008
TEST CIRCUIT
7
VFB
LTC4008
+
+
VREF
EA
–
–
13
BATMON
11
CSP
12
BAT
9
90.325k
ITH
+
LT1055
–
9.675k
0.6V
4008 TC
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OPERATIO
OVERVIEW
The LTC4008 is a synchronous current mode PWM step
down (buck) switcher battery charger controller. The
charge current is programmed by the combination of a
program resistor (RPROG) from the PROG pin to ground
and a sense resistor (RSENSE) between the CSP and BAT
pins. The final float voltage is programmed with an external resistor divider and the internal 1.19V reference voltage. Charging begins when the potential at the DCIN pin
rises above the voltage at BAT (and the UVLO voltage) and
the ACP/SHDN pin is high. An external thermistor network
is sampled at regular intervals. If the thermistor value
exceeds design limits, charging is suspended and the
FAULT pin is set low. If the thermistor value returns to an
acceptable value, charging resumes and the FAULT pin is
set high. An external resistor on the RT pin sets the
sampling interval for the thermistor.
As the battery approaches the final float voltage, the
charge current will begin to decrease. When the current
drops to 10% of the full-scale charge current, an internal
C/10 comparator will indicate this condition by latching
the FLAG pin low. If this condition is caused by an input
current limit condition, described below, then the FLAG
indicator will be inhibited. When the input voltage is not
present, the charger goes into a sleep mode, dropping
battery current drain to 15µA. This greatly reduces the
current drain on the battery and increases the standby
time. The charger can be inhibited at any time by forcing
the ACP/SHDN pin to a low voltage. Forcing ACP/SHDN
low, or removing the voltage from DCIN, will also clear the
FLAG pin if it is low.
Table 1. Truth Table For Indicator States
MODE
DCIN
Shutdown by low adapter voltage (Disabled on LTC4008-1)
<BAT
LOW
HIGH
HIGH
LOW
Normal charging
>BAT
HIGH
HIGH
HIGH*
HIGH*
Input current limited charging
>BAT
HIGH
HIGH*
HIGH*
LOW
Charger shut down due to thermistor out of range
>BAT
HIGH
X
LOW
HIGH
X
Forced LOW
HIGH
HIGH
LOW
>BAT + <UVL
HIGH
HIGH
HIGH*
LOW
Shut down by ACP/SHDN pin (USER)
Shut down by undervoltage lockout
ACP/SHDN
FLAG**
FAULT**
ICL
*Most probable condition, **Open-drain output, HIGH = Open with pull-up, X = Don’t care
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LTC4008
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OPERATIO
Input FET (LTC4008)
OFF
TGATE
The input FET circuit performs two functions. It enables
the charger if the input voltage is higher than the CLP pin
and provides the logic indicator of AC present on the
ACP/SHDN pin. It controls the gate of the input FET to keep
a low forward voltage drop when charging and also
prevents reverse current flow through the input FET.
ON
ON
tOFF
BGATE
OFF
TRIP POINT SET BY ITH VOLTAGE
INDUCTOR
CURRENT
If the input voltage is less than VCLP, it must go at least
170mV higher than VCLN to activate the charger. When this
occurs the ACP/SHDN pin is released and pulled up with
an external load to indicate that the adapter is present. The
gate of the input FET is driven to a voltage sufficient to keep
a low forward voltage drop from drain to source. If the
voltage between DCIN and CLP drops to less than 25mV,
the input FET is turned off slowly. If the voltage between
DCIN and CLP is ever less than – 25mV, then the input FET
is turned off in less than 10µs to prevent significant
reverse current from flowing in the input FET. In this
condition, the ACP/SHDN pin is driven low and the charger
is disabled.
The peak inductor current, at which ICMP resets the SR
latch, is controlled by the voltage on ITH. ITH is in turn
controlled by several loops, depending upon the situation
at hand. The average current control loop converts the
voltage between CSP and BAT to a representative current.
Error amp CA2 compares this current against the desired
current programmed by RPROG at the PROG pin and
adjusts ITH until:
Input FET (LTC4008-1)
therefore,
The input FET circuit is disabled for the LTC4008-1. There
is no low current shutdown mode when DCIN falls below
the CLP pin. The ACP/SHDN pin functions only to shut
down the charger.
⎛ V
⎞ 3.01kΩ
ICHARGE(MAX) = ⎜ REF – 11.67µA⎟ •
⎝ RPROG
⎠ RSENSE
The voltage at BATMON is divided down by an external
resistor divider and is used by error amp EA to decrease
ITH if the divider voltage is above the 1.19V reference.
When the charging current begins to decrease, the voltage
at PROG will decrease in direct proportion. The voltage at
PROG is then given by:
Battery Charger Controller
The LTC4008 charger controller uses a constant off-time,
current mode step-down architecture. During normal operation, the top MOSFET is turned on each cycle when the
oscillator sets the SR latch and turned off when the main
current comparator ICMP resets the SR latch. While the top
MOSFET is off, the bottom MOSFET is turned on until
either the inductor current trips the current comparator
IREV or the beginning of the next cycle. The oscillator uses
the equation:
tOFF
V
–V
= DCIN BAT
VDCIN • fOSC
to set the bottom MOSFET on time. This activity is diagrammed in Figure 1.
4008 F01
Figure 1
VREF
V
– V + 11.67µA • 3.01kΩ
= CSP BAT
RPROG
3.01kΩ
VPROG = (ICHARGE • RSENSE + 11.67µA • 3.01kΩ) •
RPROG
3.01kΩ
The accuracy of VPROG will range from 0% to ITOL.
VPROG is plotted in Figure 2.
The amplifier CL1 monitors and limits the input current,
normally from the AC adapter to a preset level (100mV/
RCL). At input current limit, CL1 will decrease the ITH
voltage, thereby reducing charging current. The ICL indicator output will go low when this condition is detected and
the FLAG indicator will be inhibited if it is not already low.
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1.2
Charger Startup
1.19V
1.0
VPROG (V)
0.8
0.6
0.4
0.309V
0.2
0
0
20
40
60
80
ICHARGE (% OF MAXIMUM CURRENT)
100
4008 F02
Figure 2. VPROG vs ICHARGE
If the charging current decreases below 10% to 15% of
programmed current, while engaged in input current
limiting, BGATE will be forced low to prevent the charger
from discharging the battery. Audible noise can occur in
this mode of operation.
An overvoltage comparator guards against voltage transient overshoots (>7% of programmed value). In this
case, both MOSFETs are turned off until the overvoltage
condition is cleared. This feature is useful for batteries
which “load dump” themselves by opening their protection switch to perform functions such as calibration or
pulse mode charging.
When the charger is enabled, it will not begin switching
until the ITH voltage exceeds a threshold that assures
initial current will be positive. This threshold is 5% to 15%
of the maximum programmed current (100mV/RSENSE).
After the charger begins switching, the various loops will
control the current at a level that is higher or lower than
the initial current. The duration of this transient condition
depends upon the loop compensation but is typically less
than 100µs.
Thermistor Detection
The thermistor detection circuit is shown in Figure 3. It
requires an external resistor and capacitor in order to
function properly.
LTC4008
R10
32.4k
–
8
RTH
10k
NTC
C7
0.47µF
CLK
NTC
S1
+
~4.5V
60k
+
–
PWM Watchdog Timer
–
There is a watchdog timer that observes the activity on the
BGATE and TGATE pins. If TGATE stops switching for
more than 40µs, the watchdog activates and turns off the
top MOSFET for about 400ns. The watchdog engages to
prevent very low frequency operation in dropout which is
a potential source of audible noise when using ceramic
input and output capacitors.
+
45k
15k
D
Q
TBAD
C
4008 F03
Figure 3
4008fa
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The thermistor detector performs a sample-and-hold function. An internal clock, whose frequency is determined by
the timing resistor connected to RT, keeps switch S1
closed to sample the thermistor:
This voltage is stored by C7. Then the switch is opened for
a short period of time to read the voltage across the
thermistor.
tHOLD = 10 • RRT • 17.5pF = 26µs,
tSAMPLE = 127.5 • 20 • RRT • 17.5pF = 6.7ms,
for RRT = 150k
for RRT = 150k
The external RC network is driven to approximately 4.5V
and settles to a final value across the thermistor of:
VRTH(FINAL) =
4.5V • RTH
RTH + R10
When the tHOLD interval ends the result of the thermistor
testing is stored in the D flip-flop (DFF). If the voltage at
NTC is within the limits provided by the resistor divider
feeding the comparators, then the NOR gate output will be
low and the DFF will set TBAD to zero and charging will
continue. If the voltage at NTC is outside of the resistor
divider limits, then the DFF will set TBAD to one, the charger
will be shut down, FAULT pin is set low and the timer will
be suspended until TBAD returns to zero (see Figure 4).
CLK
(NOT TO
SCALE)
tHOLD
VOLTAGE ACROSS THERMISTOR
tSAMPLE
COMPARATOR HIGH LIMIT
VNTC
COMPARATOR LOW LIMIT
4008 F04
Figure 4
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Charger Current Programming
The basic formula for charging current is:
ICHARGE(MAX) =
VREF • 3.01kΩ / RPROG – 0.035V
RSENSE
VREF = 1.19V. This leaves two degrees of freedom: RSENSE
and RPROG. The 3.01k input resistors must not be altered
since internal currents and voltages are trimmed for this
value. Pick RSENSE by setting the average voltage between
CSP and BAT to be close to 100mV during maximum
charger current. Then RPROG can be determined by solving
the above equation for RPROG.
RPROG =
VREF • 3.01kΩ
RSENSE • ICHARGE(MAX) + 0.035V
Table 2. Recommended RSNS and RPROG Resistor Values
IMAX (A)
RSENSE (Ω) 1%
RSENSE (W)
RPROG (kΩ) 1%
1.0
0.100
0.25
26.7
2.0
0.050
0.25
26.7
3.0
0.033
0.5
26.7
4.0
0.025
0.5
26.7
Charging current can be programmed by pulse width
modulating RPROG with a switch Q1 to RPROG at a frequency higher than a few kHz (Figure 5). CPROG must be
increased to reduce the ripple caused by the RPROG
switching. The compensation capacitor at ITH will probably need to be increased also to improve stability and
LTC4008
PROG
10
CPROG
RPROG
RZ
102k
5V
0V
Q1
2N7002
4008 F05
Figure 5. PWM Current Programming
prevent large overshoot currents during start-up conditions. Charging current will be proportional to the duty
cycle of the switch with full current at 100% duty cycle and
zero current when Q1 is off.
Maintaining C/10 Accuracy
The C/10 comparator threshold that drives the FLAG pin
has a fixed threshold of approximately VPROG = 400mV.
This threshold works well when RPROG is 26.7k, but will
not yield a 10% charging current indication if RPROG is a
different value. There are situations where a standard
value of RSENSE will not allow the desired value of charging
current when using the preferred RPROG value. In these
cases, where the full-scale voltage across RSENSE is within
±20mV of the 100mV full-scale target, the input resistors
connected to CSP and BAT can be adjusted to provide the
desired maximum programming current as well as the
correct FLAG trip point.
For example, the desired max charging current is 2.5A but
the best RSENSE value is 0.033Ω. In this case, the voltage
across RSENSE at maximum charging current is only
82.5mV, normally RPROG would be 30.1k but the nominal
FLAG trip point is only 5% of maximum charging current.
If the input resistors are reduced by the same amount as
the full-scale voltage is reduced then, R4 = R5 = 2.49k and
RPROG = 26.7k, the maximum charging current is still 2.5A
but the FLAG trip point is maintained at 10% of full scale.
There are other effects to consider. The voltage across the
current comparator is scaled to obtain the same values as
the 100mV sense voltage target, but the input referred
sense voltage is reduced, causing some careful consideration of the ripple current. Input referred maximum comparator threshold is 117mV, which is the same ratio of
1.4x the DC target. Input referred IREV threshold is scaled
back to –24mV. The current at which the switcher starts
will be reduced as well so there is some risk of boost
activity. These concerns can be addressed by using a
slightly larger inductor to compensate for the reduction of
tolerance to ripple current.
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Table 3
Battery Conditioning
Some batteries require a small charging current to condition them when they are severely depleted. The charging
current is switched to a high rate after the battery voltage
has reached a “safe” voltage to do so. Figure 6 illustrates
how to do this 2-level charging. When Q1 is on, the charger
current is set to maximum. When Q1 is off, the charging
current is set to 10% of the maximum.
PROG
10
CPROG
0.0047µF
Q1
2N7002
R9 (kΩ) 0.25%
R8 (kΩ) 0.25%
8.2
24.9
147
8.4
26.1
158
12.3
15
140
12.6
16.9
162
16.4
11.5
147
16.8
13.3
174
Soft-Start
LTC4008
R1
26.7k
FLOAT VOLTAGE (V)
R2
53.6k
4008 F06
Figure 6. 2-Level Current Programming
Charger Voltage Programming
A resistor divider, R8 and R9 (see Figure 10), programs
the final float voltage of the charger. The equation for float
voltage is (the input bias current of EA is typically –4nA and
can be ignored):
VFLOAT = VREF (1 + R8/R9)
It is recommended that the sum of R8 and R9 not be less
than 100k. Accuracy of the LTC4008 voltage reference is
±0.8% at 25°C, and ±1% over the full temperature range.
This leads to the possibility that very accurate (0.1%)
resistors might be needed for R8 and R9. Actually, the
temperature of the LTC4008 will rarely exceed 50°C near
the float voltage because charging currents have tapered
to a low level, so 0.25% resistors will normally provide the
required level of overall accuracy. Table 3 contains recommended values for R8 and R9 for popular float voltages.
The LTC4008 is soft started by the 0.12µF capacitor on the
ITH pin. On start-up, ITH pin voltage will rise quickly to 0.5V,
then ramp up at a rate set by the internal 40µA pull-up
current and the external capacitor. Battery charging
current starts ramping up when ITH voltage reaches 0.8V
and full current is achieved with ITH at 2V. With a 0.12µF
capacitor, time to reach full charge current is about 2ms
and it is assumed that input voltage to the charger will
reach full value in less than 2ms. The capacitor can be
increased up to 1µF if longer input start-up times are
needed.
Input and Output Capacitors
The input capacitor (C2) is assumed to absorb all input
switching ripple current in the converter, so it must have
adequate ripple current rating. Worst-case RMS ripple
current will be equal to one-half of output charging
current. Actual capacitance value is not critical. Solid
tantalum low ESR capacitors have high ripple current
rating in a relatively small surface mount package, but
caution must be used when tantalum capacitors are used
for input or output bypass. High input surge currents can
be created when the adapter is hot-plugged to the charger
or when a battery is connected to the charger. Solid
tantalum capacitors have a known failure mechanism
when subjected to very high turn-on surge currents. Only
Kemet T495 series of “Surge Robust” low ESR tantalums
are rated for high surge conditions such as battery to
ground.
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The relatively high ESR of an aluminum electrolytic for C1,
located at the AC adapter input terminal, is helpful in
reducing ringing during the hot-plug event. Refer to Application Note 88 for more information.
Highest possible voltage rating on the capacitor will minimize problems. Consult with the manufacturer before use.
Alternatives include new high capacity ceramic (at least
20µF) from Tokin, United Chemi-Con/Marcon, et al. Other
alternative capacitors include OS-CON capacitors from
Sanyo.
The output capacitor (C3) is also assumed to absorb
output switching current ripple. The general formula for
capacitor current is:
IRMS
⎛
⎞
V
0.29(VBAT )⎜ 1 – BAT ⎟
⎝ VDCIN ⎠
=
(L1)( f)
For example:
VDCIN = 19V, VBAT = 12.6V, L1 = 10µH, and
f = 300kHz, IRMS = 0.41A.
EMI considerations usually make it desirable to minimize
ripple current in the battery leads, and beads or inductors
may be added to increase battery impedance at the 300kHz
switching frequency. Switching ripple current splits between the battery and the output capacitor depending on
the ESR of the output capacitor and the battery impedance. If the ESR of C3 is 0.2Ω and the battery impedance
is raised to 4Ω with a bead or inductor, only 5% of the
current ripple will flow in the battery.
Inductor Selection
Higher operating frequencies allow the use of smaller
inductor and capacitor values. A higher frequency generally results in lower efficiency because of MOSFET gate
charge losses. In addition, the effect of inductor value on
ripple current and low current operation must also be
considered. The inductor ripple current ∆IL decreases
with higher frequency and increases with higher VIN.
∆IL =
⎛ V ⎞
1
VOUT ⎜ 1– OUT ⎟
( f)(L) ⎝ VIN ⎠
Accepting larger values of ∆IL allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is ∆IL = 0.4(IMAX). In no case should
∆IL exceed 0.6(IMAX) due to limits imposed by IREV and
CA1. Remember the maximum ∆IL occurs at the maximum input voltage. In practice 10µH is the lowest value
recommended for use.
Lower charger currents generally call for larger inductor
values. Use Table 4 as a guide for selecting the correct
inductor value for your application.
Table 4
MAXIMUM
AVERAGE CURRENT (A)
INPUT
VOLTAGE (V)
MINIMUM INDUCTOR
VALUE (µH)
1
≤ 20
40 ±20%
1
> 20
56 ±20%
2
≤ 20
20 ±20%
2
> 20
30 ±20%
3
≤ 20
15 ±20%
3
> 20
20 ±20%
4
≤ 20
10 ±20%
4
> 20
15 ±20%
Charger Switching Power MOSFET
and Diode Selection
Two external power MOSFETs must be selected for use
with the charger: a P-channel MOSFET for the top (main)
switch and an N-channel MOSFET for the bottom (synchronous) switch.
The peak-to-peak gate drive levels are set internally. This
voltage is typically 6V. Consequently, logic-level threshold
MOSFETs must be used. Pay close attention to the BVDSS
specification for the MOSFETs as well; many of the logic
level MOSFETs are limited to 30V or less.
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Selection criteria for the power MOSFETs include the “ON”
resistance RDS(ON), total gate capacitance QG, reverse
transfer capacitance CRSS, input voltage and maximum
output current. The charger is operating in continuous
mode so the duty cycles for the top and bottom MOSFETs
are given by:
Synchronous Switch Duty Cycle = (VIN – VOUT)/VIN.
The Schottky diode D1, shown in the Typical Application
on the back page, conducts during the dead-time between
the conduction of the two power MOSFETs. This prevents
the body diode of the bottom MOSFET from turning on and
storing charge during the dead-time, which could cost as
much as 1% in efficiency. A 1A Schottky is generally a
good size for 4A regulators due to the relatively small
average current. Larger diodes can result in additional
transition losses due to their larger junction capacitance.
The MOSFET power dissipations at maximum output
current are given by:
The diode may be omitted if the efficiency loss can be
tolerated.
Main Switch Duty Cycle = VOUT/VIN
PMAIN = VOUT/VIN(IMAX)2(1 + δ∆T)RDS(ON)
+ k(VIN)2(IMAX)(CRSS)(fOSC)
PSYNC = (VIN – VOUT)/VIN(IMAX)2(1 + δ∆T)RDS(ON)
Where δ∆T is the temperature dependency of RDS(ON) and
k is a constant inversely related to the gate drive current.
Both MOSFETs have I2R losses while the PMAIN equation
includes an additional term for transition losses, which are
highest at high input voltages. For VIN < 20V the high
current efficiency generally improves with larger MOSFETs,
while for VIN > 20V the transition losses rapidly increase
to the point that the use of a higher RDS(ON) device with
lower CRSS actually provides higher efficiency. The synchronous MOSFET losses are greatest at high input voltage or during a short circuit when the duty cycle in this
switch in nearly 100%. The term (1 + δ∆T) is generally
given for a MOSFET in the form of a normalized RDS(ON) vs
temperature curve, but δ = 0.005/°C can be used as an
approximation for low voltage MOSFETs. CRSS = QGD/
∆VDS is usually specified in the MOSFET characteristics.
The constant k = 2 can be used to estimate the contributions of the two terms in the main switch dissipation
equation.
If the charger is to operate in low dropout mode or with a
high duty cycle greater than 85%, then the topside
P-channel efficiency generally improves with a larger
MOSFET. Using asymmetrical MOSFETs may achieve cost
savings or efficiency gains.
Calculating IC Power Dissipation
The power dissipation of the LTC4008 is dependent upon
the gate charge of the top and bottom MOSFETs (QG1 &
QG2 respectively) The gate charge is determined from the
manufacturer’s data sheet and is dependent upon both the
gate voltage swing and the drain voltage swing of the
MOSFET. Use 6V for the gate voltage swing and VDCIN for
the drain voltage swing.
PD = VDCIN • (fOSC (QG1 + QG2) + IQ)
Example:
VDCIN = 19V, fOSC = 345kHz, QG1 = QG2 = 15nC,
IQ = 5mA
PD = 292mW
Adapter Limiting
An important feature of the LTC4008 is the ability to
automatically adjust charging current to a level which
avoids overloading the wall adapter. This allows the product to operate at the same time that batteries are being
charged without complex load management algorithms.
Additionally, batteries will automatically be charged at the
maximum possible rate of which the adapter is capable.
This feature is created by sensing total adapter output
current and adjusting charging current downward if a
preset adapter current limit is exceeded. True analog
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control is used, with closed-loop feedback ensuring that
adapter load current remains within limits. Amplifier CL1
in Figure 7 senses the voltage across RCL, connected
between the CLP and CLN pins. When this voltage exceeds
100mV, the amplifier will override programmed charging
current to limit adapter current to 100mV/RCL. A lowpass
filter formed by 5kΩ and 15nF is required to eliminate
switching noise. If the current limit is not used, CLN
should be connected to CLP.
Note that the ICL pin will be asserted when the voltage
across RCL is 93mV, before the adapter limit regulation
threshold.
VIN
LTC4008
CLP
–
CL1
16
15nF
100mV
+
RCL*
CLN
+
5k
CIN
TO
SYSTEM
LOAD
15
4008 F07
*RCL =
100mV
ADAPTER CURRENT LIMIT
Figure 7. Adapter Current Limiting
LTC4008
R9
NTC 8
C7
RTH
4008 F08
Figure 8. Voltage Divider Thermistor Network
Table 5. Common RCL Resistor Values
ADAPTER
RATING (A)
1.5
1.8
2
2.3
2.5
2.7
3
RCL VALUE*
(Ω) 1%
0.06
0.05
0.045
0.039
0.036
0.033
0.03
RCL POWER
DISSIPATION (W)
0.135
0.162
0.18
0.206
0.225
0.241
0.27
RCL POWER
RATING (W)
0.25
0.25
0.25
0.25
0.5
0.5
0.5
* Values shown above are rounded to nearest standard value.
As is often the case, the wall adapter will usually have at
least a +10% current limit margin and many times one can
simply set the adapter current limit value to the actual
adapter rating (see Table 5).
Setting Input Current Limit
Designing the Thermistor Network
To set the input current limit, you need to know the
minimum wall adapter current rating. Subtract 7% for the
input current limit tolerance and use that current to determine the resistor value.
There are several networks that will yield the desired
function of voltage vs temperature needed for proper
operation of the thermistor. The simplest of these is the
voltage divider shown in Figure 8. Unfortunately, since the
HIGH/LOW comparator thresholds are fixed internally,
there is only one thermistor type that can be used in this
network; the thermistor must have a HIGH/LOW resistance ratio of 1:7. If this happy circumstance is true for
you, then simply set R9 = RTH(LOW)
RCL = 100mV/ILIM
ILIM = Adapter Min Current –
(Adapter Min Current • 7%)
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LTC4008
Example #2: 100kΩ NTC
R9
NTC 8
C7
R9A
RTH
4008 F09
Figure 9. General Thermistor Network
If you are using a thermistor that doesn’t have a 1:7 HIGH/
LOW ratio, or you wish to set the HIGH/LOW limits to
different temperatures, then the more generic network in
Figure 9 should work.
Once the thermistor, RTH, has been selected and the
thermistor value is known at the temperature limits, then
resistors R9 and R9A are given by:
For NTC thermistors:
TLOW = 5°C, THIGH = 50°C
RTH = 100k at 25°C,
RTH(LOW) = 272.05k at 5°C
RTH(HIGH) = 33.195k at 50°C
R9 = 226.9k → 226k (nearest 1% value)
R9A = 1.365M → 1.37M (nearest 1% value)
Example #3: 22kΩ PTC
TLOW = 0°C, THIGH = 50°C
RTH = 22k at 25°C,
RTH(LOW) = 6.53k at 0°C
RTH(HIGH) = 61.4k at 50°C
R9 = 43.9k → 44.2k (nearest 1% value)
R9A = 154k
R9 = 6 RTH(LOW) • RTH(HIGH)/(RTH(LOW) – RTH(HIGH))
Sizing the Thermistor Hold Capacitor
R9A = 6 RTH(LOW) • RTH(HIGH)/(RTH(LOW) – 7 • RTH(HIGH))
During the hold interval, C7 must hold the voltage across
the thermistor relatively constant to avoid false readings.
A reasonable amount of ripple on NTC during the hold
interval is about 10mV to 15mV. Therefore, the value of C7
is given by:
Where RTH(LOW) > 7 • RTH(HIGH)
For PTC thermistors:
R9 = 6 RTH(LOW) • RTH(HIGH)/(RTH(HIGH) – RTH(LOW))
R9A = 6 RTH(LOW) • RTH(HIGH)/(RTH(HIGH) – 7 • RTH(LOW))
Where RTH(HIGH) > 7 • RTH(LOW)
Example #1: 10kΩ NTC with custom limits
TLOW = 0°C, THIGH = 50°C
RTH = 10k at 25°C,
RTH(LOW) = 32.582k at 0°C
RTH(HIGH) = 3.635k at 50°C
R9 = 24.55k → 24.3k (nearest 1% value)
R9A = 99.6k → 100k (nearest 1% value)
C7 = tHOLD/(R9/7 • –ln(1 – 8 • 15mV/4.5V))
= 10 • RRT • 17.5pF/(R9/7 • – ln(1 – 8 • 15mV/4.5V)
Example:
R9 = 24.3k
RRT = 150k
C7 = 0.28µF → 0.27µF (nearest value)
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Disabling the Thermistor Function
If the thermistor is not needed, connecting a resistor
between DCIN and NTC will disable it. The resistor should
be sized to provide at least 10µA with the minimum voltage
applied to DCIN and 10V at NTC. Do not exceed 30µA.
Generally, a 301k resistor will work for DCIN less than 15V.
A 499k resistor is recommended for DCIN between 15V
and 24V.
Using the LTC4008-1 (Refer to Figure 10)
The LTC4008-1 is intended for applications where the
battery power is fully isolated from the charger and wall
adapter connections. An example application is a system
with multiple batteries such that the charger’s output
power passes through a downstream power path or
selector system. Typically these systems also provide
isolation and control the wall adapter power. To reduce
cost in such systems, the LTC4008-1 removes the re-
quirement for the wall adapter INFET function or blocking
diode. Wall adapter or ACP detection is also removed
along with micropower shutdown mode. Asserting of the
SHDN pin only puts the charger into standby mode.
Failure to isolate the battery power from ANY of the
LTC4008-1 pins when wall adapter power is removed or
lost will only drain the battery at the IC quiescent current
rate. More specifically, high current is drawn from the
DCIN, CLP and CLN pins. Suggested devices to isolate
power from the charger include simple diodes, electrical
or mechanical switches or power path control devices
such as the LTC4412 low loss PowerPathTM controller.
Because the switcher operation is continuous under nearly
all conditions, precautions must be taken to prevent the
charger from boosting the input voltage above maximum
voltage values on the input capacitors or adapter. Z1 and
Q3 will shut down the charger if the input voltage exceeds
a safe value.
PowerPath is a trademark of Linear Technology Corporation.
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DCIN
0V TO 28V
C1
0.1µF
R8
140k
0.25%
R12
100k
ICL
FAULT
FLAG
R10 32.4k 1%
Z1
Q3
2N7002
R13
1.5k
C7
0.47µF
THERMISTOR
10k
NTC
RCL
0.02Ω
1%
SYSTEM
LOAD
BATMON
DCIN
LTC4008-1
VFB
VLOGIC
R11
100k
C4
15nF R1
4.99k
1%
RT
150k
R9
15k
0.25%
R7
6.04k
1%
C6
0.12µF
ICL
CLP
SHDN
CLN
FAULT
TGATE
FLAG
BGATE
NTC
PGND
RT
CSP
ITH
BAT
GND
C2
20µF
L1
10µH
Q1
Q2
D2
RSENSE
0.025Ω
1%
Q4
D1
C3
20µF
R26
150k
Li-Ion
BATTERY
R4 3.01k 1%
R5 3.01k 1%
PROG
C5
0.0047µF
R6
28.7k
1%
Q5
2N7002
CHARGE
4008 F10
D1: MBRS130T3
D2: SBM540
Q1: Si4431BDY
Q2: FDC645N
Q4: Si7423DN
Z1 VALUE SIZED FOR ABSOLUTE MAXIMUM ADAPTER VOLTAGE
Figure 10. Typical LTC4008-1 Application (12.3V/4A)
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19
LTC4008
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APPLICATIO S I FOR ATIO
PCB Layout Considerations
For maximum efficiency, the switch node rise and fall
times should be minimized. To prevent magnetic and
electrical field radiation and high frequency resonant problems, proper layout of the components connected to the IC
is essential. (See Figure 11.) Here is a PCB layout priority
list for proper layout. Layout the PCB using this specific
order.
1. Input capacitors need to be placed as close as possible
to switching FET’s supply and ground connections.
Shortest copper trace connections possible. These
parts must be on the same layer of copper. Vias must
not be used to make this connection.
2. The control IC needs to be close to the switching FET’s
gate terminals. Keep the gate drive signals short for a
clean FET drive. This includes IC supply pins that connect to the switching FET source pins. The IC can be
placed on the opposite side of the PCB relative to above.
3. Place inductor input as close as possible to switching
FET’s output connection. Minimize the surface area of
this trace. Make the trace width the minimum amount
needed to support current—no copper fills or pours.
Avoid running the connection using multiple layers in
parallel. Minimize capacitance from this node to any
other trace or plane.
4. Place the output current sense resistor right next to
the inductor output but oriented such that the IC’s
current sense feedback traces going to resistor are not
long. The feedback traces need to be routed together
as a single pair on the same layer at any given time with
smallest trace spacing possible. Locate any filter
component on these traces next to the IC and not at the
sense resistor location.
5. Place output capacitors next to the sense resistor
output and ground.
6. Output capacitor ground connections need to feed
into same copper that connects to the input capacitor
ground before tying back into system ground.
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20
LTC4008
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APPLICATIO S I FOR ATIO
PCB Layout Considerations (cont.)
7. Connection of switching ground to system ground or
internal ground plane should be single point. If the
system has an internal system ground plane, a good
way to do this is to cluster vias into a single star point
to make the connection.
8. Route analog ground as a trace tied back to IC ground
(analog ground pin if present) before connecting to
any other ground. Avoid using the system ground
plane. CAD trick: make analog ground a separate
ground net and use a 0Ω resistor to tie analog ground
to system ground.
9. A good rule of thumb for via count for a given high
current path is to use 0.5A per via. Be consistent.
10. If possible, place all the parts listed above on the same
PCB layer.
11. Copper fills or pours are good for all power connections except as noted above in Rule 3. You can also use
copper planes on multiple layers in parallel too—this
helps with thermal management and lower trace inductance improving EMI performance further.
12. For best current programming accuracy provide a
Kelvin connection from RSENSE to CSP and BAT. See
Figure 12 as an example.
It is important to keep the parasitic capacitance on the RT,
CSP and BAT pins to a minimum. The traces connecting
these pins to their respective resistors should be as short
as possible.
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21
LTC4008
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APPLICATIO S I FOR ATIO
SWITCH NODE
L1
VBAT
VIN
C2
HIGH
FREQUENCY
CIRCULATING
PATH
D1
C3
BAT
4008 F11
Figure 11. High Speed Switching Path
DIRECTION OF CHARGING CURRENT
RSENSE
4008 F12
CSP
BAT
Figure 12. Kelvin Sensing of Charging Current
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22
LTC4008
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PACKAGE DESCRIPTION
GN Package
20-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.337 – .344*
(8.560 – 8.738)
.045 ±.005
20 19 18 17 16 15 14 13 12
.254 MIN
.150 – .165
.0165 ± .0015
11
.229 – .244
(5.817 – 6.198)
.058
(1.473)
REF
.150 – .157**
(3.810 – 3.988)
.0250 BSC
1
RECOMMENDED SOLDER PAD LAYOUT
.015 ± .004
× 45°
(0.38 ± 0.10)
.0075 – .0098
(0.19 – 0.25)
2 3
4
5 6
7
8
.0532 – .0688
(1.35 – 1.75)
9 10
.004 – .0098
(0.102 – 0.249)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
.008 – .012
(0.203 – 0.305)
TYP
.0250
(0.635)
BSC
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
GN20 (SSOP) 0204
4008fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC4008
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TYPICAL APPLICATIO
NiMH/4A Battery Charger
Q3
INPUT SWITCH
DCIN
0V TO 20V
C1
0.1µF
R8
147k
0.25%
VLOGIC
R11
100k
R12
100k
ICL
ACP
DCIN
VFB
INFET
ICL
LTC4008 CLP
FLAG
R10 32.4k 1%
R9
C7
13.3k
0.47µF 0.25%
RT
150k
R7
6.04k
1%
FAULT
TGATE
FLAG
BGATE
NTC
PGND
RT
CSP
ITH
BAT
GND
C4
0.1µF
R1 4.99k 1%
RCL
0.02Ω
1%
L1
10µH
Q1
Q2
RSENSE
0.025Ω
1%
D1
C3
20µF
NiMH
BATTERY
PACK
R4 3.01k 1%
R5 3.01k 1%
PROG
C5
0.0047µF
R6
26.7k
1%
C6
0.12µF
SYSTEM
LOAD
C2
20µF
CLN
ACP/SHDN
FAULT
THERMISTOR
10k
NTC
BATMON
CHARGING
CURRENT
MONITOR
D1: MBRS130T3
Q1: Si4431BDY
Q2: FDC645N
4008 TA02
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT 1511
3A Constant-Current/Constant-Voltage Battery Charger
High Efficiency, Minimum External Components to Fast Charge Lithium,
NIMH and NiCd Batteries
LT1513
Sepic Constant- or Programmable- Current/ConstantVoltage Battery Charger
Charger Input Voltage May be Higher, Equal to or Lower Than Battery Voltage,
500kHz Switching Frequency
LT1571
1.5A Switching Charger
1- or 2-Cell Li-Ion, 500kHz or 200kHz Switching Frequency, Termination Flag
LTC1628-PG
2-Phase, Dual Synchronous Step-Down Controller
Minimizes CIN and COUT, Power Good Output, 3.5V ≤ VIN ≤ 36V
LTC1709
Family
2-Phase, Dual Synchronous Step-Down Controller
with VID
Up to 42A Output, Minimum CIN and COUT, Uses Smallest Components for
Intel and AMD Processors
LTC1729
Li-Ion Battery Charger Termination Controller
Trickle Charge Preconditioning, Temperature Charge Qualification, Time or
Charge Current Termination, Automatic Charger and Battery Detection, and
Status Output
LT1769
2A Switching Battery Charger
Constant-Current/Constant-Voltage Switching Regulator, Input Current
Limiting Maximizes Charge Current
LTC1778
Wide Operating Range, No RSENSETM Synchronous
Step-Down Controller
2% to 90% Duty Cycle at 200kHz, Stable with Ceramic COUT
LTC1960
Dual Battery Charger/Selector with SPI Interface
Simultaneous Charge or Discharge of Two Batteries, DAC Programmable
Current and Voltage, Input Current Limiting Maximizes Charge Current
LTC3711
No RSENSE Synchronous Step-Down Controller
with VID
3.5V ≤ VIN ≤ 36V, 0.925V ≤ VOUT ≤ 2V, for Transmeta, AMD and Intel
Mobile Processors
LTC4006
Small, High Efficiency, Fixed Voltage, Lithium-Ion
Battery Charger with Termination
Complete Charger for 3- or 4-Cell Li-Ion Batteries, AC Adapter Current Limit
and Thermistor Sensor, 16-Pin Narrow SSOP Package
LTC4007
High Efficiency, Programmable Voltage
Battery Charger with Termination
Complete Charger for 3- or 4-Cell Li-Ion Batteries, AC Adapter Current Limit,
Thermistor Sensor and Indicator Outputs
LTC4100
Smart Battery Charger Controller
SMBus Rev 1.1 Compliant
®
No RSENSE is a trademark of Linear Technology Corporation.
4008fa
24 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
LT/LT 0805 REV A • PRINTED IN USA
© LINEAR TECHNOLOGY CORPORATION 2003