LINER LTC6081CDHC-TR Precision dual/quad cmos rail-to-rail input/ output amplifi er Datasheet

LTC6081/LTC6082
Precision Dual/Quad
CMOS Rail-to-Rail Input/
Output Amplifiers
DESCRIPTION
FEATURES
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Maximum Offset Voltage: 70μV (25°C)
Maximum Offset Drift: 0.8μV/°C
Maximum Input Bias: 1pA (25°C) 40pA (TA ≤ 85°C)
Open Loop Voltage Gain: 120dB Typ
Gain Bandwidth Product: 3.6MHz
CMRR: 100dB Min
PSRR: 98dB Min
0.1Hz to 10Hz Noise: 1.3μVP-P
Supply Current: 330μA
Rail-to-Rail Inputs and Outputs
Unity Gain Stable
2.7V to 5.5V Operation Voltage
Dual LTC6081 in 8-Lead MSOP and 10-Lead DFN10
Packages; Quad LTC6082 in 16-Lead SSOP and DFN
Packages
The LTC®6081/LTC6082 are dual/quad low offset, low drift,
low noise CMOS operational amplifiers with rail-to-rail
input/output swing.
The 70μV maximum offset, 1pA input bias current, 120dB
open loop gain and 1.3μVP-P 0.1Hz to 10Hz noise make
it perfect for precision signal conditioning. The LTC6081/
LTC6082 features 100dB CMRR and 98dB PSRR.
Each amplifier consumes only 330μA of current on a 3V
supply. The 10-lead DFN has an independent shutdown
function that reduces each amplifier’s supply current
to 1μA.
LTC6081/LTC6082 is specified for power supply voltages
of 3V and 5V from –40°C to 125°C. The dual LTC6081 is
available in 8-lead MSOP and 10-lead DFN10 packages.
The quad LTC6082 is available in 16-lead SSOP and DFN
packages.
APPLICATIONS
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, LTC, LT and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Photodiode Amplifier
Strain Gauge
High Impedance Sensor Amplifier
Microvolt Accuracy Threshold Detection
Instrumentation Amplifiers
Thermocouple Amplifiers
TYPICAL APPLICATION
Shock Sensor Amplifier (Accelerometer)
VOS Drift Histogram
V+ 0.1μF
8.2pF
MURATA
PKGS-00LD
770pF
0° SENSOR
1G
2M
2M
3.9pF
3.9pF
+
1/2
LTC6081
VOUT = 109mV/g
BW ~ 2.2kHz
–
1M
V–
0.1μF
1M
10k
60812 TA01
47pF
NUMBER OF AMPLIFIERS (OUT OF 100)
30
25
LTC6081MS8
TA = –40°C TO 125°C
VS = 3V
VCM = 0.5V
20
15
10
5
0
–0.20
–0.10
0
0.10
VOSDRIFT (μV/°C)
0.20
0.30
60812 TA01b
60812f
1
LTC6081/LTC6082
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Total Supply Voltage (V+ to V–) ...................................6V
Input Voltage...................................................... V– to V+
Output Short Circuit Duration (Note 2) ............ Indefinite
Operating Temperature Range (Note 3)
LTC6081C, LTC6082C .......................... –40°C to 85°C
LTC6081I, LTC6082I ............................ –40°C to 85°C
LTC6081H, LTC6082H........................ –40°C to 125°C
(H Temperature Range Not Available in DFN Package)
Specified Temperature Range (Note 4)
LTC6081C, LTC6082C .............................. 0°C to 70°C
LTC6081I, LTC6082I ............................ –40°C to 85°C
LTC6081H, LTC6082H........................ –40°C to 125°C
Junction Temperature
DFN Packages ................................................... 125°C
All Other Packages ............................................ 150°C
Storage Temperature Range
DFN Packages .................................... –65°C to 125°C
All Other Packages ............................. –65°C to 150°C
Lead Temperature (Soldering, 10 Sec) .................. 300°C
PIN CONFIGURATION
TOP VIEW
10 V +
OUTA
1
–INA
2
+INA
3
V–
4
7 +INB
SHDN_A
5
6 SHDN_B
9 OUTB
A
B
8 –INB
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 43°C/W
UNDERSIDE METAL CONNECTED TO V–
TOP VIEW
OUTA
–INA
+INA
V–
1
2
3
4
TOP VIEW
OUTA
1
16 OUTD
–INA
2
+INA
3
14 +IND
V+
4
13 V –
+INB
5
–INB
6
11 –INC
OUTB
7
10 OUTC
NC
8
9
B
D
C
B
V+
OUTB
–INB
+INB
MS8 PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 200°C/W
TOP VIEW
A
A
8
7
6
5
15 –IND
12 +INC
NC
DHC PACKAGE
16-LEAD (5mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 43°C/W
UNDERSIDE METAL CONNECTED TO V–
OUTA
1
–INA
2
+INA
3
14 +IND
V+
4
13 V –
+INB
5
–INB
6
11 –INC
OUTB
7
10 OUTC
NC
8
9
16 OUTD
A
B
D
C
15 –IND
12 +INC
NC
GN PACKAGE
16-LEAD PLASTIC SSOP
TJMAX = 150°C, θJA = 110°C/W
60812f
2
LTC6081/LTC6082
ORDER INFORMATION
LTC6081 C
DD
#
TR
PBF
LEAD FREE DESIGNATOR
PBF = Lead Free
Blank = Lead Tin Lead Finish
TAPE AND REEL
TR = Tape and Reel
Blank = Bulk
NUMBER SIGN
Required before Tape and Reel and Lead Free Orders
PACKAGE TYPE
DD = 10-Lead (3mm × 3mm) Plastic DFN
DHC = 16-Lead (5mm × 3mm) Plastic DFN
GN = 16-Lead Plastic SSOP
MS8 = 8-Lead Plastic MSOP
TEMPERATURE GRADE
C = Commercial Temperature Range (0°C to 70°C)
I = Industrial Temperature Range (–40°C to 85°C)
H = High Temperature Range (–40°C to 125°C)
(H grade not available for DD or DHC package)
PRODUCT PART NUMBER
LTC6081 (Precision Dual Amplifier)
LTC6082 (Precision Quad Amplifier)
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
60812f
3
LTC6081/LTC6082
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 3V, V– = 0V, VCM = 0.5V unless otherwise noted.
C, I SUFFIXES
SYMBOL PARAMETER
VOS
Offset Voltage
CONDITIONS
LTC6081MS8, LTC6082GN
LTC6081MS8, LTC6082GN
LTC6081DD, LTC6082DHC
LTC6081DD, LTC6082DHC
MIN
VCM = 0.5V, 2.5V
VCM = 0.5V, 2.5V
VCM = 0.5V, 2.5V
VCM = 0.5V, 2.5V
Input Bias Current
(Note 6)
IOS
Input Offset Current
●
–70
–90
–70
–90
●
ΔVOS ⁄ΔT Input Offset Voltage Drift
(Note 5)
IB
●
TYP
Input Referred Noise
In
Input Noise Current Density
(Note 7)
MIN
70
90
70
90
–70
–90
●
70
90
UNITS
μV
μV
μV
μV
±0.2
±0.8
μV/°C
0.2
1
40
0.2
1
500
pA
pA
100
pA
pA
0.1
0.1
15
Noise Density at f = 1kHz
Integrated Noise From 0.1Hz to 10Hz
MAX
±0.8
●
Input Common Mode Range
TYP
±0.2
●
en
H SUFFIX
MAX
13
1.3
13
1.3
nV/√Hz
μVP-P
0.5
0.5
fA/√Hz
V–
V+
V–
V+
V
CDIFF
Differential Input Capacitance
3
3
pF
CCM
Common Mode Input
Capacitance
7
7
pF
CMRR
Common Mode Rejection
Ratio
PSRR
VOUT
VCM = 0V to 1.5V
VCM = 0V to 1.5V
VCM = 0V to 3V
VCM = 0V to 3V
Power Supply Rejection Ratio VS = 2.7V to 5.5V
●
95
88
93
88
105
100
105
100
95
86
93
86
105
100
105
100
dB
dB
dB
dB
98
96
110
98
96
110
●
dB
dB
1
–32
–320
mV
mV
mV
●
Output Voltage, High, Either
Output Pin
No Load
ISOURCE = 0.5mA
ISOURCE = 5mA
●
●
Output Voltage, Low, Either
Output Pin (Referred to V–)
No Load
ISINK = 0.5mA
ISINK = 5mA
●
●
AVOL
Large-Signal Voltage Gain
RLOAD = 10k, 0.5V < VOUT < 2.5V
●
110
ISC
Output Short-Circuit Current
Source
Sink
●
●
17
17
SR
Slew Rate
AV = 1
GBW
Gain-Bandwidth Product
(fTEST = 50kHz)
RL = 100k
1
–35
–350
1
1
33
300
120
40
360
110
2.5
1.8
dB
15
15
1
●
120
3.6
2.5
1.5
mV
mV
mV
mA
mA
1
V/μs
3.6
MHz
MHz
Φ0
Phase Margin
RL = 10k
70
70
Deg
tS
Settling Time 0.1%
AV = 1, 1V Step
6
6
μs
IS
Supply Current
(Per Amplifier)
No Load
Shutdown Current
(Per Amplifier)
Shutdown, V⎯S⎯H⎯D⎯N ≤ 0.8V
Supply Voltage Range
Guaranteed by the PSRR Test
Channel Separation
fs = 10kHz, RL = 10k
VS
330
●
400
435
330
400
460
0.5
●
●
μA
μA
2
2.7
5.5
–120
μA
μA
2.7
5.5
–120
V
dB
60812f
4
LTC6081/LTC6082
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 3V, V– = 0V, VCM = 0.5V unless otherwise noted.
C, I SUFFIXES
SYMBOL PARAMETER
Shutdown Logic
CONDITIONS
⎯SH
⎯ D
⎯ N
⎯ High
⎯S⎯H⎯D⎯N Low
MIN
●
●
TYP
H SUFFIX
MAX
2
MIN
TYP
MAX
2
0.8
0.8
UNITS
V
V
THD
Total Harmonic Distortion
f = 10kHz, V+ = 3V, VOUT = 1VP-P, RL = 10k
–90
–90
dB
tON
Turn-On Time
V⎯S⎯H⎯D⎯N = 0.8V to 2V
10
10
μs
tOFF
Turn-Off Time
V⎯S⎯H⎯D⎯N = 2V to 0.8V
⎯S⎯H⎯D⎯N Pin Current
V⎯S⎯H⎯D⎯N = 0V
2
2
●
μs
2
μA
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test
conditions are V+ = 5V, V– = 0V, VCM = 0.5V unless otherwise noted.
C, I SUFFIXES
SYMBOL PARAMETER
VOS
Offset Voltage
CONDITIONS
LTC6081MS8, LTC6082GN
LTC6081MS8, LTC6082GN
LTC6081DD, LTC6082DHC
LTC6081DD, LTC6082DHC
MIN
VCM = 0.5V
VCM = 0.5V
VCM = 0.5V
VCM = 0.5V
IOS
●
–70
–90
–70
–90
●
ΔVOS ⁄ΔT Input Offset Voltage Drift
(Note 8)
IB
●
TYP
±0.2
Input Bias Current
Input Noise Current Density
(Note 7)
70
90
70
90
–70
–90
±0.8
●
MAX
70
90
UNITS
μV
μV
μV
μV
±0.8
μV/°C
500
pA
pA
100
pA
pA
0.2
0.1
15
f = 1kHz
0.1Hz to 10Hz
Input Common Mode Range
TYP
±0.2
0.1
●
In
MIN
40
Input Offset Current
Input Referred Noise
MAX
0.2
●
en
H SUFFIX
13
1.3
13
1.3
nV/√Hz
μVP-P
0.5
0.5
fA/√Hz
V–
V+
V–
V+
V
CDIFF
Differential Input Capacitance
3
3
pF
CCM
Common Mode Input
Capacitance
7
7
pF
CMRR
Common Mode Rejection
Ratio
PSRR
VOUT
AVOL
VCM = 0V to 3.5V
VCM = 0V to 3.5V
VCM = 0V to 5V
Power Supply Rejection Ratio VS = 2.7V to 5.5V
●
●
100
95
86
110
110
95
100
94
86
110
110
95
dB
dB
dB
98
96
110
98
96
110
●
dB
dB
1
–24
–200
mV
mV
mV
Output Voltage, High, Either
Output Pin (Referred to V+)
No Load
ISOURCE = 0.5mA
ISOURCE = 5mA
●
●
Output Voltage, Low, Either
Output Pin (Referred to V–)
No Load
ISINK = 0.5mA
ISINK = 5mA
●
●
Large-Signal Voltage Gain
RLOAD = 10k, 0.5V < VOUT < 4.5V
●
1
–25
–220
1
1
27
210
110
120
32
240
110
120
mV
mV
mV
dB
60812f
5
LTC6081/LTC6082
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 5V, V– = 0V, VCM = 0.5V unless otherwise noted.
C, I SUFFIXES
SYMBOL PARAMETER
CONDITIONS
ISC
Output Short-Circuit Current
Source
Sink
SR
Slew Rate
AV = 1
GBW
Gain-Bandwidth Product
(fTEST = 50kHz)
RL = 100k
Φ0
Phase Margin
RL = 10k
tS
Settling Time 0.1%
AV = 1, 1V Step
IS
Supply Current
(Per Amplifier)
No Load
Shutdown Current
(Per Amplifier)
Supply Voltage Range
VS
MIN
●
●
TYP
H SUFFIX
MAX
24
24
1
●
2.5
1.8
mA
mA
3.5
MHz
MHz
70
70
Deg
6
6
μs
3.5
340
2.5
1.5
●
6
Guaranteed by the PSRR Test
●
2.7
●
●
3.5
fs = 10kHz, RL = 10k
UNITS
V/μs
Shutdown, V⎯S⎯H⎯D⎯N ≤ 1.2V
⎯S⎯H⎯D⎯N High
⎯S⎯H⎯D⎯N Low
MAX
1
425
465
Channel Separation
TYP
21
21
●
Shutdown Logic
MIN
5.5
340
425
490
μA
μA
μA
2.7
–120
5.5
–120
dB
3.5
1.2
V
1.2
V
V
THD
Total Harmonic Distortion
f = 10kHz, V+ = 5V, VOUT = 2VP-P, RL = 10k
–90
–90
dB
tON
Turn-On Time
V⎯S⎯H⎯D⎯N = 1.2V to 3.5V
10
10
μs
tOFF
Turn-Off Time
V⎯S⎯H⎯D⎯N = 3.5V to 1.2V
2
2
μs
⎯S⎯H⎯D⎯N Pin Current
V⎯S⎯H⎯D⎯N = 0V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: A heat sink may be required to keep the junction temperature
below the absolute maximum. This depends on the power supply voltage
and how many amplifiers are shorted.
Note 3: The LTC6081C/LTC6082C and LTC6081I/LTC6082I are guaranteed
functional over the operating temperature range of –40°C to 85°C. The
LTC6081H/LTC6082H are guaranteed functional over the operating
temperature range of –40°C to 125°C.
Note 4: The LTC6081C/LTC6082C are guaranteed to meet specified
performance from 0°C to 70°C. The LTC6081C/LTC6082C are designed,
●
2
μA
characterized and expected to meet specified performance from –40°C
to 85°C but are not tested or QA sampled at these temperatures. The
LTC6081I/LTC6082I are guaranteed to meet specified performance from
–40°C to 85°C. The LTC6081H/LTC6082H are guaranteed to meet specified
performance from –40°C to 125°C.
Note 5: Input offset drift is computed from the limits of the VOS test
divided by the temperature range. This is a conservative estimate of worst
case drift. Consult the Typical Performance Characteristics section for
more information on input offset drift.
Note 6: IB guaranteed by the VS = 5V test.
Note 7: Current noise is calculated from In = √2qIB, where q = 1.6 • 10–19
coulomb.
Note 8: VOS drift is guaranteed by the VS = 3V test.
60812f
6
LTC6081/LTC6082
TYPICAL PERFORMANCE CHARACTERISTICS
VOS Drift Histogram
20
15
10
5
20
10
10
–0.10
0
0.10
VOSDRIFT (μV/°C)
5
0
–0.30
0.30
0.20
–0.10
0
0.10
VOSDRIFT (μV/°C)
–20
–50 –30 –10 10 30 50 70 90 110 130
TEMPERATURE (°C)
0.20
60812 G02
60812 G03
VOS vs VCM
40
LTC6081MS8
TA = 25°C
VS = 3V
VCM = 0.5V
VOS vs VCM
140
VS = 3V
TA = 25°C
REPRESENTATIVE PARTS
30
100
VOS (μV)
80
10
0
–10
6
2
–30
0
–9.5
–40
–5.5
–1.5
2.5
VOS (μV)
6.5
TA = 125°C
50
TA = 55°C
0
–50
SOURCING CURRENT
–6
–4
1.0
1.5
2.0
VCM (V)
2.5
3.0
0
SINKING
CURRENT
0
2
–2
OUTPUT CURRENT (mA)
4
3
4
5
Noise Voltage vs Frequency
110
TA = 25°C
VCM = 0.5V
TA = 25°C
100
20
90
VS = 5V
15
10
VS = 3V
5
80
70
60
50
40
VS = 5V
VCM = 0.5V
30
20
0
–5
60812 G07
2
60812 G06
VS = 3V
VCM = 0.5V
10
6
1
VCM (V)
Warm-Up Drift vs Time
25
TA = 25°C
100
–40
0.5
60812 G05
CHANGE IN OFFSET VOLTAGE (μV)
150
–20
60812 G04
VOS vs Output Current
VS = 5V
VCM = 2.5V
40
0
0
10.5
60
20
–20
4
VS = 5V
TA = 25°C
REPRESENTATIVE PARTS
120
20
8
VOS (μV)
–0.20
60812 G01
10
–100
0
–5
12
200
5
–10
VOS (μV)
NUMBER OF AMPS (OUT OF 100)
14
15
15
VOS Histogram
16
LTC6081MS8
VS = 3V
VCM = 0.5V
REPRESENTATIVE PARTS
20
–15
0
–0.20
18
LTC6081DFN
TA = –40°C TO 125°C
VS = 3V
VCM = 0.5V
VOS (μV)
LTC6081MS8
TA = –40°C TO 125°C
VS = 3V
VCM = 0.5V
VOS vs Temperature
25
NOISE VOLTAGE (nV/√Hz)
25
VOS Drift Histogram
25
NUMBER OF AMPS (OUT OF 100)
NUMBER OF AMPS (OUT OF 100)
30
0
0
5 10 15 20 25 30 35 40 45 50 55 60
TIME AFTER POWER UP (s)
60812 G08
1
10
100
1k
FREQUENCY (Hz)
10k
100k
60812 G09
60812f
7
LTC6081/LTC6082
TYPICAL PERFORMANCE CHARACTERISTICS
0.1Hz to 10Hz Output
Voltage Noise
300
280
260
240
220
200
180
160
140
120
100
80
60
40
20
0
NMOS INPUTS
VCM = 2.5V
1
10
100
1k
FREQUENCY (Hz)
10k
0
100k
TA = 25°C
VS = 3V
VCM = 2.5V
OUTPUT NOISE (1μV/DIV)
PMOS INPUTS
VCM = 0.5V
5
10 15 20 25 30 35 40 45 50
TIME (s)
60812 G10
IBIAS vs VCM
500
LTC6081MS8
VS = 5V
30
300
200
IBIAS (pA)
10
TA = 70°C
0
–10
40
60
80
100
TEMPERATURE (°C)
120
0
TA = 85°C
–200
–30
–300
–40
–400
–500
–50
20
100
–100
–20
0.1
140
0
60812 G13
60812 G15
Small Signal Transient
Overshoot vs CL
55
50
45
200μs/DIV
TA = 25°C
VS = ±1.5V
RL = 10k
CL = 100pF
20mV/DIV
GND
60812 G16
20μs/DIV
TA = 25°C
VS = ±1.5V
RL = 10k
CL = 100pF
60812 G17
TA = 25°C
VS = 3V
VCM = 0.5V
40
OVERSHOOT (%)
GND
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VCM (V)
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VCM (V)
60812 G14
Large Signal Transient
0.5V/DIV
LTC6081MS8
VS = 5V
TA = 125°C
400
20
100
IBIAS (pA)
INPUT BIAS CURRENT (pA)
VS = 5V
VCM = 2.5V
1
10 15 20 25 30 35 40 45 50
TIME (s)
60812 G12
IBIAS vs VCM
40
10
5
0
60812 G11
Input Bias Current vs Temperature
1000
0.1Hz to 10Hz Output
Voltage Noise
TA = 25°C
VS = 3V
VCM = 0.5V
VS = 3V
TA = 25°C
OUTPUT NOISE (500nV/DIV)
NOISE VOLTAGE (nV/√Hz)
Noise Voltage vs Frequency
AV = 1
35
30
AV = 10
25
20
15
10
5
0
10
100
1000
CAPACITIVE LOAD (pF)
10000
60812 G18
60812f
8
LTC6081/LTC6082
TYPICAL PERFORMANCE CHARACTERISTICS
VCM = 0.5V
PER AMPLIFIER
TA = 25°C
NO BYPASS CAPACITOR
SUPPLY CURRENT OPAMP (μA)
VS = 5V
350
VS = 3V
330
310
290
270
Output Impedance vs Frequency
1200
3
SUPPLY VOLTAGE
800
2
400
1
100
0
200
300
VS = 3V
TA = 25°C
–30
VS = 5V
TA = 25°C
0.5
1.0
1.5
2.0
OUTPUT VOLTAGE (V)
2.5
RL = 100k
–10
RL = 10k
–20
RL = 2k
180
GAIN
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT VOLTAGE (V)
120
100
0
80
–180
GAIN
10k
1M
100k
FREQUENCY (Hz)
10M
1k
10k
–270
1M
100k
FREQUENCY (Hz)
10M
PSRR vs Frequency
120
VS = 5V
VCM = 0.5V
TA = 25°C
RL = 1k
VS = 5V
VCM = 0.5V
TA = 25°C
100
80
60
40
60
40
20
20
–360
0
0
–20
100
–360
100M
60812 G24
–270
–450
100M
60812 G25
CMRR (dB)
–90
0
–180
VS = 5V
VCM = 0.5V
TA = 25°C
PSRR (dB)
90
PHASE (DEG)
20
1k
–90
60812 G23
40
VS = 5V
VCM = 0.5V
TA = 25°C
CL = 200pF
0
CMRR vs Frequency
RL = 10k
RL = 100k
90
0
–40
0
Open Loop Gain vs Frequency
PHASE
180
20
–20
60812 G22
60
270
RL = 10k
RL = 100k
PHASE
0
3.0
100M
40
–40
0
10M
Open Loop Gain vs Frequency
–30
–40
10k 100k
1M
FREQUENCY (Hz)
60
GAIN (dB)
INPUT VOLTAGE (μV)
INPUT VOLTAGE (μV)
RL = 2k
1k
PHASE (DEG)
RL = 10k
–20
VS = 3V
VCM = 0.5V
TA = 25°C
60812 G21
10
RL = 100k
AV = 1
0.01
100
Open Loop Gain
–10
AV = 10
1
60812 G20
10
GAIN (dB)
0
500
400
20
0
AV = 100
10
TIME (μs)
Open Loop Gain
20
100
0.1
0
60812 G19
–40
1000
SUPPLY CURRENT
250
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
–20
4
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (μA)
370
Supply Current vs Time
1600
OUTPUT IMPEDANCE (Ω)
Supply Current vs Temperature
390
1k
10k 100k
1M
FREQUENCY (Hz)
10M
100M
60812 G26
–20
100
1k
10k 100k
1M
FREQUENCY (Hz)
10M
100M
60812 G27
60812f
9
LTC6081/LTC6082
TYPICAL PERFORMANCE CHARACTERISTICS
Output Voltage Swing vs
Load Current
Channel Separation vs Frequency
CHANNEL SEPARATION (dB)
– 40
– 60
– 80
–100
–120
–140
100
1k
10k 100k
1M
FREQUENCY (Hz)
10M
100M
–20
VS = 3V
+VS –0.5 V = 0.5V
CM
SOURCE
+VS –1.0
–40
+VS –1.5
+VS –2.0
–VS 2.0
–VS 1.5
–VS 1.0
–VS 0.5
–VS 0
0.01
VS = 5V
AV = 1
RL = 10k
VOUT = 2VP-P
–30
DISTORTION (dBc)
VS = 3V
VCM = 0.5V
RL = 10k
–20
Distortion vs Frequency
+VS
OUTPUT VOLTAGE SWING (V)
(REFERRED TO SUPPLY VOLTAGE)
0
TA = 125°C
TA = 25°C
TA = –55°C
–50
2ND
–60
3RD
–70
–80
SINK
1
10
0.1
LOAD CURRENT (mA)
–90
100
–100
1
60789 G29
10
100
FREQUENCY (kHz)
1000
60812 G30
60812 G28
PIN FUNCTIONS
OUT: Amplifier Output
–IN: Inverting Input
+IN: Noninverting Input
V+: Positive Supply
V–: Negative Supply
⎯S⎯H⎯D⎯N⎯_⎯A: Shutdown Pin of Amplifier A, active low and only
valid for LTC6081DD. An internal current source pulls the
pin to V+ when floating.
⎯S⎯H⎯D⎯N⎯_⎯B: Shutdown Pin of Amplifier B, active low and only
valid for LTC6081DD. An internal current source pulls the
pin to V+ when floating.
NC: Not internally connected.
Exposed Pad: Connected to V–.
60812f
10
LTC6081/LTC6082
APPLICATIONS INFORMATION
Preserving Input Precision
Rail-to-Rail Input
Preserving input accuracy of the LTC6081/LTC6082 requires that the application circuit and PC board layout do
not introduce errors comparable or greater than the 5μV
typical offset of the amplifiers. Temperature differentials
across the input connections can generate thermocouple
voltages of 10’s of microvolts so the connections to the
input leads should be short, close together and away from
heat dissipating components. Air current across the board
can also generate temperature differentials.
The input stage of LTC6081/LTC6082 combines both PMOS
and NMOS differential pairs, extending its input common
mode voltage range to both positive and negative supply
voltages. At high input common mode range, the NMOS
pair is on. At low common mode range, the PMOS pair is
on. The transition happens when the common voltage is
between 1.3V and 0.9V below the positive supply. LTC6081
has better low frequency noise performance with PMOS
input on due to its lower flicker noise (see Voltage Noise
vs Frequency and 0.1Hz to 10Hz Input Voltage Noise in
Typical Performance Characteristics).
Capacitive Load
LTC6081/LTC6082 can drive capactive load up to 200pF in
unity gain. The capacitive load driving capability increases
as the amplifier is used in higher gain configurations. A
small series resistance between the output and the load
further increases the amount of capacitance the amplifier
can drive.
⎯S⎯H⎯D⎯N Pins
Pins 5 and 6 are used for power shutdown on the LTC6081
in the DD package. If they are floating, internal current
sources pull Pins 5 and 6 to V+ and the amplifiers operate
normally. In shutdown, the amplifier output is high impedance, and each amplifier draws less than 2μA current.
Thermal Hysteresis
Figure 1 shows the input offset voltage hysteresis of the
LTC6081IMS8 for 3 thermal cycles from –45°C to 90°C.
The typical offset shift is ±4μV. The data was taken with
the ICs in stress free sockets. Mounting to PC boards
may cause additional hysteresis due to mechanical stress.
The LTC6081 will meet offset voltage specifications in the
electrical characteristics table even after 15μV of additional
error from thermal hysteresis.
0.30
PERCENTAGE OF UNITS
The extremely low input bias currents (0.1pA typical) allow high accuracy to be maintained with high impedance
sources and feedback resistors. Leakage currents on the
PC board can be higher than the input bias current. For
example, 10GΩ of leakage between a 5V supply lead and
an input lead will generate 500pA! Surround the input
leads with a guard ring driven to the same potential as the
input common mode voltage to avoid excessive leakage
in high impedance applications.
VOS CHANGE AFTER 3 THERMAL CYCLES
VCM = 0.5V
+
0.25 V = 3V
300 UNITS
0.20
0.15
0.10
0.5
0
–15 –12 –9 –6 –3 0 3 6
VOS CHANGE (μV)
9
12 15
60812 F01
Figure 1. VOS Thermal Hysteresis of LTC6081MS8
60812f
11
LTC6081/LTC6082
APPLICATIONS INFORMATION
PC Board Layout
Mechanical stress on a PC board and soldering-induced
stress can cause the VOS and VOS drift to shift. The DD
and DHC packages are more sensitive to stress. A simple
way to reduce the stress-related shifts is to mount the IC
near the short edge of the PC board, or in a corner. The
board edge acts as a stress boundary, or a region where
the flexure of the board is minimum. The package should
always be mounted so that the leads absorb the stress
and not the package. The package is generally aligned
with the leads perpendicular to the long side of the PC
board (see Figure 2).
The most effective technique to relieve the PC board stress
is to cut slots in the board around the op amp. These slots
can be cut on three sides of the IC and the leads can exit on
the fourth side. Figure 2 shows the layout of a LTC6081DD
with slots at three sides.
LONG DIMENSION
SLOTS
60812 F02
Figure 2. Vertical Orientation of LTC6081DD with Slots
60812f
12
LTC6081/LTC6082
SIMPLIFIED SCHEMATIC
Simplified Schematic of the Amplifier
V+
R1
M10
R2
M11
M8
C1
I1
V
+
V+
I2
–
–
1μA
A1
VBIAS
D4
M5
V+
+IN
V+
OUTPUT
CONTROL
M6 M7
M1 M2
V–
D8
V–
D5
A2
+
–
BIAS
GENERATION
V–
C2
D1
NOTE: SHDN IS ONLY AVAILABLE
IN THE DFN10 PACKAGE
V–
V–
OUT
D6
–IN
D2
SHDN
D7
V+
D3
M3
M4
M9
R3
R4
60812 SS
60812f
13
LTC6081/LTC6082
TYPICAL APPLICATIONS
Low Side Current Sense
100k
15pF
VDD
V+
I
–
LOAD
1/2
LTC6081
VOUT = RSH • I • 101
+
RSH
eNOISE = 3μVP-P, RTI
BW ~ 1kHz
1k
60812 TA03
Two Op-Amp Instrumentation Amplifier
GAIN
TRIM
1.96k
100k
100k
V+ 0.1μF
CMRR
TRIM
1M
976k
–
50k
1/2
LTC6081
–
VIN
+
+
100k
–
1/2
LTC6081
VOUT = 1011 • VIN
+
V–
0.1μF
60812 TA04
60812f
14
LTC6081/LTC6082
TYPICAL APPLICATIONS
Thermocouple Amplifier
5V 0.1μF
1M
+
1μF
1M
1/2
LTC6081
VOUT = 10mV/°C
0°C TO 500°C
–
5V
LT1025
2.49M
K
R–
10k
100pF
SENSOR: OMEGA 5TC-TT-K-30-36 K-TYPE THERMOCOUPLE
1M RESISTORS PROTECT CIRCUIT TO ±350V WITH NO PHASE REVERSAL OF AMPLIFIER OUTPUT
1pA MAX IBIAS TRANSLATES TO 0.05°C ERROR
20μV VOS → 0.5°C OFFSET
60812 TA05
Precision Nanoamp Bidirectional Current Source
100k
+
VIN
1/4
LTC6082
100Ω
–
1k
GAIN
TRIM
100Ω
0.01μF
5k
97.6k
100k
10-TURN
0.1μF
2.5V
10mΩ
+
1/4
LTC6082
–
–
100k
1/4
LTC6082
3.9pF
+
100k
0.1μF
IOUT = –1nA → 1nA FOR
VIN = –10V → 10V
TOTAL ERROR <±1% (10pA)
LOAD
–2.5V
IOUT
60812 TA06
60812f
15
LTC6081/LTC6082
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699)
R = 0.115
TYP
6
0.38 ± 0.10
10
0.675 ±0.05
3.50 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
3.00 ±0.10
(4 SIDES)
PACKAGE
OUTLINE
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
(DD) DFN 1103
5
0.25 ± 0.05
0.200 REF
0.50
BSC
2.38 ±0.05
(2 SIDES)
1
0.75 ±0.05
0.00 – 0.05
0.25 ± 0.05
0.50 BSC
2.38 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
60812f
16
LTC6081/LTC6082
PACKAGE DESCRIPTION
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706)
0.65 ±0.05
3.50 ±0.05
1.65 ±0.05
2.20 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
4.40 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
TYP
5.00 ±0.10
(2 SIDES)
R = 0.20
TYP
3.00 ±0.10
(2 SIDES)
9
0.40 ± 0.10
16
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
(DHC16) DFN 1103
8
0.200 REF
1
0.25 ± 0.05
0.50 BSC
0.75 ±0.05
4.40 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
60812f
17
LTC6081/LTC6082
PACKAGE DESCRIPTION
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.189 – .196*
(4.801 – 4.978)
.045 ±.005
16 15 14 13 12 11 10 9
.254 MIN
.009
(0.229)
REF
.150 – .165
.229 – .244
(5.817 – 6.198)
.0165 ± .0015
.150 – .157**
(3.810 – 3.988)
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
1
.015 ± .004
× 45°
(0.38 ± 0.10)
.007 – .0098
(0.178 – 0.249)
.0532 – .0688
(1.35 – 1.75)
2 3
4
5 6
7
8
.004 – .0098
(0.102 – 0.249)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
.008 – .012
(0.203 – 0.305)
TYP
.0250
(0.635)
BSC
GN16 (SSOP) 0204
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
60812f
18
LTC6081/LTC6082
PACKAGE DESCRIPTION
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.42 ± 0.038
(.0165 ± .0015)
TYP
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.65
(.0256)
BSC
8
7 6 5
0.52
(.0205)
REF
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
1
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
2 3
4
1.10
(.043)
MAX
0.86
(.034)
REF
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
BSC
0.127 ± 0.076
(.005 ± .003)
MSOP (MS8) 0204
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
60812f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC6081/LTC6082
TYPICAL APPLICATION
Single Supply Strain Gauge Amplifier
3V
CMRR
TRIM
350Ω
10M
9.76M
0.01μF
10k
100Ω
3.2V 0.1μF
350Ω
3V
100k
500k
0.1μF
LT1790B
1.25V
1/2
LTC6081
10M
–
1/2
LTC6081
+
1.25V
–
10M
AV = 1001
+
SENSOR: OMEGA SG-3/350-LY41 STRAIN GAUGE
60812 TA02
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1678/LT1679
Dual/Quad Precision Op Amps
Low Noise, 2.7V to 36V Operation
LTC2050
Zero-Drift Op Amp
2.7V Operation, SOT-23 Package
LTC2051/LTC2052
Dual/Quad Zero-Drift Op Amps
MS8/GN16 Packages
LTC2054/LTC2055
Single/Dual Zero-Drift Op Amp
Micropower, SOT-23 and DFN Packages
LTC6078/LTC6079
Dual/Quad Low Noise Precision CMOS Op Amps
Micropower 0.7μV/°C VOS Drift
LTC6241/LTC6242
Dual/Quad Low Noise CMOS Op Amps
18MHz Bandwidth,10V/μs Slew Rate
LTC6244
Dual 50MHz CMOS Op Amp
Low Noise, Rail-to-Rail Out, MS8 and DFN Packages
60812f
20 Linear Technology Corporation
LT 0807 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2007
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