PLETRONICS LV7844DEV-125.0M-1K

LV78D Series 3.3 V
LVDS Clock Oscillators
January 2008
This device is obsolete, January 2008
This is replaced by the LV98xxDV device
For new designs use the LV93xxDV device
• Pletronics’ LV78D Series is a quartz crystal
controlled precision square wave generator with
an LVDS output.
• FR4 base with a mechanical metal cover.
• Solder pad compatible with many 9x14mm plastic
J lead packages.
• Has internal bypass capacitor on the Vcc lead
• Tape and Reel or cut tape packaging is available.
• 80 to 250 MHz
• 9.04mm x 8.91mm (S package)
• Enable/Disable Function on pad 2
(see LV76D for E/D on pad 1)
• Disable function includes low standby power
mode
• 3rd Overtone Crystals used
• Low Jitter
• 5x7 mm LCC ceramic oscillator inside
Pletronics Inc. certifies this device is in accordance with the
RoHS 5/6 (2002/95/EC) and WEEE (2002/96/EC) directives.
Pletronics Inc. guarantees the device does not contain the following:
Cadmium, Hexavalent Chromium, Lead, Mercury, PBB’s, PBDE’s
Weight of the Device: 0.4 grams
Moisture Sensitivity Level: 1 As defined in J-STD-020C
Second Level Interconnect code: e4
Absolute Maximum Ratings:
Parameter
Unit
VCC Supply Voltage
-0.5V to +5.0V
Vi
Input Voltage
-0.5V to VCC + 0.5V
Vo
Output Voltage
-0.5V to VCC + 0.5V
Thermal Characteristics
The maximum die or junction temperature is 155oC
The thermal resistance junction to board is 60 to 100oC/Watt depending on the solder pads, ground plane
and construction of the PCB.
Product information is current as of publication date. The product conforms
to specifications per the terms of the Pletronics standard warranty. Production
processsing does not necessarily include testing of all parameters.
Copyright © 2006, 2007, 2008 Pletronics Inc.
LV78D Series 3.3 V
LVDS Clock Oscillators
January 2008
Part Number:
LV78
45
D
E
V
-125.0M
-XX
Part Marking:
Packaging code or blank
T250 = 250 per Tape and Reel
T500 = 500 per Tape and Reel
T1K = 1000 per Tape and Reel
PLE
LV78D
FF.FFF M
C YMDXX
Frequency in MHz
or
Supply Voltage VCC
V = 3.3V _
+ 10%
LV78DX
FF.FFF M
PLE XX
C YYWWXX
Optional Enhanced OTR
Blank = Temp. range -10 to +70oC
E = Temp. range -40 to +85oC
Series Model
Frequency Stability
45 = +
_ 50 ppm
44 = +
_ 25 ppm
20 = +
_ 20 ppm
Series Model
Marking Legend:
PLE = Pletronics
FF.FFF M = Frequency in MHz
YYWW or YWW or YMD = Date of Manufacture (year and week, or year-month-day)
All other marking is internal factory codes
Specifications such as frequency stability, supply voltage and operating temperature range, etc. are
not identified from the marking. External packaging labels and packing list will correctly identify the
ordered Pletronics part number.
Codes for Date Code YMD
Code
Year
6
2006
Code
A
JAN
Month
Code
Day
Code
Day
Code
Day
7
2007
8
2008
B
FEB
9
2009
C
MAR
D
APR
E
MAY
0
2010
F
JUN
1
2011
2
2012
G
JUL
H
AUG
J
SEP
K
OCT
L
NOV
M
DEC
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
A
10
B
11
C
12
D
13
E
14
F
15
G
16
H
17
J
18
K
19
L
20
M
21
N
22
P
23
R
24
T
25
U
26
V
27
W
28
X
29
Y
30
Z
31
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2
LV78D Series 3.3 V
LVDS Clock Oscillators
January 2008
Electrical Specification for 3.30V _
+10% over the specified temperature range
Item
Min
Max
Unit
Frequency Range
80
250
MHz
Frequency Accuracy “45"
-50
+50
ppm
“44"
-25
+25
For all supply voltages, load changes, aging for
1 year, shock, vibration and temperatures
“20"
-20
+20
Output Waveform
Condition
LVDS
Output High Level
--
1.60
Volts
See load circuit
R1 = 50 ohms
Output Low Level
0.90
--
Volts
See load circuit
R1 = 50 ohms
Differential Output (VOD)
247
454
mVolts
See load circuit
R1 = 50 ohms
1.125
1.375
Volts
See load circuit
R1 = 50 ohms
Differential Output Error (dVOS)
--
50
mVolts
See load circuit
R1 = 50 ohms
Output Symmetry
45
55
%
Referenced to 50% of amplitude or crossing
point
Output TRISE and TFALL
300
700
pS
Vth is 20% and 80% of waveform
-
0.15
pS RMS
-
2.8
-
66
mA
50
-
Kohm
To Vcc (equivalent resistance)
V disable
-
0.8
Volts
Referenced to Ground
V enable
2.0
-
Volts
Referenced to Ground
-10
+10
uA
-10
+10
uA
Enable
-
10
nS
Time for output to reach a logic state
Disable time
-
10
nS
Time for output to reach a high Z state
Start up time
-
5
mS
Measured from the time Vcc = 3.0V
-10
+70
o
Standard Temperature Range
-40
+85
o
Extended Temperature Range
-55
+125
o
-
3
Output Offset Voltage (VOS)
Jitter
Vcc Supply Current
Enable/Disable Internal Pull-up
Output leakage
VOUT = VCC
VOUT = 0V
Operating Temperature Range
Storage Temperature Range
Standby Current ICC
Measured from 12KHz to 20MHz from Fnominal
Measured from 10Hz to 1MHz from Fnominal
C
C
Includes current of properly terminated device
Pad 1 low, device disabled
“E” Option
C
uA
Pad 1 low, device disabled
Specifications with Pad 1 E/D open circuit
Typical Phase-Noise Response
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425-776-1880
3
LV78D Series 3.3 V
LVDS Clock Oscillators
January 2008
0
-20
-40
dBc/Hz
-60
-80
-100
-120
-140
-160
10
1,000
100,000
10,000,000
Frequency (Hz)
Load Circuit
Test Waveform
Symmetry
Vhigh
Out
80%
50%
20%
Vlow
Out*
Trise
Tfall
Showing Out Measurement only
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425-776-1880
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LV78D Series 3.3 V
LVDS Clock Oscillators
January 2008
Reliability: Environmental Compliance
Parameter
Condition
Mechanical Shock
MIL-STD-883 Method 2002, Condition B
Vibration
MIL-STD-883 Method 2007, Condition A
Solderability
MIL-STD-883 Method 2003
Thermal Shock
MIL-STD-883 Method 1011, Condition A
ESD Rating
Model
Minimum Voltage
Conditions
Human Body Model
1500
MIL-STD-883 Method 3115
Charged Device Model
1000
JESD 22-C101
Package Labeling
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Courier New
Bar code is 39-Full ASCII
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Arial
Layout and application information
Recommend connecting Pad 1 and Pad 2 together to permit the design to accept Enable/Disable on both
input pads (see LV76D for E/D on pad 1)
For Optimum Jitter Performance, Pletronics recommends:
•
a ground plane under the device
•
no large transient signals (both current and voltage) should be routed under the device
•
do not layout near a large magnetic field such as a high frequency switching power supply
•
do not place near piezoelectric buzzers or mechanical fans.
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5
LV78D Series 3.3 V
LVDS Clock Oscillators
January 2008
Mechanical:
Cover:
Centered on the base
304 Stainless Steel
0.010 inch (0.25mm)
Electroless Nickel Plated
1 µinch (25 µm) typical
Label:
White Kapton with Black Letters
–or-Blue Epoxy heat cure ink covering
top with laser marked lettering
Inches
mm
A
0.351 +
_ 0.003
8.91 +
_ 0.07
B
0.356 +
_ 0.005
9.04 +
_ 0.13
C
0.103 +
_ 0.005
2.62 +
_ 0.13
D1
0.324
8.23
E1
0.316
8.03
F1
0.050
1.27
G1
0.040
1.02
1
H
0.059
1.50
I1
0.020
0.51
J1
0.040
1.02
Pin 3 Ground plane is typical
K1
0.100
2.54
Not to scale
L1
0.026 typical
0.66
FR4 PCB Base:
Solder masked
All via holes tented on bottom
Copper Clad 670 µinch (17 µm)
Nickel plated 118 µinch (3 µm)
Gold plated 0.8 µinch (0.02 µm)
Typical thicknesses
The package is not hermetically sealed (the crystal unit inside is hermetically sealed).
•
•
The sides are intentionally left open to permit cleaning material to freely flow in the package, thus minimizing the
accumulation of contaminants during cleaning processes.
The internal part of the package must be thoroughly dry before operating.
•
Pad
Function
Note
1
No connect
There is no internal connection to this pad
2
Output
Enable/Disable
When this pad is not connected the oscillator shall operate.
When this pad is <0.30 volts, the output will be inhibited (high impedance state.)
Recommend connecting this pad to VCC if the oscillator is to be always on.
3
Ground (GND)
4
Output
5
Output*
6
Supply Voltage
(VCC)
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The outputs must be terminated, 100 ohms between the outputs is the ideal
termination.
Recommend connecting appropriate power supply bypass capacitors as close as
possible.
425-776-1880
6
LV78D Series 3.3 V
LVDS Clock Oscillators
January 2008
Temperature (°C)
Reflow Cycle (typical for lead free processing)
260°C Maximum
10 Seconds Maximum
250
215°C±10°C
200
175°C±10°C
150
100
Approximately 50 Seconds
120 to 160 Seconds
Allowed rate of temperature change
Maximum 4°C per second
The part may be reflowed 2 times without degradation.
Tape and Reel: available for quantities of 250 to 1000 per reel, cut tape for < 250
Constant Dimensions Table 1
Tape
Size
D0
8mm
D1
Min
E1
P0
1.0
S1
Min
T
Max
0.6
0.6
T1
Max
2.0
+0.05
_
12mm
1.5
1.5
1.75
4.0
16mm
+0.1
-0.0
1.5
_
+0.1
_0.1
+
24mm
P2
0.1
2.0
_
+0.1
1.5
Variable Dimensions Table 2
Tape
Size
B1
Max
E2 Min
F
P1
T2
Max
W
Max
Ao, Bo
& Ko
24 mm
9.88
22.25
11.5 _
+0.1
16.0 +
_0.1
3.22
24.3
Note 1
Note 1: Embossed cavity to conform to EIA-481-B
Dimensions in mm
Not to scale
REEL DIMENSIONS
A
B
inches
7.0
10.0
13.0
mm
177.8
254.0
330.2
inches
2.50
4.00
3.75
mm
63.5
101.6
95.3
Tape
Widt
h
24.4
+2.0
-0.0
24.0
C
mm
D
mm
13.0 +0.5 / -0.2
---
---
Reel dimensions may vary from the above
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7
LV78D Series 3.3 V
LVDS Clock Oscillators
January 2008
IMPORTANT NOTICE
Pletronics Incorporated (PLE) reserves the right to make corrections, improvements, modifications and
other changes to this product at anytime. PLE reserves the right to discontinue any product or service
without notice. Customers are responsible for obtaining the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to
PLE’s terms and conditions of sale supplied at the time of order acknowledgment.
PLE warrants performance of this product to the specifications applicable at the time of sale in accordance
with PLE’s limited warranty. Testing and other quality control techniques are used to the extent PLE
deems necessary to support this warranty. Except where mandated by specific contractual documents,
testing of all parameters of each product is not necessarily performed.
PLE assumes no liability for application assistance or customer product design. Customers are
responsible for their products and applications using PLE components. To minimize the risks associated
with the customer products and applications, customers should provide adequate design and operating
safeguards.
PLE products are not designed, intended, authorized or warranted to be suitable for use in life support
applications, devices or systems or other critical applications that may involve potential risks of death,
personal injury or severe property or environmental damage. Inclusion of PLE products in such
applications is understood to be fully at the risk of the customer. Use of PLE products in such applications
requires the written approval of an appropriate PLE officer. Questions concerning potential risk
applications should be directed to PLE.
PLE does not warrant or represent that any license, either express or implied, is granted under any PLE
patent right, copyright, artwork or other intellectual property right relating to any combination, machine or
process which PLE product or services are used. Information published by PLE regarding third-party
products or services does not constitute a license from PLE to use such products or services or a warranty
or endorsement thereof. Use of such information may require a license from a third party under the
patents or other intellectual property of the third party, or a license from PLE under the patents or other
intellectual property of PLE.
Reproduction of information in PLE data sheets or web site is permissible only if the reproduction is
without alteration and is accompanied by associated warranties, conditions, limitations and notices.
Reproduction of this information with alteration is an unfair and deceptive business practice. PLE is not
responsible or liable for such altered documents.
Resale of PLE products or services with statements different from or beyond the parameters stated by
PLE for that product or service voids all express and implied warranties for the associated PLE product or
service and is an unfair or deceptive business practice. PLE is not responsible for any such statements.
Contacting Pletronics Inc.
Pletronics Inc.
19013 36th Ave. West
Lynnwood, WA 98036-5761 USA
Tel: 425-776-1880
Fax: 425-776-2760
E-mail: [email protected]
URL: www.pletronics.com
Copyright © 2006, 2007, Pletronics Inc.
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