Microsemi LX1562IDM Second-generation power factor controller Datasheet

L I N D O C # : 1562
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
T
H E
I
P
N F I N I T E
O W E R
I
O F
P
N N O VA T I O N
R O D U C T I O N
D
DESCRIPTION
The LX1562 is a second-generation
family of power factor correction
controllers using a discontinuous mode
of operation. They are optimized for
electronic ballast applications. Many
improvements have been made over
the original SG3561A controller
introduced by Silicon General Semiconductor in 1992.
New features include the addition of
an internal start-up circuit eliminating
bulky external components while
allowing independent boost converter
operation. Addition of internal current
sense blanking eliminating the need for
an external R/C filter network. Internal
clamping of the error amplifier and
multiplier outputs improves turn on
overshoot characteristics and current
limiting. Special circuitry has also been
450µH
61T #22AWG
R4
22k
7T
2.2M
1%
C1 1µF
250V
R2
29k
1%
D7
C2
22µF
8
5
VIN
I DET
R10
4.7M
MULT
IN
C3
C4
.01µF
0.1µF
1N4004
1N4004
D4
■ ELECTRONIC BALLAST
■ SWITCHING POWER SUPPLIES
VBOOST
230V
1N4935
3
D2
A P P L I C AT I O N S
OUT 7
COMP
INV
GND
6
C.S.
1MΩ
1%
D6
1N4148
47Ω
R5
R9 620k
2
C5
1
0.1µF
R7
Q1
1RF730
4
3x
1/4W
C6
100µF
400V
11k
1%
R8
FLOURESCENT LAMP BALLAST
R3
MR854
LX1562
1N4004
1N4004
EMI FILTER
R1
AC-
L1
D5
AC+
120V
AC
100k
½W
H E E T
■ INTERNAL START-UP CIRCUIT
■ INTERNAL CURRENT SENSE BLANKING
■ IMPROVED MICROPOWER START-UP
CURRENT (300µA max.)
■ CLAMPED E.A. OUTPUT FOR LOWER
TURN-ON OVERSHOOT
■ MULTIPLIER CLAMP LIMITS MAXIMUM
INPUT CURRENT
■ INTERNAL OVERVOLTAGE PROTECTION
REPLACES BUILT-IN C.S. OFFSET
■ PWM OUTPUT CLAMP LIMITS MOSFET
GATE DRIVE VOLTAGE
■ INCREASED UVLO HYSTERESIS REDUCES
START-UP TIMING (LX1562 only)
■ LOW OPERATING CURRENT CONSUMPTION
■ INTERNAL 1.5% REFERENCE
■ TOTEM POLE OUTPUT STAGE
■ AUTOMATIC CURRENT LIMITING OF BOOST
STAGE
■ DISCONTINUOUS MODE OF OPERATION
WITH NO CURRENT GAPS
■ NO SLOPE COMPENSATION REQUIRED
added to prevent no load runaway
conditions. And finally, output drive
clamps limiting power MOSFET gate
drive independent of supply voltage
greatly enhance the products practical
application.
Although the IC design has been
optimized for electronic ballast applications, it can also be used for power
factor correction in lower power (typ <
300W) AC-DC converters. One unique
feature of the device is encompassed
by the addition of internal logic
circuitry to detect zero crossing of the
inductor current thus maintaining the
discontinuous current mode of operation. This feature prevents large
current gaps from appearing thereby
minimizing distortion and enhancing
power factor correction.
T YPICAL A PPLICATION OF THE LX1562 IN AN 80W
F LUORESCENT L AMP B ALLAST WITH A CTIVE P OWER F ACTOR C ONTROL
D3
S
K E Y F E AT U R E S
PRODUCT HIGHLIGHT
D1
A T A
A VA I L A B L E O P T I O N S
PER
PA R T #
Part #
Start-Up
Voltage
Hysteresis
Voltage
LX1562
13.1V
5.2V
LX1563
9.8V
2.1V
R6
1.3Ω
Note: Thick trace on schematic shows high-frequency, high-current path in circuit.
Lead lengths must be minimized to avoid high-frequency noise problems.
PA C K A G E O R D E R I N F O R M AT I O N
TA (°C)
DIP
M Plastic
8-pin
SOIC
DM Plastic
8-pin
0 to 100
LX1562IM
LX1562IDM
0 to 100
LX1563IM
LX1563IDM
Note: All surface-mount packages are available in Tape & Reel.
Append the letter "T" to part number. (i.e. LX1562IDMT)
F O R F U R T H E R I N F O R M AT I O N C A L L ( 7 1 4 ) 8 9 8 - 8 1 2 1
Copyright © 1996
Rev. 1.3 12/96
11861 WESTERN A VENUE , G ARDEN G ROVE , CA. 92841
1
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
R O D U C T I O N
A B S O L U T E M A X I M U M R AT I N G S
D
A T A
S
H E E T
PACKAGE PIN OUTS
(Note 1)
Supply Voltage (VIN) ...................................................................................... -0.3V to 28V
Peak Driver Output Current (Note 3) ................................................................. ±500mA
Driver Output Clamping Diodes
VO > VCC or VO < -0.3V ........................................................................................ ±10mA
Detector Clamping Diodes
VDET > 6V or VDET < 0.9V ..................................................................................... ±10mA
Error Amp, Multiplier, and Comparator Input Voltages ................................ -0.3V to 6V
Detector Input Voltage (Note 2) ....................................................................... -0.3 to 6V
Operating Junction Temperature
Plastic (M and DM Packages) ............................................................................... 150°C
Storage Temperature Range ...................................................................... -65°C to 150°C
Lead Temperature (Soldering, 10 Seconds) ............................................................ 300°C
Note 1. Values beyond which damage may occur. All voltages are specified with respect to
ground, and all currents are positive into the specified terminal.
Note 2. With no limiting resistor.
Note 3. Current duty cycle is chosen such that TJ is below 150°C.
E.A. INV.
E.A. OUT
MULT. INPUT
C.S.
1
8
2
7
3
6
4
5
VIN
OUT
GROUND
IDET
M PACKAGE
(Top View)
E.A. INV.
E.A. OUT
MULT. INPUT
C.S.
1
8
2
7
3
6
4
5
VIN
OUT
GROUND
IDET
DM PACKAGE
(Top View)
T H E R M A L D ATA
M PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θ JA
95°C/W
DM PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θ JA
165°C/W
Junction Temperature Calculation: TJ = TA + (PD x θJA).
The θ JA numbers are guidelines for the thermal performance of the device/pc-board system.
All of the above assume no ambient airflow
2
Copyright © 1996
Rev. 1.3 12/96
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
D
R O D U C T I O N
A T A
S
H E E T
R E C O M M E N D E D O P E R AT I N G C O N D I T I O N S
Parameter
Symbol
Supply Voltage Range
Peak Driver Output Current
Operating Ambient Temperature Range:
LX1562/1563
(Note 4)
Recommended Operating Conditions
Min.
Typ.
Max.
11
Units
25
V
mA
100
°C
±200
0
Note 4. Range over which the device is functional.
ELECTRICAL
CHARACTERISTICS
(Unless otherwise specified, these specifications apply over the operating ambient temperatures for the LX1562/1563 with 0°C ≤ TA ≤ 100°C; VIN=12V. Low duty cycle pulse
testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.)
Parameter
Symbol
Test Conditions
LX1562I/1563I
Min. Typ.
Max.
Units
Under-Voltage Lockout Section
Start Threshold Voltage
VST
UV Lockout Hysteresis
∆VH
LX1562 Only
LX1563 Only
LX1562 Only
LX1563 Only
12
9.2
4
1.7
13.1
9.8
5.2
2.1
14
10.6
6
2.5
V
V
V
V
200
5
6
300
8
10
µA
mA
mA
2.50
2.535
2.56
V
V
mV
mV
mV
500
nA
dB
V/µsec
dB
mA
mA
V
MHz
°
Supply Current Section
Start-Up Supply Current
Operating Supply Current
Dynamic Operating Supply Current
IST
IQ
IOP
VIN < V TH
VIN = 12V, Output Not Switching
VIN = 12V, 50kHz, CGS = 1000pF
VR
IREF = 0mA, TA = 25°C
IREF = 0mA
12V < VIN < 25V
0 < IREF < 2mA
Reference Section (Note 5)
Initial Accuracy (Note 8)
Line Regulation
Load Regulation
Temperature Stability
∆VI
∆VL
∆VT
2.465
2.44
0.1
1.3
20
Error Amplifier Section
Input Bias Current
Large Signal Open Loop Voltage Gain
Slew Rate
Power Supply Rejection Ratio (Note 5)
Output Source Current
Output Sink Current
Output Voltage Range (Note 7)
Unity Gain Bandwidth
Phase Margin
IB
AVOL
S
PSRR
I SR
ISK
E.A.O
fB
φB
(Note 5)
11 to 25V
VOH = 3V
VOL = 2V
No Load on E.A. Output
-500
60
60
-2
3
1.2
50
80
0.63
80
-4.5
4.5
3.8
1.7
49
Multiplier Section
Mult. Input Voltage Range
M2 Input Voltage Range
Mult. Input Bias Current (M1)
Multiplier Gain (Note 5 & 6)
Multiplier Gain Temperature Stability
Maximum Multiplier Output Voltage
VM1
VM2
IMB
K
∆KT
V CLMP
0
V REF
VM1 = 1V, ∆VEA0 = 2.7V to 3.3V
∆VM1 = 0.5V to 1.5V, VEA0 = VREF + 1V
VM1 = 2V, VPIN1 = 0V
0.55
0.55
1.1
2
VREF + 1
-0.24
0.68
0.61
-0.2
1.24
0.8
0.75
1.45
V
V
µA
V/V2
V/V2
%/°C
V
( E l e c tr i c a l Cha r a ct er i st i cs cont i nu e next pa g e.)
Copyright © 1996
Rev. 1.3 12/96
3
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
R O D U C T I O N
D
A T A
S
H E E T
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Test Conditions
(Con't.)
LX1562I/1563I
Min. Typ.
Max.
Units
Current Sense Comparator Section
Input Bias Current
Current Sense Delay to Output
C.S. Blanking Time
C.S. Input Offset Voltage
I CSB
td
tBLK
VOFF
0V ≤ VCS ≤ 1.7V
E.A.OUT = 3.7V, VCS = 0 to 1.2V, VM1 = 1V
VEA0 = 2.2V, VM1 = 0V, IDETC = 0V
-1
0.4
-20
-0.3
280
0.9
3
1
500
1.2
20
µA
ns
µs
mV
1.6
180
0.4
7.0
-1
1.72
240
0.62
7.8
-0.2
1.9
300
0.85
8.6
1
±3
V
mV
V
V
µA
mA
Detect Section
Input Voltage Threshold - High
Hysteresis
Input LO Clamp Voltage
Input HI Clamp Voltage
Input Current
Input HI/LO Clamp Diode Current
VHI
HD
VDL
VDZ
IDB
IDMX
IDET = 100µA
IDET = 3mA
1V ≤ VDET ≤ 6V
VDET < 0.9V, VDET > 6V
Restart Timer Section
Restart Time
tRST
300
µsec
Output Driver Section
Output High Voltage
Output Low Voltage
Output Rise Time
Output Fall Time
Maximum Output Voltage
V PRH
V PRL
tR
tf
VDRMX
IL = -10mA, VIN = 12V
IL = 10mA, VIN = 12V
CL = 1000pF
CL = 1000pF
VIN = 20V
8.5
13
9
0.8
130
50
13.8
1
200
120
15
V
V
ns
ns
V
Notes: 5. Because the reference is not brought out externally, these specifications are tested at probe only, and cannot be tested on the packaged part.
They are guaranteed by design, and shown for illustrative purposes only.
6. K =
∆VC.S.
≈
(∆VM1) x (VEA0 - VREF)
∆VC.S.
(VM1) (∆VEA0)
7. This parameter, although guaranteed, is not tested in production.
8. Initial accuracy includes input offset voltage of error amplifier.
4
Copyright © 1996
Rev. 1.3 12/96
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
D
R O D U C T I O N
S
A T A
H E E T
BLOCK DIAGRAM / PIN DESCRIPTIONS
VIN
Internal
Bias
5.2V (1562)
2.1V (1563)
8
AC
Input
2.5V
REF
C1
EMI
Filter
VREF
L1
D1
6.8V To All
Internal Circuitry
13.1V (1562)
9.8V (1563)
MULT
IN
E.A. INV.
M1
3
L1
VREF
1.24V
1
M2
2
E.A. OUT
UVLO
C.S.
VIN
1.8V
R
OUT
LATCH
7
VREF
Q
IDET 300Ω
5
L1
C.S.
S
1.72V
Q
VTIMER
C.S.
4
1µs
Delay
FUNCTIONAL DESCRIPTION
Pin
#
Description
VIN
8
Input supply voltage.
GND
6
Input supply voltage return. Must always be the lowest potential of all the pins.
INV
1
Inverting input of the Error Amplifier. The output of the Boost converter should be resistively divided to 2.5V and
connected to this pin.
E.A. OUT
2
The output of the Error Amplifier. A feedback compensation network is placed between this pin and the INV pin.
MULT IN
3
Input to the multiplier stage. The full-wave rectified AC is divided to less than 2V and is connected to this pin.
C.S.
4
Input to the PWM comparator. Current is sensed in the Boost stage MOSFET by a resistor in the source lead, and is
fed to this pin. An internal blanking circuit eliminates the RC low pass filter that otherwise is required to eliminate leading
edge spike.
I DET
5
A current driven logic input with internal clamp.
A second winding on the Boost inductor senses the flyback voltage associated with the zero crossing of the inductor
current and feeds it to the IDET pin through a limiting resistor. Low on this pin causes V O (pin 7) to go high.
OUT
7
PWM output pin. A totem-pole output stage specially designed for direct driving the MOSFET.
Copyright © 1996
Rev. 1.3 12/96
5
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
R O D U C T I O N
D
A T A
S
H E E T
GRAPH / CURVE INDEX
FIGURE INDEX
Characteristic Curves
IC Description
FIGURE #
FIGURE #
1.
E.A. OUTPUT VOLTAGE vs. C.S. THRESHOLD
23. INDUCT CURRENT
2.
MULTIPLIER INPUT VOLTAGE vs. C.S. THRESHOLD
24. TYPICAL APPLICATION OF START-UP CIRCUITRY
3.
MULTIPLIER GAIN (VM1=1V, VEA0 =3.5V) vs. TEMPERATURE
25. START-UP CAPACITOR VOLTAGE
4.
REFERENCE VOLTAGE (Including Offset) vs. TEMPERATURE
26. VOLTAGE REFERENCE vs. TEMPERATURE
5.
E.A. INPUT BIAS CURRENT vs. TEMPERATURE
6.
E.A. SINK CURRENT @2V vs. TEMPERATURE
27. THE AMPLIFIER CONFIGURED AS AN INTEGRATOR FOR LOOP
COMPENSATION
7.
START-UP SUPPLY CURRENT vs. TEMPERATURE (LX1563)
28. MULTIPLIER SECTION
8.
START-UP SUPPLY CURRENT vs. TEMPERATURE (LX1562)
29. CURRENT SENSE SECTION
9.
START-UP THRESHOLD vs. TEMPERATURE (LX1562)
30. START-UP TIMER
10. START-UP THRESHOLD vs. TEMPERATURE (LX1563)
Application Information
11. UV LOCKOUT HYSTERESIS vs. TEMPERATURE (LX1562)
12. UV LOCKOUT HYSTERESIS vs. TEMPERATURE (LX1563)
FIGURE #
13. IDET THRESHOLD HIGH vs. TEMPERATURE
31. TYPICAL APPLICATION OF THE LX1562 IN AN 80W FLUORESCENT
LAMP BALLAST WITH ACTIVE POWER FACTOR CONTROL
14. IDET INPUT HYSTERESIS vs. TEMPERATURE
15. RUN-AWAY COMPARATOR THRESHOLD vs. TEMPERATURE
32. NORMALIZED OPERATING FREQUENCY vs. OFF-TIME DUTY CYCLE
16. C.S. DELAY TO OUTPUT vs. TEMPERATURE
33. INDUCT CURRENT
17. C.S. BLANKING TIME vs. TEMPERATURE
34. LOAD TRANSIENT RESPONSE CIRCUIT
18. RESTART TIME vs. TEMPERATURE
35. FLYBACK VOLTAGE ACROSS IDET WINDING
19. FALL TIME vs. TEMPERATURE
Typical Applications
20. RISE TIME vs. TEMPERATURE
21. SUPPLY CURRENT vs. SUPPLY VOLTAGE (LX1562)
FIGURE #
22. SUPPLY CURRENT vs. SUPPLY VOLTAGE (LX1563)
36. TYPICAL APPLICATION OF THE LX1562 IN AN 80W FLUORESCENT
LAMP BALLAST WITH ACTIVE POWER FACTOR CONTROL - 120V
22a. MAXIMUM MULTIPLIER OUTPUT VOLTAGE vs. TEMPERATURE
37. TYPICAL APPLICATION OF THE LX1562 IN AN 80W FLUORESCENT
LAMP BALLAST WITH ACTIVE POWER FACTOR CONTROL - 220V
38. TYPICAL APPLICATION OF THE LX1562 IN AN 80W FLUORESCENT
LAMP BALLAST WITH ACTIVE POWER FACTOR CONTROL - 277V
6
Copyright © 1996
Rev. 1.3 12/96
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
R O D U C T I O N
D
A T A
CHARACTERISTIC
FIGURE 1. — E.A. OUTPUT VOLTAGE vs. C.S. THRESHOLD
S
H E E T
C U RV E S
FIGURE 2. — MULTIPLIER INPUT VOLTAGE vs. C.S. THRESHOLD
1.4
1.4
1.2
1.2
C.S. Threshold Voltage - (V)
VM1 = 2.5V
C.S. Threshold - (V)
TA = 25°C
VEA0 = 4V
VM1 = 3V
1.0
0.8
0.6
VM1 = 1V
VM1 = 1.5V
0.4
VM1 = 2V
0.2
VEA0 = 3.5V
1.0
0.8
VEA0 = 3V
0.6
VEA0 = 3.25V
0.4
VEA0 = 2.5V
0.2
TA = 25°C
0
2.4
0
2.6
2.8
3
3.2
3.4
3.8
3.6
0
4
0.4
0.8
1.2
1.6
2
2.4
2.8
E.A. Output Voltage - (V)
Multiplier Input Voltage - (V)
FIGURE 3. — MULTIPLIER GAIN (VM1=1V, VEA0 =3.5V)
FIGURE 4. — REFERENCE VOLTAGE (Including Offset)
vs. TEMPERATURE
2.52
VCC = 12V
CL = 1nF
VEA0 = 3.5V
VM1 = 1V
VCC = 12V
CL = 1nF
2.51
(VR) Reference Voltage - (V)
(K) Multiplier Gain - (1/V)
0.75
0.70
0.65
0.60
0.55
2.50
2.49
2.48
2.47
2.46
-25
0
25
50
75
100
(TA) Ambient Temperature - (°C)
Copyright © 1996
Rev. 1.3 12/96
3.6
vs. TEMPERATURE
0.80
0.50
-50
3.2
125
2.45
-50
-25
0
25
50
75
100
125
(TA) Ambient Temperature - (°C)
7
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
R O D U C T I O N
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A T A
CHARACTERISTIC
FIGURE 5. — E.A. INPUT BIAS CURRENT vs. TEMPERATURE
H E E T
C U RV E S
FIGURE 6. — E.A. SINK CURRENT @2V vs. TEMPERATURE
0.5
6.0
0.3
(ISK) E.A. Sink Current @2V - (mA)
VCC = 12V
CL = 1nF
E.A.- = 2.5V
0.4
(IB) E.A. Input Bias Current - (µA)
S
0.2
0.1
0.0
-0.1
-0.2
-0.3
VCC = 12V
CL = 1nF
VEA0 = 2V
5.5
5.0
4.5
4.0
3.5
-0.4
-0.5
-50
-25
0
25
50
75
100
3.0
-50
125
FIGURE 7. — START-UP SUPPLY CURRENT vs. TEMPERATURE
75
100
125
LX1562
VIN < VTH
CL = 1nF
(IST) Start-up Supply Current - (µA)
(IST) Start-up Supply Current - (µA)
50
350.0
LX1563
250.0
200.0
150.0
100.0
50.0
-25
0
25
50
75
100
(TA) Ambient Temperature - (°C)
8
25
FIGURE 8. — START-UP SUPPLY CURRENT vs. TEMPERATURE
350.0
0.0
-50
0
(TA) Ambient Temperature - (°C)
(TA) Ambient Temperature - (°C)
300.0
-25
125
300.0
VIN < VTH
CL = 1nF
250.0
200.0
150.0
100.0
50.0
0.0
-50
-25
0
25
50
75
100
125
(TA) Ambient Temperature - (°C)
Copyright © 1996
Rev. 1.3 12/96
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
R O D U C T I O N
D
A T A
CHARACTERISTIC
FIGURE 9. — START-UP THRESHOLD vs. TEMPERATURE
C U RV E S
10.20
LX1563
LX1562
13.5
13.0
12.5
12.0
11.5
10.00
9.90
9.80
9.70
9.60
9.50
-25
0
25
50
75
100
9.40
-50
125
-25
0
25
50
75
100
125
(TA) Ambient Temperature - (°C)
(TA) Ambient Temperature - (°C)
FIGURE 11. — UV LOCKOUT HYSTERESIS vs. TEMPERATURE
FIGURE 12. — UV LOCKOUT HYSTERESIS vs. TEMPERATURE
2.50
6.0
(∆VH) UV Lockout Hysteresis - (V)
LX1562
(∆VH) UV Lockout Hysteresis - (V)
VCC = 0V to 16V
CL = 1nF
10.10
VCC = 0V to 16V
CL = 1nF
(VST) Start-up Threshold
(VST) Start-up Threshold - (V)
H E E T
FIGURE 10. — START-UP THRESHOLD vs. TEMPERATURE
14.0
11.0
-50
S
5.5
5.0
4.5
4.0
3.5
2.40
LX1563
2.30
2.20
2.10
2.00
1.90
1.80
1.70
1.60
3.0
-50
-25
0
25
50
75
100
(TA) Ambient Temperature - (°C)
Copyright © 1996
Rev. 1.3 12/96
125
1.50
-50
-25
0
25
50
75
100
125
(TA) Ambient Temperature - (°C)
9
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
R O D U C T I O N
D
A T A
CHARACTERISTIC
C U RV E S
1.90
400
1.85
350
1.80
1.75
1.70
1.65
1.60
300
250
200
150
100
50
1.55
1.50
-50
H E E T
FIGURE 14. — IDET INPUT HYSTERESIS vs. TEMPERATURE
(HD) IDET Input Hysteresis - (mV)
(VHI) IDET Threshold High - (V)
FIGURE 13. — IDET THRESHOLD HIGH vs. TEMPERATURE
S
-25
0
25
50
75
100
0
-50
125
-25
0
25
50
75
100
125
(TA) Ambient Temperature - (°C)
(TA) Ambient Temperature - (°C)
FIGURE 15. — RUN-AWAY COMPARATOR THRESHOLD
FIGURE 16. — C.S. DELAY TO OUTPUT vs. TEMPERATURE
vs. TEMPERATURE
500
2.8
(td) C.S. Delay to Output - (ns)
Run-Away Comp. Threshold
2.6
2.4
2.2
2.0
1.8
1.6
-25
0
25
50
75
100
(TA) Ambient Temperature - (°C)
10
400
350
300
250
200
1.4
1.2
-50
VCC = 12V, CL = 1nF
VM1 = 1V, VEA0 = 3.7V
VCS = 0V to 1.2V
450
125
150
-50
-25
0
25
50
75
100
125
(TA) Ambient Temperature - (°C)
Copyright © 1996
Rev. 1.3 12/96
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
R O D U C T I O N
D
A T A
CHARACTERISTIC
FIGURE 17. — C.S. BLANKING TIME vs. TEMPERATURE
S
C U RV E S
FIGURE 18. — RESTART TIME vs. TEMPERATURE
900
500
(tRST) Restart Time - (µs)
600
(tBLK) C.S. Blanking Time - (ns)
1000
800
700
600
500
VCC = 12V
C.S. = Pulse
400
300
200
100
400
300
-50
H E E T
-25
0
25
50
75
100
0
-50
125
-25
0
25
50
FIGURE 19. — FALL TIME vs. TEMPERATURE
200
VCC = 12V, CL = 2200pF
VCC = 12V
CL = 2200pF
180
80
160
70
(tR) Rise Time - (ns)
(tF) Fall Time - (ns)
125
FIGURE 20. — RISE TIME vs. TEMPERATURE
90
60
50
40
140
120
100
80
30
60
-25
0
25
50
75
100
(TA) Ambient Temperature - (°C)
Copyright © 1996
Rev. 1.3 12/96
100
(TA) Ambient Temperature - (°C)
(TA) Ambient Temperature - (°C)
20
-50
75
125
40
-50
-25
0
25
50
75
100
125
(TA) Ambient Temperature - (°C)
11
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
R O D U C T I O N
D
A T A
CHARACTERISTIC
FIGURE 21. — SUPPLY CURRENT vs. SUPPLY VOLTAGE
S
H E E T
C U RV E S
FIGURE 22. — SUPPLY CURRENT vs. SUPPLY VOLTAGE
14
14
LX1563
LX1562
12
(ICC) Supply Current - (mA)
(ICC) Supply Current - (mA)
12
10
8
6
4
TA = 25°C
VCS = 0V
VM1 = 0V
VPIN2 = VPIN1
2
10
8
6
4
TA = 25°C
VCS = 0V
VM1 = 0V
VPIN2 = VPIN1
2
0
0
0
10
30
20
40
50
60
0
10
20
30
40
50
60
(VCC) Supply Voltage - (V)
(VCC) Supply Voltage - (V)
(VCLMP) Maximum Mult. Output Voltage - (V)
FIGURE 22a. — MAXIMUM MULTIPLIER OUTPUT vs. TEMPERATURE
1.45
1.40
VCC = 12V, CL = 1nF
VPIN1 = 0V, VM1 = 2V, VCS = 0-2V
1.35
1.30
1.25
1.20
1.15
1.10
1.05
1.00
-50
-25
0
25
50
75
100
125
(TA) Ambient Temperature - (°C)
12
Copyright © 1996
Rev. 1.3 12/96
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
R O D U C T I O N
D
A T A
S
H E E T
FUNCTIONAL DESCRIPTION
The operation of the IC is best described by referring to the
block-diagram. The output of the multiplier stage generates a
voltage proportional to the product of the rectified AC line and
the output of the error amplifier. This voltage serves as the
reference for the inductor peak current that is sensed by the
resistor in series with the external power MOSFET. When the
sense voltage exceeds this threshold, C.S. comparator trips and
resets the latch as well as turning the power MOSFET off.
The energy stored during switch on-time is now transferred
and stored in the output capacitor, causing the inductor current
Inductor Peak
Current Envelope
IL
Average
AC Input Current
FIGURE 23 — INDUCTOR CURRENT
TON
TOFF
to ramp down. When current reaches zero level (inductor runs
out of energy) , boost diode (D1) stops conducting and the
residual inductor energy and the drain to source capacitance of
the power MOSFET create an LC tank circuit which causes drain
voltage to resonate at this frequency. The resonating voltage is
detected by the secondary winding (Idet winding) of the inductor. When this voltage swings negative “I detect” pin senses
it and activates the blanking circuit , sets the latch, and turns
power MOSFET on, repeating the cycle. This operation continues for the entire cycle of the AC rectified input resulting in an
inductor current as shown in Figure 23. The high frequency
content of this current is then filtered by the input capacitor
(C1) resulting in a sine wave input current in phase with the
AC line voltage.
Output voltage regulation is accomplished when the error
amplifier compares this voltage to an internal 2.5V reference
and generates an error voltage. This voltage then controls the
amplitude of the multiplier output adjusting the peak inductor
current proportional to the load and line variations, maintaining a well regulated voltage.
IC DESCRIPTION
UNDERVOLTAGE LOCK OUT
The LX1562/63 undervoltage lock-out is designed to maintain
an ultra low quiescent current of less than 300µA, while guaranteeing the IC is fully functional before the output stage is
activated. Comparing this to the SG3561A device, a 40% reduction in start-up current is achieved, resulting in 40% less power
dissipation in the start-up resistor. This is especially important
in electronic ballast applications that are designed to operate in
harsh environments, with convection cooling as the only means
of heat dissipation.
Figure 24 shows an efficient supply voltage using the ultra
low start-up current of the LX1562 in conjunction with a bootstrap winding off of the power transformer. Circuit operation
is as follows:
The start-up capacitor (C1) is charged by current through
resistor (R1) minus the start-up current drawn by the IC. This
resistor is typically chosen to provide 2X the maximum start-up
current at low line to guarantee start-up under the worst case
condition. Once the capacitor voltage reaches the start-up
threshold, the IC turns on, starting the switching cycle. The
operation of the IC demands an increase in operating current
which results in discharging the capacitor. During the discharge
cycle, the flyback voltage of the auxiliary winding is rectified
and filtered via rectifier (D1) and charges the capacitor above
the minimum operating voltage of the device and takes over as
the supply voltage. The start-up capacitor and auxiliary winding must be selected such that it satisfies worst case IC conditions. Figure 25 shows start-up time and voltage of capacitor C1.
Copyright © 1996
Rev. 1.3 12/96
Table 1 shows the start-up voltage and hysteresis for LX1562
and LX1563. The LX1562 is used for stand alone pre-regulator
applications while LX1563 is ideal for applications where supply voltage is derived elsewhere and requires less than 14V
start-up.
Rectified
AC Line
R1
I1 > 300µA
D1
IST < 300µA
VIN
LX1562
C1
VO
GND
RS
GND
FIGURE 24 — TYPICAL APPLICATION OF START-UP CIRCUITRY
TABLE 1
Part #
Start-Up
Voltage
Hysteresis
Voltage
LX1562
13.1V
5.2V
LX1563
9.8V
2.1V
13
PRODUCT DATABOOK 1996/1997
LX1562/1563
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H E E T
IC DESCRIPTION
ERROR AMPLIFIER
VOLTAGE REFERENCE (continued)
C1
DISCHARGE
VC1
VSTART
VHYST
DISCHARGE
TIME
BOOTSTRAP
WINDING
RT & CT TIME CONSTANT
t
FIGURE 25 — START-UP CAPACITOR VOLTAGE
VOLTAGE REFERENCE
The voltage reference is a low drift bandgap design which provides a stable +2.5V output with maximum of ±1.5% initial accuracy. This voltage is internally tied to the non-inverting input of the amplifier and is not available for external connection. The initial accuracy of the reference includes error amplifier input offset voltage. Figure 26 shows typical variation of
the reference voltage vs. temperature.
2.52
VCC = 12V
CL = 1nF
(VR) Reference Voltage - (V)
2.51
2.50
The error amplifier is an internally compensated op-amp with
access to the inverting input and the output pin. The noninverting input is internally connected to the voltage reference
and is not available for external connection. The amplifier is
designed for an open loop gain of 80dB, along with a typical
bandwidth of 1.7MHz and 49 degrees of phase margin. The
boost output voltage of the power factor pre-regulator is divided down and monitored by the inverting input. Input bias
current (0.5µA max) can cause an output voltage error that is
equal to the product of the input bias current and the value of
the upper divider resistor. The amplifier's output is available
for external loop compensation. Typically, the loop bandwidth
is set below 10Hz in order to reject the low frequency ripple
associated with 2X the line frequency. For example, if the
error amplifier is configured as an integrator with 1.2Hz bandwidth, it will have 40dB ripple rejection at 120Hz frequency.
This means that if the output of the error amp is allowed to
have 100mV of ripple, the boost converter must be limited to
less than 10V of ripple on its output.
To prevent boost output run away condition that may occur
during removal of the output load, a separate comparator monitors the E.A. output voltage and compares it to an internal 1.8V
reference. When load is removed, E.A. output swings lower
than 1.8V, trips the comparator and turns output driver off till
the inverting input voltage drops below 2.5V. At this point, the
E.A. output swings positive, turns the output driver back on
and repeats the cycle until the load is returned to normal condition.
To reduce output overshoot during line and load transients,
the E.A. output is clamped to two diode drops above the reference voltage. This prohibits the amplifier from being saturated, allowing it to recover faster thus minimizing the boost
voltage overshoot.
2.49
2f
f = Line Freq.
2.48
VO
R9
I9
C4
BW =
1
2.47
R10
Bias
2
1
2π R9 C4
I9 >> IBIAS
2.46
VREF
2.45
-50
1.8V
-25
0
25
50
75
100
125
(TA) Ambient Temperature - (°C)
FIGURE 26 — REFERENCE VOLTAGE (Including Offset) vs. TEMPERATURE
14
7
OUTPUT
DRIVE
From IDET Logic
FIGURE 27 — THE AMPLIFIER CONFIGURED AS AN INTEGRATOR
FOR LOOP COMPENSATION
Copyright © 1996
Rev. 1.3 12/96
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
R O D U C T I O N
D
A T A
S
H E E T
IC DESCRIPTION
MULTIPLIER
The LX1562/63 features a one quadrant multiplier stage having
two inputs. One (VM2) is internally driven by a DC voltage
which is the difference of E.A. output and VREF. The other (VM1),
is connected to an external resistor divider monitoring the rectified AC line. The output of the multiplier which is a function
of both inputs, controls inductor peak current during each cycle
of operation. This allows the inductor peak current to follow
the AC line thus forcing the average input current to be sinusoidal.
The multiplier is in the linear region if the VM1 input is limited
to less than 2V and the E.A. output is kept below 3.5V under all
line and load conditions. The output is internally clamped to
1.24V typically to limit the MOSFET peak current during turn on
or under excessive load conditions. The equation below describes the relationship between multiplier output voltage and
the its inputs.
for an external RC filter otherwise required for proper operation of the circuit. This function is described in detail under
“current detect logic” section.
The current sense comparator voltage is limited by an internal 1.24V (typ.) voltage clamp of the multiplier output. Therefore maximum switch current is typically given by:
IPK (MAX) = 1.24V / RS
Maximum switch peak current happens at full load and minimum line conditions.
TO
PIN 7
Logic
Circuit
3
R
RS
7
VM0 = K * VM1 * (V EA0 - VREF)
VM0
where: K = Multiplier gain (typ. 0.65)
VM1 = Voltage at pin3 (0 to 2V)
VEA0 = Error amp output voltage (2.5 to 3.5V)
VM0 = Multiplier output voltage
E.A.
OUTPUT
FIGURE 29 — CURRENT SENSE SECTION
VM0
VEA
Σ
VREF
VM2
CURRENT DETECT LOGIC
2.5V
VAC
R1
3
VM1
4
R2
C.S.
INPUT
FIGURE 28 — MULTIPLIER SECTION
CURRENT SENSE COMPARATOR
Current sense comparator is configured as a PNP input differential stage with one input internally tied to the multiplier output and the other available for current sensing. Current is converted to voltage using an external sense resistor in series with
the external power MOSFET. When sense voltage exceeds the
threshold set by the multiplier output, the current sense comparator terminates the gate drive to the MOSFET and resets the
PWM latch. The latch insures that the output remains in a low
state after the switch current falls back to zero. The LX1562/63
features a leading edge blanking circuit that eliminates the need
Copyright © 1996
Rev. 1.3 12/96
1µsec
Blank
MULT.
OUTPUT
2
INV.
1
INPUT
5
The function of “current detect logic” is to sense the operating
state of the boost inductor and to enable the output driver
accordingly. To achieve this, the downward slope of the inductor current is indirectly detected by monitoring the voltage
across a separate winding and connecting it to the detector
input “IDET” pin. Once the inductor current reaches ground
level, the voltage across the winding reverses polarity and
changes the “I DET” input and the comparator output to the low
state (See Figure 30). When comparator changes state, it sets
the latch and turns on the output driver for a period of 1µs
(typ.) regardless of any changes in the latch output (Q) within
this period. This ensures that if the C.S. comparator changes
state due to any turn-on spike, the driver output remains on
and does not turn off prematurely.
However if the spike lasts longer than 1µs, the output driver
turns off and the MOSFET stops conducting. This type of digital current sense blanking which is not amplitude dependent
has higher noise immunity than the commonly used external
RC filtering, allowing for more flexibility in board layout.
Since inductor voltage swings both positive and negative,
internal voltage clamping is provided to protect the IC. The
15
PRODUCT DATABOOK 1996/1997
LX1562/1563
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P
D
R O D U C T I O N
S
A T A
H E E T
IC DESCRIPTION
CURRENT DETECT LOGIC (continued)
OUTPUT DRIVER STAGE
upper 7.8V clamp prevents input overvoltage breakdown during switch off time, while during the on time the lower 0.7V
clamp prevents substrate injection. An internal current limit
resistor protects the lower clamp transistor in case the “I DET” pin
is accidently shorted to ground.
The LX1562/63 output driver is designed for direct driving of
an external power MOSFET. It is a totem pole stage with
±500mA peak current capability. This typically results in a
130ns rise and fall times into a 1000pF capacitive load. Additionally the output is held low during the undervoltage condition to ensure that the MOSFET remains in the off state until
supply voltage reaches the start-up threshold.
Internal voltage clamping ensures that output driver is always lower than 13.8V (typ.) when supply voltage variation
exceeds more than rated VGS threshold (typ 20V) of the external MOSFET. This eliminates an external zener diode and extra
power dissipation associated with it that otherwise is required
for reliable circuit operation.
START-UP TIMER
A start-up timer circuit eliminates the need for an external oscillator when used in stand alone applications. The timer, as
shown in Figure 30, provides a means to automatically start the
pre converter if the latch output Q comes up in a wrong (HI)
state. The timer capacitor ramps up and resets the latch to a
low state, turning the output driver on.
L1
HI
C.S.
VREF
IDEF
5
R
OUT
7
Q
300Ω
Q
L1
C.S.
S
1.72V
VTIMER
C.S. Latch
4
C.S.
VM0
1µs
Delay
FIGURE 30 — START-UP TIMER & CURRENT DETECT LOGIC CIRCUITRY
16
Copyright © 1996
Rev. 1.3 12/96
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
R O D U C T I O N
D
A T A
S
H E E T
A P P L I C AT I O N I N F O R M A T I O N
TYPICAL APPLICATION
A set of formulas have been derived specifically for this mode,
and are used throughout the design procedure. An example with
the following specifications for the boost converter is given as:
The application circuit shown in Figure 31 uses the LX1562 as the
controller to implement a boost type power factor regulator. The
I.C. controls the regulator, such that the inductor current is always
operating in a discontinuous conduction mode with no current
gaps. This mode of operation has several advantages over the
fixed frequency discontinuous conduction mode: 1) The switching frequency adjusts itself to the AC line envelope, causing a
sinusoidal current draw, 2) Since there is no current gap between
the switching cycles, the inductor voltage does not oscillate,
causing less radiated noise, 3) The lower peak inductor current
causes less power dissipation in the power MOSFET.
Input Voltage Range
Output Power
Efficiency
Power Factor
Total Harmonic Distortion
2.2M
1%
C1 1µF
250V
R4
22k
7T
C2
22µF
R2
29k
1%
8
5
VIN
I DET
R10
4.7M
MULT
IN
C3
C4
.01µF
0.1µF
1N4004
1N4004
D4
D7
1N4935
3
D2
VBOOST
230V
OUT 7
COMP
INV
GND
D6
1N4148
C.S.
47Ω
R5
R9 620k
2
C5
1
0.1µF
4
3x
1/4W
6
1MΩ
1%
R7
Q1
1RF730
C6
100µF
400V
11k
1%
R8
FLOURESCENT LAMP BALLAST
R3
MR854
LX1562
EMI FILTER
R1
AC-
L1
D5
AC+
120V
AC
100k
½W
1N4004
1N4004
D3
100 to 130V RMS
80W
95% at full load
> 0.99 at full load
< 10% at full load
followed by a step by step design procedure which walks through
component selection.
450µH
61T #22AWG
D1
-
R6
1.3Ω
Note: Thick trace on schematic shows high-frequency, high-current path in circuit.
Lead lengths must be minimized to avoid high-frequency noise problems.
FIGURE 31 — TYPICAL APPLICATION OF THE LX1562 IN AN 80W FLUORESCENT LAMP
BALLAST WITH ACTIVE POWER FACTOR CONTROL
OUTPUT VOLTAGE REQUIREMENT
Since the converter is a boost type topology, it requires the output
voltage to always be higher than the input voltage. It is
recommended to select this voltage at least 15% higher than the
maximum input voltage in order to: A) Avoid the inductor
saturation during line transience, and B) To keep the operating
frequency above the audible range at high line.
Figure 32 (next page) shows that when boost voltage is
selected near the maximum AC line, the increase in off-time could
reduce the operating frequency below the audible frequency and
cause inductor humming. In fact, Figure 32 (next page) shows
Copyright © 1996
Rev. 1.3 12/96
that for ±13% (100V to 130V) change in the line voltage the
optimum range of the operating frequency is when off-time duty
cycle (D') is between 0.57 and 0.75. This means that the boost
voltage needs to be 245V when selecting D' = 0.75 at maximum
AC line.
In this example, D' is chosen to be 0.8, to slightly reduce the
voltage rating of the back end DC to AC fluorescent lamp inverter.
This sets the boost voltage at:
VO =
130 * √2
= 230V
0.8
17
PRODUCT DATABOOK 1996/1997
LX1562/1563
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P
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D
S
A T A
H E E T
A P P L I C AT I O N I N F O R M AT I O N
(fn) Normalized Operating Frequency
OUTPUT VOLTAGE REQUIREMENT (continued)
Maximum peak input current can be calculated using:
2P O
=
IP
ηVP
0.2
fn = (1 - D') D'²
where: η ≡ Converter efficiency
VP ≡ Peak AC input voltage
0.15
assuming: η = 95%, PO = 80W, VPmin = 100√2 = 141
0.1
D' =
0.05
IP =
2 VAC
VO
ILP/min AC = 2 * 1.2 = 2.4A
η VO²
f=
f
4 LPO n
0.3
0.4
0.5
0.6
0.7
2 x 80
= 1.2A
(.95)(141)
INDUCTOR DESIGN
0.8
0.9
1.0
The inductor value is calculated assuming a 50KHz operating
frequency at the nominal AC voltage using the following equation:
(D') Off Time Duty Cycle
η
L1 =
FIGURE 32 — NORMALIZED OPERATING FREQUENCY vs.
OFF-TIME DUTY CYCLE
V O - VP
VO
T VP2
where: η
VO
VP
T
PO
4 PO
INDUCTOR PEAK CURRENT
It can be shown by referring to Figure 33 that the inductor peak
current is always twice the average input current.
L1 =
Inductor Peak
Current Envelope
IIN(t) =
IIN
=
ΣAVE [ I
L
ILP
18
TOFF
) 20 * 10-6 * (120√2)2
4 * 80
= 448µH
Figure 32 shows that at nominal AC line (D' = 0.74) the normalized
frequency is 0.142 and dropping to 0.13 at maximum line
condition. This translates to a 10% drop in operating frequency
which is still well above the audible range.
Once the inductance is known, we can either use the area
product method (AP) or the Kg (based on copper losses method),
for selecting proper core size. In this example, we apply the Kg
approach using the following steps:
Step 1: Calculate Kg using
L1 ILP2
Ω
(
)2
Kg =
PCU
B
(t) ]
1  (I L) (T) 

 =
T  2 
IINpeak = IP =
TON
230 - 120√2
230
Efficiency
Output DC voltage
Peak AC input voltage
Switching period
Output Power
choose T = 20µsec (50kHz)
IL
Average
AC Input Current
FIGURE 33 — INDUCTOR CURRENT
.95 (
≡
≡
≡
≡
≡
IL
2
ILP
2
= Inductor peak current at peak input voltage.
where:
L1
Ω
B
ILP
PCU
≡
≡
≡
≡
≡
Required inductance
1.724 * 10 -8 m
Maximum flux density
Maximum peak inductor current
Maximum copper dissipation
Assume: PCU = 1.6W (2% of total output)
2
1.724 * 10 -8  450 * 10-6 * (2.4)2 

 = 3.21 * 10-12 m5
Kg =
1.6
0.15


Copyright © 1996
Rev. 1.3 12/96
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
R O D U C T I O N
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A T A
S
H E E T
A P P L I C AT I O N I N F O R M A T I O N
INDUCTOR DESIGN (continued)
MULTIPLIER COMPONENT SELECTION
Step 2: Choose a core with higher Kg than the one calculated in
Step 1.
A A2
Kg/core = k W E
lW
Calculate R1 & R2 resistor values such that under low line AC input
the multiplier output is lower than the minimum clamp voltage.
where:
k
AW
AE
lW
Kg factor for
AW
AE
lW
Kg = 0.4
≡
≡
≡
≡
R2
√2 VAC (MIN) * K * (V EA0 (MAX) - VREF ) < VCLAMP (MIN)
R1 + R2 *
Winding coefficient (typ. k=0.4)
Bobbin window area
Effective core area
Mean length per turn
TDK PQ2625:
= 47.7mm2
= 118mm2
= 56.2mm
(47.7) (118)2
(mm)5 = 4.7 * 10-12 m5
56.2
where: K
≡ Mult. Gain
VEA)(MAX) ≡ Maximum error amp output where
multiplier is still in linear range.
This voltage is ≈ 3.5V.
For K = 0.65 & VCLAMP (MIN) = 1.1V, the ratio of R1/R2 is:
R1
> 83
R2
Assuming R1 is selected to be:
* R1 = 2.2M (1%)
Step 3: Determine number of turns.
N=
R2 =
L ILP
B AE
450 * 10-6 * 2.4
= 61 turns
0.15 * 118 * 10-6
AW
47.7
AWIRE = k
= 0.4
= 0.31mm2
N
61
= 480mil2
N=
choose #22 AWG with r = 0.0165Ω/feet resistance.
* For high input applications such as 277V, R1 must be divided
into two resistors in series to meet the maximum rated voltage of
the resistors.
To improve THD further (typ. 2-3%), a high value resistor can
be connected from the supply voltage to this pin to allow an
increase in the switch on-time at the zero crossing by adding an
effective offset at the multiplier output.
Boost voltage is programmed with R7 & R8 resistor dividers using
the following equation:
R7
R8
= 0.122cm = 48 mil
CURRENT SENSE RESISTOR
Current sense resistor, R6 is selected using the minimum multiplier output clamp voltage and the maximum inductor peak
current such that:
VCLAMP(MIN)
1.1
R6 =
=
= 0.45Ω
IL (MAX)
2.4
PR ≈
√2 VAC(MIN)
1 I
2
(1 - D'MIN), where D'MIN= 1 6 2 (MAX)
VBOOST
1
(2.4)2 (1 - 0.61) = 0.374
6
Select THREE 1.3Ω, ¼W carbon comp resistors in parallel.
Copyright © 1996
Rev. 1.3 12/96
=
VBOOST
VREF
-1,
assuming that the product of R7 and the E.A. input bias current
does not cause significant error in the output voltage setting.
Ω (for output voltage of higher than 250V,
Assuming R7 = 1MΩ
two resistors may be added in series to meet the voltage
requirement of the resistor.)
∆VERROR (106) (0.5 * 10-6) = 0.5V,
which is < 0.25% of the
output voltage.
Calculating R8:
Power dissipation is approximated by:
PR ≈
select R2 = 26.7k (1%)
ERROR AMPLIFIER COMPONENT SELECTION
RW = N * lw * r
RW = 0.185Ω
Step 4: Calculate air gap.
µO N2 AE
lg =
L
4π * 10-7 * (61) 2 * 118 * 10-6
lq =
450 * 10-6
2.2M
= 26.4k (1%)
83
R8 =
R7
VBOOST
VREF
= 11k (1%)
-1
Worst case output tolerance is the total of ±3.75% which is the sum
of ±1.5% (Ref), ±2% (resistor dividers), and ±0.25% (E.A. input
bias current).
19
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
R O D U C T I O N
D
A T A
S
H E E T
A P P L I C AT I O N I N F O R M AT I O N
ERROR AMPLIFIER COMPONENT SELECTION (continued)
SUPPLY VOLTAGE
Capacitor C5 is primarily selected to reject the output ripple
associated with twice the line frequency. For a 40dB ripple
rejection:
100
C5 ≥
where fl = 2x line frequency
2π fl R7
Resistor R3 must be selected such that it ensures converter startup at low line and is rated for high line power dissipation.
C5 ≥
100
= 0.062µF,
2π * 120 * 2.2 * 106
R3 <
Select C5 = 0.1µF
Resistor R9 can be used to improve load transient response at the
cost of loosing 1 or 2% of load regulation. The value of this resistor
should be much greater than R8:
R9 = 620k
R3 <
√2 VAC (MIN)
IST (MAX)
√2 * 100
= 466kΩ
0.3 * 10 -3
R3 > 4 VAC (MAX)
R3 > 68k ,
One way of achieving desired load transient response without
resorting to a complex mathematical model of the converter, is to
dynamically switch the output load and empirically find the
compensation network. The value of resistor R9 is selected using
the method shown in Figure 34.
≡ Maximum start-up
current
≡ Start-up voltage
VST
T ST(MAX) ≡ Maximum start-up
time at AC power-on
where: I ST
(to keep power dissipation below 0.5W)
select R3 = 120k.
Start-up time of converter is given by:
T ST (MAX) ≈ C2
VST
√2 VAC (MIN)
- IST
R3
for our application this will be 25ms/µF.
VBOOST
Min.
Load
The start-up capacitor is selected such that capacitor discharge
time is always longer than the time it takes for the bootstrap
voltage to reach above the minimum start-up threshold of the IC.
RL
C3 <
10Hz
50% D.C.
IOP * ∆t
∆VMIN
≡ Maximum dynamic
supply current of the IC
∆t
≡ Rise time of the
bootstrap voltage
∆VMIN ≡ Minimum hysteresis
voltage (4V for 1562,
where: IOP
FIGURE 34 — LOAD TRANSIENT RESPONSE CIRCUIT
IDETECT COMPONENT SELECTION
Figure 35 shows voltage envelope generated by flyback voltage
across IDET winding:
Select turns ratio n such that,
n=
n=
n (VBOOST - VAC)
VBOOST - √2 VAC (MAX)
230 - √2 * 130
IDET winding turns are
selected to be 7T.
= 29µF
Start-up time is approximately 0.8 seconds.
5V
5V
1.7V for 1563)
10 * 10-3 * 10 * 10-3
C3 <
4
Select C3 = 33µF.
The auxiliary winding turns are selected such that it provides 15V
of operating voltage.
= 0.11
nVAC
FIGURE 35 — FLYBACK VOLTAGE
ACROSS IDET WINDING
and R4 resistor:
n * VBOOST
3 * 10-3
< R4 < 500k
0.11 * 230
3 * 10-3
< R4 < 500k, or
NS ≈ NP *
VS
VO
= 61 *
VS
VO
= 4T
However, in this example IDETECT winding is used to power the IC
which eliminates the need for a third winding. This is possible
since the internal clamping of the output drive limits the gate
drive voltage to 14V (typ.) if the supply voltage exceeds this limit.
8.4k < R4 < 500k
Select R4 = 22k
20
Copyright © 1996
Rev. 1.3 12/96
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
R O D U C T I O N
D
A T A
S
H E E T
A P P L I C AT I O N I N F O R M A T I O N
POWER MOSFET SELECTION
The voltage rating of MOSFET and rectifier must be higher than
the maximum value of the output voltage.
VDS ≥ 1.2 VO MAX
VDS ≥ 282V
REFF =
The RMS current can be approximated by multiplying the RMS
current at the peak of the line by 0.7.
IRMS = 0.7 ILP √D/3
D ≡ On-time duty cycle
ILP
D = 0.39 at VAC = 100V
ILP = 2.4A
2 PO
η IP2
1
fSW ≡ Switching frequency
of inductor current
at peak input voltage.
ϕ 2π REFF fSW
if ϕ = 3%
C1 ≥
2 x 80
(.95)(1.2)2
= 117Ω
1
(.03)(2π)(117)(50000)
= 0.9µF
D
IRMS/triangle = ILP √D/3
Ω and VDS = 400V meets the above
IRF730 with RDS = 1Ω
requirements.
INPUT RECTIFIER AND CAPACITOR SELECTION
The current through each diode is a half-wave rectified sine wave.
The maximum current happens at minimum line with a peak
value of 1.2A.
IPEAK
1.2
IAVE =
=
= 0.38A
π
π
choose 1N4004 with 1A rating.
PDISS = (IAVE) (VF) = 0.38 x 0.9 = 0.344W
TJ = TA + PD x θJA
C1 ≥
REFF =
IRMS = (0.7)(2.4)(√.39/3) = 0.61A
PDC
RDS ≤
IRMS2
PDC ≡ allowable power
dissipation.
1
= 1.6Ω
RDS ≤
0.61
Assuming ϕ is the percentage of allowable input current ripple,
C1 can be calculated using the following equations:
assuming θJA = 65°C/W for 1/8"
lead length.
choose 1µF, 250V capacitor.
OUTPUT CAPACITOR SELECTION
There are mainly two criteria for selecting the output capacitor:
A large enough capacitance to maintain a low ripple voltage, and
a low ESR value in order to prevent high power dissipation due
to RMS currents.
The output capacitance can be approximated from the following
equation:
C6 ≥
IDC =
IDC
2π fLINE ∆V
80
230
where: IDC ≡ DC output current
DV ≡ Output ripple
= 0.348A
assuming 5% peak to peak ripple,
0.348
C6 ≥
= 81µF
2π (60) (11.5)
choose C6 = 100µF.
TJ = 80 + (.344)(65) = 102°C
Copyright © 1996
Rev. 1.3 12/96
21
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
D
R O D U C T I O N
A T A
S
H E E T
T Y P I C A L A P P L I C AT I O N S
120V
R3
D3
C2
R1
120V
AC
R4
D5
AC+
3
VIN
IDET
MULT
IN
C3
R2
D4
5
OUT 7
Q1
C6
R9
COMP
GND
C4
R7
D6
R5
AC-
D2
8
R10
C1
VBOOST
#26AWG
7T
LX1562
D1
D7
#22AWG
2
INV 1
C.S.
C5
R8
4
FLOURESCENT LAMP BALLAST
L1
450µH
61T
R6
6
Note: Thick trace on schematic shows high-frequency, high-current path in circuit. Lead lengths
must be minimized to avoid high-frequency noise problems.
FIGURE 36 — TYPICAL APPLICATION OF THE LX1562 IN AN 80W
FLUORESCENT LAMP BALLAST WITH ACTIVE POWER FACTOR CONTROL.
Electrical
120VAC Input — 230VDC / 80W Output
Specification
Ref.
Component
Ref.
Component
Manuf.
IC
L1
Q1
D1-D4
D5
D6
D7
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
LX1562
PQ2625/H7C1 Core
IRF730, 400V, 1Ω rds
IN4004 1A, 400V
1N4935 1A
1N4148 (improves Q1 power dissipation)
MR854, 3A, 400V
2.2MΩ, ±1%
26.7kΩ, ±1%
100kΩ, ½W
22kΩ
47Ω
1.5Ω, Carbon type (3X)
1MΩ, 1%
11kΩ, 1%
620kΩ (improves load transient response)
4.7MΩ
Linfinity
TDK
I.R.
Motorola
Motorola
Motorola
Motorola
C1
C2
C3
C4
C5
C6
QXF2E105KRPT
1µF/250V - Plastic Film (high freq.)
22µF/35V - Electrolytic
0.1µF/50V - Ceramic
0.01µF/50V - Ceramic
0.1µF/50V - Ceramic
LGQ2G101MHS A/Z*
100µF/400V - Electrolytic
Manuf.
Nichicon
Nichicon
* A = 25mm diam.
Z = 22mm diam.
A complete evaluation board is available from Linfinity Microelectronics Inc.
22
Copyright © 1996
Rev. 1.3 12/96
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
D
R O D U C T I O N
A T A
S
H E E T
T Y P I C A L A P P L I C AT I O N S
80T
R3
5
VIN
IDET
R5
AC3
MULT
IN
C3
R2
OUT 7
Q1
C6
R9
COMP
GND
C4
R7
D6
2
INV 1
4
C.S.
C5
R8
FLOURESCENT LAMP BALLAST
C2
8
R10
C1
D4
R4
#26AWG
R1
D2
VBOOST
D5
AC+
220V
AC
D7
#24AWG
#26AWG
7T
4T
D3
220V
LX1562
D1
L1
1.2mH
R6
6
Note: Thick trace on schematic shows high-frequency, high-current path in circuit. Lead lengths
must be minimized to avoid high-frequency noise problems.
FIGURE 37 — TYPICAL APPLICATION OF THE LX1562 IN AN 80W
FLUORESCENT LAMP BALLAST WITH ACTIVE POWER FACTOR CONTROL.
Electrical
220VAC Input — 400VDC / 80W Output
Specification
Ref.
Component
Ref.
Component
Manuf.
IC
L1
Q1
D1-D4
D5
D6
D7
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
LX1562
PQ2625/H7C1 Core
IRF830, 500V, 1.5Ω rds
IN4007 1A, 1000V
1N4935 1A
1N4148 (improves Q1 power dissipation)
MR856, 3A, 600V
2.2MΩ, ±1%
12kΩ, ±1%
220kΩ, ½W
22kΩ
47Ω
1.8Ω, Carbon type (2X)
1MΩ, 1%
6.19kΩ, 1%
620kΩ (improves load transient response)
2.7MΩ
Linfinity
TDK
I.R.
Motorola
Motorola
Motorola
Motorola
C1
C2
C3
C4
C5
C6*
QXF2J224KRPT
0.22µF/630V - Plastic Film
22µF/35V - Electrolytic
0.1µF/50V - Ceramic
0.01µF/50V - Ceramic
0.1µF/50V - Ceramic
LGQ2W680MHS A/Z*
68µF/450V - Electrolytic
Manuf.
Nichicon
Nichicon
* A = 25mm diam.
Z = 22mm diam.
A complete evaluation board is available from Linfinity Microelectronics Inc.
Copyright © 1996
Rev. 1.3 12/96
23
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
D
R O D U C T I O N
A T A
S
H E E T
T Y P I C A L A P P L I C AT I O N S
80T
R3
D3
R4
#26AWG
5
VIN
IDET
R5
AC3
MULT
IN
C3
R2
OUT 7
R7B
Q1
C6A
R9
COMP
INV
GND
C4
R7A
D6
C.S.
C6B
2
1
C5
R8
4
FLOURESCENT LAMP BALLAST
C2
8
R10
C1
D4
VBOOST
#26AWG
15T
3T
R1
D2
D7
#24AWG
D5
AC+
277V
AC
277V
LX1562
D1
L1
2.2mH
R6
6
Note: Thick trace on schematic shows high-frequency, high-current path in circuit. Lead lengths
must be minimized to avoid high-frequency noise problems.
FIGURE 38 — TYPICAL APPLICATION OF THE LX1562 IN AN 80W
FLUORESCENT LAMP BALLAST WITH ACTIVE POWER FACTOR CONTROL.
Electrical
277VAC Input — 480VDC / 80W Output
Specification
Ref.
Component
Ref.
Component
Manuf.
IC
L1
Q1
D1-D4
D5
D6
D7
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
LX1562
PQ2625/H7C1 Core
IRF830, 500V, 1.5Ω rds
IN4007 1A, 1000V
1N4935 1A
1N4148 (improves Q1 power dissipation)
MR856, 3A, 600V
2.2MΩ, ±1%
10kΩ, ±1%
390kΩ, ½W
22kΩ
47Ω
2.2Ω, Carbon type (2X)
499kΩ, 1% (2X)
5.23kΩ, 1%
620kΩ (improves load transient response)
2.2MΩ
Linfinity
TDK
I.R.
Motorola
Motorola
Motorola
Motorola
C1
C2
C3
C4
C5
C6
QXF2J224KRPT
0.22µF/630V - Plastic Film
22µF/35V - Electrolytic
0.1µF/50V - Ceramic
0.01µF/50V - Ceramic
0.22µF/50V - Ceramic
UVZ2F470MEH (2X)
47µF/315V - Electrolytic
Manuf.
Nichicon
Nichicon
A complete evaluation board is available from Linfinity Microelectronics Inc.
24
Copyright © 1996
Rev. 1.3 12/96
PRODUCT DATABOOK 1996/1997
LX1562/1563
S E C O N D -G E N E R AT I O N P O W E R F A C T O R C O N T R O L L E R
P
D
R O D U C T I O N
A T A
S
H E E T
T Y P I C A L A P P L I C AT I O N S
62T
R3
R4
#26AWG
8
5
VIN
IDET
R5
C1
AC3
C3
R2
D4
MULT
IN
OUT 7
Q1
C6
R9
COMP
GND
C4
R7
D6
2
INV 1
4
C.S.
C5
R8
FLOURESCENT LAMP BALLAST
C2
R1
D2
VBOOST
D5
AC+
90-265V
AC
D7
#24AWG
#26AWG
7T
3T
D3
90V - 265V
LX1562
D1
L1
450µH
R6
6
Note: Thick trace on schematic shows high-frequency, high-current path in circuit. Lead lengths
must be minimized to avoid high-frequency noise problems.
FIGURE 39 — TYPICAL APPLICATION OF THE LX1562 IN AN 80W
FLUORESCENT LAMP BALLAST WITH ACTIVE POWER FACTOR CONTROL.
Electrical
90-265VAC Input — 400VDC / 80W Output
Specification
Ref.
Component
Ref.
Component
Manuf.
IC
L1
Q1
D1-D4
D5
D6
D7
R1
R2
R3
R4
R5
R6
R7
R8
R9
LX1562
PQ2625/H7C1 Core
IRF840, 500V, 1Ω rds
IN4007 1A, 1000V
1N4935 1A
1N4148 (improves Q1 power dissipation)
MR856, 3A, 600V
2.2MΩ, ±1%
16.3kΩ, ±1%
130kΩ, ½W
22kΩ
47Ω
1Ω, Carbon type (4X)
1MΩ, 1%
6.19kΩ, 1%
620kΩ (improves load transient response)
Linfinity
TDK
I.R.
Motorola
Motorola
Motorola
Motorola
C1
C2
C3
C4
C5
C6*
QXF2J224KRPT
0.47µF/630V - Plastic Film
22µF/35V - Electrolytic
0.1µF/50V - Ceramic
0.01µF/50V - Ceramic
0.33µF/50V - Ceramic
LGQ2W680MHS A/Z*
68µF/450V - Electrolytic
Manuf.
Nichicon
Nichicon
* A = 25mm diam.
Z = 22mm diam.
A complete evaluation board is available from Linfinity Microelectronics Inc.
Copyright © 1996
Rev. 1.3 12/96
25
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