DA1017.002 29 May, 2002 MAS1017 AM Receiver IC • High Sensitivity • Very Low Power Consumption • Wide Supply Voltage Range • Power Down and Power Up Control • High Selectivity by Crystal Filter DESCRIPTION The MAS1017 AM-Receiver chip is a highly sensitive, simple to use AM receiver specially intended to receive time signals in the frequency range from 40 kHz to 100 kHz. There are only a few external components needed. The circuit has a preamplifier, wide range automatic gain control, demodulator and output comparator built in. The output signal can be processed directly with an additional digital circuitry to extract the data from the received signal. FEATURES APPLICATIONS • • • • • • • Highly Sensitive AM Receiver Wide Supply Voltage Range Very Low Power Consumption Power Down and Power Up Control Only a Few External Components Needed Wide Frequency Range from 40 kHz to 100 kHz High Selectivity by Quartz Crystal Filter • Time Signal Receiver for DCF77 (Germany) BLOCK DIAGRAM QO RFI QI Demodulator & Comparator AGC Amplifier DCF Power Supply/Biasing VDD VSS PDN PUP AGC DEC 1(6) DA1017.002 29 May, 2002 PAD LAYOUT 1588 µm VSS RFI PDN QO QI MAS1017 2094 µm VDD DEC AGC PUP DCF DIE size = 2.09 x 1.59 mm; PAD size = 100 x 100 µm Substrate is connected to VDD. Please make sure that VDD is bonded first. Note: Coordinates are calculated using VDD as a centre point. Pad Identification Name X-coordinate Y-coordinate Power Supply Voltage Demodulator Capacitor AGC Capacitor Power Up Input DCF Signal Output Quarz Filter Input Quarz Filter Output Power Down Input Receiver Input Power Supply Ground VDD DEC AGC PUP DCF QI QO PDN RFI VSS 0 µm 244 µm 520 µm 759 µm 1075 µm 1038 µm 760 µm 483 µm 243 µm -15 µm 0 µm 8 µm 8 µm 8 µm 8 µm 1625 µm 1625 µm 1625 µm 1625 µm 1605 µm Note 1 2 3 Notes: 1) See power down control table below. - Internal pull-down resistor > 1 MΩ to VSS 2) DCF = VSS when carrier amplitude at maximum; DCF = VDD when carrier amplitude is reduced (25% modulated) - the output is a current source/sink with |IOUT| > 5 µA - at power down the output is high impedance 3) See power down control logic table below. - Internal pull-up resistor > 1MΩ to VDD PDN PUP Power Down VSS VSS VDD VDD VSS VDD VSS VDD NO NO YES (In power down if both PDN and PUP are left unconnected) NO 2(6) DA1017.002 29 May, 2002 ABSOLUTE MAXIMUM RATINGS Parameter Symbol Supply Voltage Input Voltage Power Dissipation Operating Temperature Storage Temperature VDD-VSS VIN PMAX TOP TST Conditions Min Max Unit -0.3 VSS-0.3 5.0 VDD+0.3 100 70 120 V V mW o C o C Max Unit 3.60 100 0.1 100 20 0.3 V -20 -40 ELECTRICAL CHARACTERISTICS Operating Conditions: VDD = 1.4V, Temperature = 25°C Parameter Operating Voltage Current Consumption Stand-By Current Input Range Sensitivity Input Levels |lIN|<0.5 µA Output Current VOL<0.2 VDD;VOH >0.8 VDD Output Pulse Startup Time Output Delay Time Symbol VDD IDD IDDoff fIN VIN VIL VIH |IOUT| T0 T1 TStart TDelay Conditions Min Typ 1.10 40 40 0.001 VDD – 0.3 5 µA µA kHz mVrms V µA 50 150 140 230 8 50 ms ms s ms 3(6) DA1017.002 29 May, 2002 TYPICAL APPLICATION 77503 Hz QO QI FerriteAn tenna RFI DCF Dem odulator & Com parator AG C Am plifier Receiver output Pow er Supply/Biasing VDD VSS PDN AG C PUP 470 nF DEC 47 nF +1.1V to +3.6V Note 1: Ferrite Antenna and Crystal The crystal as well as ferrite antenna frequencies are chosen according to the time signal system frequency. DCF-77 transmitter frequency is 77.5 kHz. The ferrite antenna center frequency has to be tuned to 77.5 kHz. The optimal crystal frequency is 77503 Hz but also 77500 Hz crystal can be used. The shunt capacitance of the crystal should be as close as possible to internal shunt capacitance compensation capacitor of 0.75 pF for optimal noise filtering. Note 2: AGC and DEC Capacitors The AGC and DEC capacitors should have low leakage currents due to very small 40 nA signal currents through the capacitors. The insulation resistance of these capacitors should be higher than 70 MΩ. Also probes with at least 100 MΩ impedance should be used for voltage probing of AGC and DEC pins. 4(6) DA1017.002 29 May, 2002 SAMPLES IN SBDIL 20 PACKAGE NC 1 VDD 2 NC 3 20 VSS 19 NC 18 RFI DEC 4 17 PDN AGC 5 16 NC NC 6 15 QO PUP 7 14 NC DCF 8 13 QI NC NC 9 12 NC 10 11 NC PIN DESCRIPTION Pin Name Pin NC VDD NC DEC AGC NC PUP DCF NC NC NC NC QI NC QO NC PDN RFI NC VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Type Function P Positive power supply AO AO Demodulator capacitor AGC capacitor AI DO Power up input Demodulator output AI Quartz filter input Note 1 2 3 AO Quartz filter output AI AI Power down input Receiver input G Power supply ground 4 Notes: 1) See power down control table on page 2. - Internal pull-down resistor > 1 MΩ to VSS 2) DCF = VSS when carrier amplitude at maximum; DCF = VDD when carrier amplitude is reduced (25% modulated) - the output is a current source/sink with |IOUT| > 5 µA - at power down the output is high impedance 3) Pin 14 between quartz crystal filter pins must be connected to VSS to eliminate package leadframe parasitic capacitances disturbing the crystal filter performance. All other NC (Not Connected) pins are also recommended to be connected to VSS to minimize noise coupling. 4) See power down control logic table on page 2. - Internal pull-up resistor > 1MΩ to VDD 5(6) DA1017.002 29 May, 2002 ORDERING INFORMATION Product Code Product Package MAS1017ATC1 MAS1017ATC1-1 AM-Receiver IC AM-Receiver IC Wafer, EWS-tested Dice on sticky tape Comments wafer thickness 400 µm wafer thickness 400 µm, sawn wafer, tape ring 6”, non UV tape, tape not expanded Please contact Micro Analog Systems Oy for other wafer thickness, sawn wafer delivery as well as SMD package options. LOCAL DISTRIBUTOR MICRO ANALOG SYSTEMS OY CONTACTS Micro Analog Systems Oy Kamreerintie 2, P.O.Box 51 FIN-02771 Espoo, FINLAND Tel. +358 9 80 521 Fax +358 9 805 3213 http://www.mas-oy.com NOTICE Micro Analog Systems Oy reserves the right to make changes to the products contained in this data sheet in order to improve the design or performance and to supply the best possible products. Micro Analog Systems Oy assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights unless otherwise specified in this data sheet, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Micro Analog Systems Oy makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. 6(6)