KIT ATION EVALU E L B A AVAIL 19-2197; Rev 2; 1/08 2.7Gbps Dual Mux/Buffer with Loopback The MAX3783 is a dual serial multiplexer (mux) and buffer with selectable line-side loopback for system interconnect and serial backplane applications up to 2.7Gbps. Each independent channel consists of a transmitter with fanout of two and a receiver with a 2:1 input mux. Selectable loopback paths support system testing. Operating from a single 3.3V supply, this device has current-mode logic (CML) inputs and outputs, which can be AC-coupled for PECL compatibility, if desired. The IC is packaged in a compact 48-pin TQFP-EP package with exposed pad. Typical power consumption is 1.12W. Features ♦ Provides Redundant Serial I/O ♦ 11ps Deterministic Jitter ♦ Selectable Loopback ♦ On-Chip 50Ω Termination Resistors ♦ 3.3V Power Supply ♦ Two-Port Integration Ordering Information Applications 2.7Gbps Serial Communications PART TEMP RANGE PIN-PACKAGE System Interconnect MAX3783UCM 0°C to +85°C 48 TQFP-EP* Serial Backplane MAX3783UCM+ 0°C to +85°C 48 TQFP-EP* Fail-Over and Protection Switching *EP = Exposed pad. + Denotes a lead-free package. Pin Configuration 37 38 39 40 41 42 43 44 45 46 47 48 SELA VCC SOA+ SOAVCC LO1A+ LO1AVCC LO2A+ LO2AVCC GND Typical Application Circuit appears at end of data sheet. GND 1 36 SIASIA+ VCC LB1A 2 35 3 34 4 33 5 32 LB2A LB1B 6 LB2B VCC SIB+ 8 29 9 28 10 27 11 26 12 25 GND GND LI1BLI1B+ VCC LI2BLI2B+ 24 23 22 21 20 19 18 17 16 15 14 30 VCC LI1A+ LI1A- SELB VCC SOB+ SOBVCC LO1B+ LO1BVCC LO2B+ LO2BVCC GND 13 SIBGND 31 MAX3783 7 LI2A+ LI2A- TQFP-EP* *EXPOSED PAD MUST BE SOLDERED TO SUPPLY GROUND ON THE CIRCUIT BOARD. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX3783 General Description MAX3783 2.7Gbps Dual Mux/Buffer with Loopback ABSOLUTE MAXIMUM RATINGS Supply Voltage, VCC ...............................................-0.5V to 4.0V Continuous Current at Serial Outputs...............................±36mA Voltage at SEL_, LB_ Pins ..........................-0.5V to (VCC + 0.5V) Common-Mode Input Voltage (SI_, LI_) .....-0.5V to (VCC + 0.5V) Differential Input Voltage (SI_, LI_) (Note 1) .......................±2.8V Continuous Power Dissipation (TA = +85°C) 48-Pin TQFP-EP (derate 27mW/°C above +85°C) .........1.76W Storage Ambient Temperature ..........................-55°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Note 1: The sum of the common-mode voltage and differential voltage on any input pin must be within -0.5V to (VCC + 0.5V). Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = 3.0V to 3.6V, serial data rate = 2.75Gbps, TA = 0°C to +85°C. Typical values at VCC = 3.3V, TA = +25°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS Maximum Serial Data Rate Power Dissipation ICC CML Differential Output Voltage VOD CML Differential Input Voltage VID CML Input Impedance TYP 3.125 AC-coupled inputs, outputs Supply Current CML Output Impedance MIN 2.75 R OUT RIN RL = 50 to VCC, or 100 differential (Note 2) Single ended Differential 1.12 MAX UNITS Gbps 1.68 W 340 466 mA 1200 1500 2200 mVp-p 200 1600 2200 mVp-p 42.5 50 57.5 85 100 116 2 psRMS psp-p Random Jitter (Note 3) 1 Deterministic Jitter (Notes 3, 4, 5) 11 25 CML Output Edge Speed (20% to 80%) 2.5Gbps input (Note 6) 70 135 1.25Gbps input (Note 3) 80 200 Propagation Delay LI_ to SO_, SI_ to LO_, LI_ to LO_ (Note 3) 340 500 Multiplexer Switch Time SEL_ or LB_ to valid output TTL Input Current High VIH = +2.0V to (VCC +0.3V) 180 μA TTL Input Current Low VIL = -0.3V to +0.8V 440 μA tR, tF 9 ps ps ns Tested using a repeating 1010 pattern at 500Mbps. AC specifications are guaranteed by design and characterization. Deterministic jitter is measured with a repeating K28.5 pattern. With the peak-to-peak input swing on the selected (transmitted) CML input equal to or greater than that on the nonselected inputs. Note 6: AC specifications are guaranteed by test. Note 2: Note 3: Note 4: Note 5: 2 _______________________________________________________________________________________ 2.7Gbps Dual Mux/Buffer with Loopback ELECTRICAL EYE DIAGRAM 3.125 Gbps, K28.5 PATTERN MAX3783 toc02 195mV/ div 195mV/ div 88ps/div 88ps/div 88ps/div CML DIFFERENTIAL OUTPUT VOLTAGE vs. CML DIFFERENTIAL INPUT VOLTAGE SUPPLY CURRENT vs. TEMPERATURE 1.60 MAX3783 toc04 500 450 MAX3783 toc05 195mV/ div MEASURED USING 1010 PATTERN, 500Mbps 1.55 400 VOD (V) 1.50 350 1.45 300 250 1.40 0 15 30 45 60 75 90 200 700 1200 1700 TEMPERATURE (°C) VID (mV) DETERMINISTIC JITTER vs. CML DIFFERENTIAL INPUT VOLTAGE MULITPLEXER SWITCH TIME MAX3783 toc06 25 20 2200 MAX3783 toc07 SUPPLY CURRENT (mA) MAX3783 toc03 ELECTRICAL EYE DIAGRAM 2.75 Gbps, K28.5 PATTERN MAX3783 toc01 ELECTRICAL EYE DIAGRAM 2.75 Gbps, 223 - 1 PRBS PATTERN DJ (ps) LO2A+ 15 10ns 3.125Gbps 9ns 10 LB2A LO2A- 2.75Gbps 5 0 200 700 1200 1700 2200 10ns/div VID (mV) _______________________________________________________________________________________ 3 MAX3783 Typical Operating Characteristics (VCC = 3.3V, TA = +25°C, unless otherwise noted.) 2.7Gbps Dual Mux/Buffer with Loopback MAX3783 Pin Description PIN NAME 1, 12, 24, 30, 31, 37 GND Supply Ground 2 SIA- Serial Input A Negative, CML 3 SIA+ Serial Input A Positive, CML 4, 9, 14, 17, 20, 23, 27, 34, 38, 41, 44, 47 VCC +3.3V Supply 5 LB1A Line Out 1A Loopback Mode Select. TTL low selects loopback. 6 LB2A Line Out 2A Loopback Mode Select. TTL low selects loopback. 7 LB1B Line Out 1B Loopback Mode Select. TTL low selects loopback. 8 LB2B Line Out 2B Loopback Mode Select. TTL low selects loopback. 10 SIB+ Serial Input B Positive, CML 11 SIB- Serial Input B Negative, CML 13 SELB Serial Output B Input Select, TTL 15 SOB+ Serial Output B Positive, CML 16 SOB- 18 LO1B+ Line Out 1B Positive, CML 19 LO1B- Line Out 1B Negative, CML 21 LO2B+ Line Out 2B Positive, CML 22 LO2B- Line Out 2B Negative, CML 25 LI2B+ Line In 2B Positive, CML 26 LI2B- Line In 2B Negative, CML 28 LI1B+ Line In 1B Positive, CML 29 LI1B- Line In 1B Negative, CML 32 LI1A- Line In 1A Negative, CML 33 LI1A+ Line In 1A Positive, CML 35 LI2A- Line In 2A Negative, CML 36 LI2A+ Line In 2A Positive, CML 39 LO2A- Line Out 2A Negative, CML 40 LO2A+ Line Out 2A Positive, CML 42 LO1A- Line Out 1A Negative, CML 43 LO1A+ Line Out 1A Positive, CML 45 SOA- Serial Output A Negative, CML 46 SOA+ Serial Output A Positive, CML 48 SELA Exposed Pad EP 4 FUNCTION Serial Output B Negative, CML Serial Out A Input Select, TTL Ground. Must be soldered to the circuit board for proper thermal and electrical performance (see the Exposed-Pad (EP) Package section). _______________________________________________________________________________________ 2.7Gbps Dual Mux/Buffer with Loopback The input amplifiers accept CML or AC-coupled PECL signals and each input has an on-chip 100Ω differential impedance for optimal termination, as shown in Figure 1. MAX3783 SOA 2 1 CML 0 CML 2 LI1A CML VCC 15kΩ 2 LI2A VCC 1 MAX3783 CML SELA 2 LO2A IN+ VCC 0 50Ω 1.2kΩ 15kΩ VCC - 0.5V LB2A SIA CML 2 VCC 50Ω 1 CML 2 LO1A IN- VCC 0 15kΩ LB1A Figure 1. Input Structure 1 SOB 2 CML 2 LI1B CML VCC CML 0 15kΩ 2 LI2B 1 CML SELB 2 LO2B VCC 0 Control Lines TTL-compatible control lines are provided to select the MAX3783’s operating mode (Table 1). SELA and SELB set the mux for channels A and B, respectively, to select LI1_ or LI2_ to connect to the SO_ output. LB1A, LB1B, LB2A, and LB2B enable loopback mode for each of the four LO_ outputs. All control lines are internally pulled high through 15kΩ resistors. 15kΩ LB2B SIB 2 CML Table 1. Operating Modes 1 CML 2 LO1B VCC 0 SEL_ SO_ LB_ LO_ 0 LI2_ 0 LI_ 1 LI1_ 1 SI_ 15kΩ LB1B Output Buffers The outputs are high-speed CML interfaces with 50Ω back termination, as shown in Figure 2. Detailed Description Exposed-Pad (EP) Package The MAX3783 is a 2.7Gbps dual serial mux/buffer with selectable line-side loopback for system test. Each half of the MAX3783 provides a transmitter with a fanout of two and a receiver with a 2:1 mux, as shown in the functional diagram. The exposed pad on the 48-pin TQFP-EP provides a very low thermal-resistance path for heat removal from the IC. The pad is also electrical ground on the MAX3783 and must be soldered to the circuit board for proper thermal and electrical performance. _______________________________________________________________________________________ 5 MAX3783 Input Stages Functional Diagram 2.7Gbps Dual Mux/Buffer with Loopback MAX3783 Chip Information TRANSISTOR COUNT: 2816 PROCESS: BiPOLAR MAX3783 VCC Package Information 50Ω 50Ω (For the latest package outline information, go to www.maxim-ic.com/packages.) OUT+ OUT- PACKAGE TYPE DOCUMENT NO. 48 TQFP-EP 21-0065 32mA Figure 2. CML Output Structure 6 _______________________________________________________________________________________ 2.7Gbps Dual Mux/Buffer with Loopback VCC VCC LO1A+ IN SOA+ IN LO1ASOA- SERDES A LI1A+ OUT SIA+ LI1A- OUT SIA- SWITCH 1 LO1B+ IN MAX3783 SELA LO1B- LI1B+ OUT SELB LI1BLB1A LB2A LB1B LO2A+ LB2B IN LO2A- LI2A+ OUT LI2ASWITCH 2 SOB+ IN SOB- SERDES B LO2B+ IN LO2B- SIB+ OUT SIBLI2B+ OUT GND LI2B- NOTE: COUPLING CAPACITORS AND BIAS RESISTORS ARE OPTIONAL, SHOWN FOR LVPECL OPERATION. REFER TO APPLICATION NOTES HFAN-01.0 AND HFAN-01.1 REGARDING LVPECL/CML INTERFACE. THIS SYMBOL INDICATES A CONTROLLED-IMPEDANCE TRANSMISSION LINE OF CHARACTERISTIC IMPEDANCE Z0 = 50Ω. _______________________________________________________________________________________ 7 MAX3783 Typical Application Circuit MAX3783 2.7Gbps Dual Mux/Buffer with Loopback Revision History REVISION NUMBER REVISION DATE 0 10/01 1 2 DESCRIPTION PAGES CHANGED Initial release. — 3/06 Added lead-free device to the Ordering Information table. 1 1/08 In the Electrical Characteristics table, modified Note 2 and added Note 6 for tR, tF; replaced package outline drawings with table. 2, 8, 9 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.