19-3656; Rev 1; 2/07 1A, 40V, MAXPower Step-Down DC-DC Converters Features The MAX5080/MAX5081 are 250kHz PWM step-down DC-DC converters with an on-chip, 0.3Ω high-side switch. The input voltage range is 4.5V to 40V for the MAX5080 and 7.5V to 40V for the MAX5081. The output is adjustable from 1.23V to 32V and can deliver up to 1A of load current. Both devices utilize a voltage-mode control scheme for good noise immunity in the high-voltage switching environment and offer external compensation allowing for maximum flexibility with a wide selection of inductor values and capacitor types. The switching frequency is internally fixed at 250kHz and can be synchronized to an external clock signal through the SYNC input. Light load efficiency is improved by automatically switching to a pulse-skip mode. ♦ 4.5V to 40V (MAX5080) or 7.5V to 40V (MAX5081) Input Voltage Range ♦ 1A Output Current ♦ VOUT Range From 1.23V to 32V ♦ Internal High-Side Switch ♦ Fixed 250kHz Internal Oscillator ♦ Automatic Switchover to Pulse-Skip Mode at Light Loads ♦ External Frequency Synchronization ♦ Thermal Shutdown and Short-Circuit Protection ♦ Operates Over the -40°C to +125°C Temperature Range All devices include programmable undervoltage lockout and soft-start. Protection features include cycle-bycycle current limit, hiccup-mode output short-circuit protection, and thermal shutdown. Both devices are available in a space-saving, high-power (2.7W), 16-pin TQFN package and are rated for operation over the -40°C to +125°C temperature range. ♦ Space-Saving (5mm x 5mm) High-Power 16-Pin TQFN Package Ordering Information FireWire® Power Supplies Automotive Distributed Power Industrial PINPACKAGE PKG CODE PART TEMP RANGE MAX5080ATE -40°C to +125°C 16 TQFN-EP* T1655-2 MAX5081ATE -40°C to +125°C 16 TQFN-EP* T1655-2 Applications *EP = Exposed pad. Pin Configurations appear at end of data sheet. FireWire is a registered trademark of Apple Computer, Inc. Typical Operating Circuits VIN 4.5V TO 40V D1 CF IN DVREG C- CBST BST C+ L1 R1 LX VOUT C6 REG C1 R3 C5 D2 MAX5080 R6 ON/OFF FB C8 SYNC SGND PGND R2 SS COMP R5 C2 C7 R4 CSS PGND PGND Typical Operating Circuits continued at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX5080/MAX5081 General Description MAX5080/MAX5081 1A, 40V, MAXPower Step-Down DC-DC Converters ABSOLUTE MAXIMUM RATINGS TJ = +125°C.........................................................................3A TJ = +150°C.........................................................................2A Continuous Power Dissipation* (TA = +70°C) 16-Pin TQFN (derate 33.3mW/°C above +70°C) ...2666.7mW 16-Pin TQFN (θJA)........................................................30°C/W 16-Pin TQFN (θJC).......................................................1.7°C/W Operating Temperature Range .........................-40°C to +125°C Maximum Junction Temperature .....................................+150°C Storage Temperature Range .............................-60°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C *As per JEDEC 51 Standard IN, ON/OFF to SGND..............................................-0.3V to +45V LX to SGND .................................................-0.3V to (VIN + 0.3V) BST to SGND ................................................-0.3V to (VIN + 12V) BST to LX................................................................-0.3V to +12V PGND to SGND .....................................................-0.3V to +0.3V REG, DVREG, SYNC to SGND ...............................-0.3V to +12V FB, COMP, SS to SGND ...........................-0.3V to (VREG + 0.3V) C+ to PGND (MAX5080 only)................(VDVREG - 0.3V) to +12V C- to PGND (MAX5080 only) ................-0.3V to (VDVREG + 0.3V) Continuous current through internal power MOSFET (pins 11/12 connected together and pins 13/14 connected together) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN = VON/OFF = 12V, VREG = VDVREG, VSYNC = PGND = SGND, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA= + 25°C.) (Note 1) PARAMETER Input Voltage Range SYMBOL VIN Undervoltage Lockout Threshold UVLO Undervoltage Lockout Hysteresis UVLOHYST Switching Supply Current (PWM Operation) ISW CONDITIONS MIN TYP MAX MAX5080 4.5 40 MAX5081 7.5 40 VIN rising, MAX5080 3.9 4.2 VIN rising, MAX5081 6.8 7.3 MAX5080 0.4 MAX5081 0.7 VFB = 0V, MAX5080 10.5 VFB = 0V, MAX5081 9.5 UNITS V V V mA VIN = 12V, VOUT = 3.3V, IOUT = 1A 84 Efficiency VIN = 4.5V, VOUT = 3.3V, IOUT = 1A (MAX5080) 88 No-Load Supply Current (PFM Operation) MAX5080 1.4 2.5 MAX5081 1.3 2.3 VON/OFF = 0V, VIN = 40V 200 300 µA 1.23 1.25 V +250 nA Shutdown Current ISHDN % mA ON/OFF CONTROL Input Voltage Threshold VON/ OFF VON/ OFF rising 1.20 VON/OFF = 0 to 40V -250 Input Voltage Hysteresis 0.12 Input Bias Current V ERROR AMPLIFIER/SOFT-START Soft-Start Current ISS 8 15 24 µA Reference Voltage (Soft-Start) VSS 1.215 1.228 1.240 V FB Regulation Voltage VFB 1.215 1.228 1.240 V ICOMP = -500µA to +500µA FB Input Range 0 1.5 V FB Input Current -250 +250 nA 0.25 4.50 V COMP Voltage Range ICOMP = -500µA to +500µA Open-Loop Gain 80 dB Unity-Gain Bandwidth 1.8 MHz 2 _______________________________________________________________________________________ 1A, 40V, MAXPower Step-Down DC-DC Converters (VIN = VON/OFF = 12V, VREG = VDVREG, VSYNC = PGND = SGND, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA= + 25°C.) (Note 1) PARAMETER SYMBOL FB Offset Voltage CONDITIONS ICOMP = -500µA to +500µA MIN TYP -5 MAX UNITS +5 mV 275 kHz OSCILLATOR Frequency fSW Maximum Duty Cycle DMAX VSYNC = 0V 225 VSYNC = 0V, VIN = 4.5V, MAX5080 87 VSYNC = 0V, VIN = 7.5V, MAX5081 87 VSYNC = 0V, VIN ≤ 40V 87 SYNC High-Level Voltage 250 % 2.2 V SYNC Low-Level Voltage SYNC Frequency Range fSYNC PWM Modulator Gain 150 fSYNC = 150kHz to 350kHz Ramp Level Shift (Valley) 0.8 V 350 kHz 10 V/V 0.3 V POWER SWITCH 0.6 Ω VBST - VLX = 6V 0.3 Switch Gate Charge VBST - VLX = 6V 6 Switch Leakage Current VIN = 40V, VLX = VBST = 0V 10 µA BST Leakage Current VBST = VLX = VIN = 40V 10 µA C- Output Voltage Low MAX5080 only, sinking 10mA 0.1 V C- Output Voltage High MAX5080 only, relative to DVREG, sourcing 10mA 0.1 V DVREG to C+ On-Resistance MAX5080 only, sourcing 10mA 10 Ω LX to PGND On-Resistance Sinking 10mA 12 Ω Switch On-Resistance nC CHARGE PUMP CURRENT-LIMIT COMPARATOR Pulse-Skip Threshold IPFM 100 200 300 mA Cycle-by-Cycle Current Limit IILIM 1.4 2 2.6 A Number of Consecutive ILIM Events to Hiccup 7 Hiccup Timeout Clock periods 512 INTERNAL VOLTAGE REGULATOR Output Voltage Line Regulation Load Regulation Dropout Voltage VREG MAX5080 4.75 5 5.25 MAX5081 7.6 8 8.4 VIN = 5.5V to 40V, MAX5080 1 VIN = 9.0V to 40V, MAX5081 1 IREG = 0 to 20mA 0.25 VIN = 4.5V, IREG = 20mA, MAX5080 0.5 VIN = 7.5V, IREG = 20mA, MAX5081 0.5 V mV/V V V _______________________________________________________________________________________ 3 MAX5080/MAX5081 ELECTRICAL CHARACTERISTICS (continued) ELECTRICAL CHARACTERISTICS (continued) (VIN = VON/OFF = 12V, VREG = VDVREG, VSYNC = PGND = SGND, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA= + 25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS THERMAL SHUTDOWN Thermal Shutdown Temperature Temperature rising +160 °C 20 °C Thermal Shutdown Hysteresis Note 1: 100% production tested at TA = +25°C and TA = TJ = +125°C. Limits at -40°C are guaranteed by design. Typical Operating Characteristics (VIN = 12V, see Figure 5 (MAX5080) and Figure 6 (MAX5081), TA = +25°C, unless otherwise noted.) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.20 -15 10 35 60 85 110 135 0 -40 -15 10 35 60 85 110 -40 135 -15 10 35 60 85 110 TEMPERATURE (°C ) SHUTDOWN SUPPLY CURRENT vs. INPUT VOLTAGE (MAX5080) SHUTDOWN SUPPLY CURRENT vs. INPUT VOLTAGE (MAX5081) NO-LOAD SUPPLY CURRENT vs. INPUT VOLTAGE (MAX5080) 150 TA = +25°C 125 TA = -40°C 100 75 50 VON/OFF = 0V 0 5 10 15 20 25 INPUT VOLTAGE (V) 30 35 40 TA = +85°C 200 175 150 125 100 75 50 25 0 TA = -40°C TA = +25°C 135 MAX5080 toc06 250 225 4.0 MAX5080 toc05 TA = +135°C 3.5 SUPPLY CURRENT (mA) 175 300 275 SHUTDOWN SUPPLY CURRENT (µA) MAX5080 toc04 TA = +85°C 200 0 0.05 TEMPERATURE (°C) TA = +135°C 25 0.10 TEMPERATURE (°C) 250 225 0.15 0.1 0 -40 4 0.9 MAX5080 toc03 0.8 1.0 MAX5080 toc02 0.9 UNDERVOLTAGE LOCKOUT HYSTERESIS (V) MAX5080 toc01 UNDERVOLTAGE LOCKOUT HYSTERESIS (V) 1.0 ON/OFF THRESHOLD HYSTERESIS vs. TEMPERATURE UNDERVOLTAGE LOCKOUT HYSTERESIS vs. TEMPERATURE (MAX5081) ON/OFF THRESHOLD HYSTERESIS (V) UNDERVOLTAGE LOCKOUT HYSTERESIS vs. TEMPERATURE (MAX5080) SHUTDOWN SUPPLY CURRENT (µA) MAX5080/MAX5081 1A, 40V, MAXPower Step-Down DC-DC Converters 3.0 2.5 TA = +135°C TA = +85°C 2.0 1.5 1.0 TA = +25°C TA = -40°C 0.5 VON/OFF = 0V 0 0 5 10 15 20 25 INPUT VOLTAGE (V) 30 35 40 0 5 10 15 20 25 INPUT VOLTAGE (V) _______________________________________________________________________________________ 30 35 40 1A, 40V, MAXPower Step-Down DC-DC Converters MAXIMUM DUTY CYCLE vs. INPUT VOLTAGE (MAX5080) VIN = 4.5V 250 248 246 VIN = 40V 98 94 92 90 88 86 96 94 92 90 88 86 244 84 84 242 82 82 240 80 10 35 60 85 110 80 0 135 5 10 15 20 25 30 40 35 0 5 10 INPUT VOLTAGE (V) TEMPERATURE (°C) 2.5 175 80 150 125 40 100 20 PHASE 0 75 -20 50 100 1000 10,000 MAX5080 2.4 OUTPUT CURRENT LIMIT (A) 100 GAIN 20 25 30 35 40 OUTPUT CURRENT LIMIT vs. INPUT VOLTAGE MAX5080 toc10 60 15 INPUT VOLTAGE (V) OPEN-LOOP GAIN/PHASE vs. FREQUENCY PHASE (DEGREES) -15 GAIN (dB) -40 MAX5080 toc11 252 96 MAXIMUM DUTY CYCLE (%) 98 254 100 MAX5080 toc08 256 MAXIMUM DUTY CYCLE (%) 258 OPERATING FREQUENCY (kHz) 100 MAX5080 toc07 260 MAXIMUM DUTY CYCLE vs. INPUT VOLTAGE (MAX5081) MAX5080 toc09 OPERATING FREQUENCY vs. TEMPERATURE TA = +25°C TA = -40°C 2.3 2.2 2.1 2.0 1.9 TA = +85°C 1.8 TA = +135°C 1.7 1.6 0 0.001 0.01 0.1 1 10 FREQUENCY (kHz) 1.5 0 5 10 15 20 25 30 35 40 INPUT VOLTAGE (V) TURN-ON/OFF WAVEFORM TURN-ON/OFF WAVEFORM MAX5080 toc13 MAX5080 toc12 ILOAD = 100mA ILOAD = 1A VON/OFF 2V/div VON/OFF 2V/div VOUT 2V/div VOUT 2V/div 2ms/div 2ms/div _______________________________________________________________________________________ 5 MAX5080/MAX5081 Typical Operating Characteristics (continued) (VIN = 12V, see Figure 5 (MAX5080) and Figure 6 (MAX5081), TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (VIN = 12V, see Figure 5 (MAX5080) and Figure 6 (MAX5081), TA = +25°C, unless otherwise noted.) OUTPUT VOLTAGE vs. TEMPERATURE EFFICIENCY vs. LOAD CURRENT MAX5080 3.34 ILOAD = 0A 3.32 3.30 3.28 ILOAD = 1A 3.26 70 VIN = 7.5V 20 -15 10 35 60 85 110 135 VIN = 24V 40 30 -40 VIN = 12V 50 3.22 3.20 VIN = 4.5V 60 3.24 VIN = 40V MAX5080 0 0.001 0.01 1 0.1 TEMPERATURE (°C) LOAD CURRENT (A) EFFICIENCY vs. LOAD CURRENT LOAD-TRANSIENT RESPONSE MAX5080 toc17 VOUT = 5V 80 MAX5080 toc16 100 90 VOUT = 3.3V 80 EFFICIENCY (%) OUTPUT VOLTAGE (V) 3.36 90 MAX5080 toc15 3.38 100 MAX5080 toc14 3.40 EFFICIENCY (%) MAX5080/MAX5081 1A, 40V, MAXPower Step-Down DC-DC Converters VIN = 7.5V VIN = 12V 70 VIN = 12V, IOUT = 0.25A TO 1A MAX5080 VOUT AC-COUPLED 200mV/div VIN = 24V 60 50 VIN = 40V 40 ILOAD 500mA/div 30 0 20 0 0.001 MAX5081 0.01 0.1 1 200µs/div LOAD CURRENT (A) 6 _______________________________________________________________________________________ 1A, 40V, MAXPower Step-Down DC-DC Converters LX VOLTAGE AND INDUCTOR CURRENT LOAD-TRANSIENT RESPONSE MAX5080 toc19 MAX5080 toc18 VIN = 4.5V, IOUT = 0.25A TO 1A MAX5080 VLX 5V/div VOUT AC-COUPLED 500mV/div ILOAD 500mA/div INDUCTOR CURRENT 200mA/div 0 ILOAD = 40mA 2µs/div 200µs/div LX VOLTAGE AND INDUCTOR CURRENT LX VOLTAGE AND INDUCTOR CURRENT MAX5080 toc20 MAX5080 toc21 0 VLX 5V/div VLX 5V/div INDUCTOR CURRENT 100mA/div INDUCTOR CURRENT 500mA/div 0 ILOAD = 140mA 2µs/div ILOAD = 1A 2µs/div _______________________________________________________________________________________ 7 MAX5080/MAX5081 Typical Operating Characteristics (continued) (VIN = 12V, see Figure 5 (MAX5080) and Figure 6 (MAX5081), TA = +25°C, unless otherwise noted.) MAX5080/MAX5081 1A, 40V, MAXPower Step-Down DC-DC Converters Pin Description PIN NAME FUNCTION MAX5080 MAX5081 1 1 COMP 2 2 FB Feedback Regulation Point. Connect to the center tap of a resistive divider from converter output to SGND to set the output voltage. The FB voltage regulates to the voltage present at SS (1.23V). ON/OFF and External UVLO Control. The ON/OFF rising threshold is set to approximately 1.23V. Connect to the center tap of a resistive divider from IN to SGND to set the UVLO (rising) threshold. Pull ON/OFF to SGND to shut down the device. ON/OFF can be used for powersupply sequencing. Connect to IN for always-on operation. Error Amplifier Output. Connect COMP to the compensation feedback network. 3 3 ON/OFF 4 4 SS 5 5 SYNC 6 6 DVREG 7 — C+ Charge-Pump Flying Capacitor Positive Connection Charge-Pump Flying Capacitor Negative Connection 8 — C- — 7, 8 N.C. Soft-Start and Reference Output. Connect a capacitor from SS to SGND to set the soft-start time. See the Applications Information section to calculate the value of the CSS capacitor. Oscillator Synchronization Input. SYNC can be driven by an external 150kHz to 350kHz clock to synchronize the MAX5080/MAX5081’s switching frequency. Connect SYNC to SGND when not used. Gate Drive Supply for High-Side MOSFET Driver. Connect externally to REG for MAX5080. Connect to REG and the anode of the boost diode for MAX5081. No Connection. Not internally connected. Can be left floating or connected to SGND. Power Ground Connection. Connect the input filter capacitor’s negative terminal, the anode of the freewheeling diode, and the output filter capacitor’s return to PGND. Connect externally to SGND at a single point near the input capacitor’s return terminal. 9 9 PGND 10 10 BST 11, 12 11, 12 LX Source Connection of Internal High-Side Switch. Connect the inductor and rectifier diode’s cathode to LX. 13, 14 13, 14 IN Supply Input Connection. Connect to an external voltage source from 4.5V to 40V (MAX5080) or a 7.5V to 40V (MAX5081). 15 15 REG 16 16 SGND EP EP EP High-Side Gate Driver Supply. Connect BST to the cathode of the boost diode and to the positive terminal of the boost capacitor. Internal Regulator Output. 5V output for the MAX5080 and 8V output for the MAX5081. Bypass to SGND with at least a 1µF ceramic capacitor. Signal Ground Connection. Solder the exposed pad to a large SGND plane. Connect SGND and PGND together at one point near the input bypass capacitor return terminal. Exposed Pad. Connect exposed pad to SGND. Detailed Description The MAX5080/MAX5081 are voltage-mode buck converters with internal 0.3Ω power MOSFET switches. The MAX5080 has a wide input voltage range of 4.5V to 40V. The MAX5081’s input voltage range is 7.5V to 40V. The internal low RDS_ON switch allows for up to 1A of output current. The 250kHz fixed switching frequency, external compensation, and voltage feed-forward simplify loop compensation design and allow for a variety of L and C filter components. Both devices offer an 8 automatic switchover to pulse-skipping (PFM) mode, providing low quiescent current and high efficiency at light loads. Under no load, a PFM mode operation reduces the current consumption to only 1.4mA. In shutdown, the supply current falls to 200µA. Additional features include an externally programmable undervoltage lockout through the ON/OFF pin, a programmable soft-start, cycle-by-cycle current limit, hiccup mode output short-circuit protection, and thermal shutdown. _______________________________________________________________________________________ 1A, 40V, MAXPower Step-Down DC-DC Converters IN C+ MAX5080/MAX5081 C- ON/OFF DVREG DVREG >1.23V ON <1.11V OFF LDO REG 1.23V EN LEVEL SHIFT PCLK 1.23V SGND MAX5080 REF ISS OVERL THERMAL SHDN VREF OVERLOAD MANAGEMENT EN ILIM CLK REGOK SS ILIM 1.23V REF_ILIM SSA E/A FB IN VREF PFM REF_PFM COMP HIGH-SIDE CURRENT SENSE BST LOGIC IN CPWM SYNC EN OSC LX DVREG RAMP 0.3V CLK CHARGE-PUMP MANAGEMENT PCLK SCLK PGND Figure 1. MAX5080 Simplified Block Diagram Internal Linear Regulator (REG) REG is the output terminal of a 5V (MAX5080), or 8V (MAX5081) LDO which is powered from IN and provides power to the IC. Connect REG externally to DVREG to provide power for the high-side MOSFET gate driver. Bypass REG to SGND with a ceramic capacitor of at least 1µF. Place the capacitor physically close to the MAX5080/MAX5081 to provide good bypassing. During normal operation, REG is intended for powering up only the internal circuitry and should not be used to supply power to external loads. Internal UVLO/External UVLO The MAX5080/MAX5081 provides two undervoltage lockouts (UVLOs). An internal UVLO looks at the input voltage (VIN) and is fixed at 4.1V (MAX5080) or 7.1V (MAX5081). An external UVLO is sensed and programmed at the ON/OFF pin. The external UVLO over- rides the internal UVLO when the external UVLO is higher than the internal UVLO. During startup, before any operation begins, the input voltage and the voltage at ON/OFF must exceed their respective UVLOs. The external UVLO has a rising threshold of 1.23V with 0.12V of hysteresis. Program the external UVLO by connecting a resistive divider from IN to ON/OFF to SGND. Connect ON/OFF to IN directly to disable the external UVLO. Driving ON/OFF to ground places the MAX5080/ MAX5081 in shutdown. When in shutdown the internal power MOSFET turns off, all internal circuitry shuts down and the quiescent supply current reduces to 200µA. Connect an RC network from ON/OFF to SGND to set a turn-on delay that can be used to sequence the output voltages of multiple devices. _______________________________________________________________________________________ 9 MAX5080/MAX5081 1A, 40V, MAXPower Step-Down DC-DC Converters ON/OFF IN >1.23V ON <1.11V OFF LDO REG 1.23V EN REF ISS OVERL THERMAL SHDN VREF SGND MAX5081 1.23V OVERLOAD MANAGEMENT EN ILIM CLK REGOK SS ILIM 1.23V REF_ILIM SSA E/A FB IN VREF PFM REF_PFM COMP HIGH-SIDE CURRENT SENSE BST LOGIC IN CPWM SYNC EN OSC LX DVREG RAMP 0.3V CLK ILIM BOOTSTRAP CONTROL PCLK SCLK PGND Figure 2. MAX5081 Simplified Block Diagram Soft-Start and Reference (SS) Internal Charge Pump (MAX5080) SS is the 1.23V reference bypass connection for the MAX5080/MAX5081 and also controls the soft-start period. At startup, after VIN is applied and the internal and external UVLO thresholds are reached, the device enters soft-start. During soft-start, 15µA is sourced into the capacitor (CSS) connected from SS to SGND causing the reference voltage to ramp up slowly. When VSS reaches 1.23V the output becomes fully active. Set the soft-start time (tSS) using following equation: The MAX5080 features an internal charge pump to enhance the turn-on of the internal MOSFET, allowing for operation with input voltages down to 4.5V. Connect a flying capacitor (C F) between C+ and C-, a boost diode from C+ to BST, as well as a bootstrap capacitor (CBST) between BST and LX to provide the gate drive voltage for the high-side n-channel DMOS switch. During the on-time, the flying capacitor is charged to VDVREG. During the off-time, the positive terminal of the flying capacitor (C+) is pumped to two times VDVREG and charge is dumped onto CBST to provide twice the regulator voltage across the high-side DMOS driver. Use a ceramic capacitor of at least 0.1µF for CBST and CF located as close to the device as possible. t SS = 1.23V × CSS 15µA where tSS is in seconds and CSS is in Farads. 10 ______________________________________________________________________________________ 1A, 40V, MAXPower Step-Down DC-DC Converters Gate Drive Supply (DVREG) DVREG is the supply input for the internal high-side MOSFET driver. The power for DVREG is derived from the output of the internal regulator (REG). Connect DVREG to REG externally. We recommend the use of an RC filter (1Ω and 0.47µF) from REG to DVREG to filter the noise generated by the switching of the charge pump. In the MAX5080, the high-side drive supply is generated using the internal charge pump along with the bootstrap diode and capacitor. In the MAX5081, the high-side MOSFET driver supply is generated using only the bootstrap diode and capacitor. Error Amplifier The output of the internal error amplifier (COMP) is available for frequency compensation (see the Compensation Design section). The inverting input is FB, the noninverting input SS, and the output COMP. The error amplifier has an 80dB open-loop gain and a 1.8MHz GBW product. See the Typical Operating Character-istics for the Gain and Phase vs. Frequency graph. Oscillator/Synchronization Input (SYNC) With SYNC tied to SGND, the MAX5080/MAX5081 use their internal oscillator and switch at a fixed frequency of 250kHz. For external synchronization, drive SYNC with an external clock from 150kHz to 350kHz. When driven with an external clock, the device synchronizes to the rising edge of SYNC. PWM Comparator/Voltage Feedforward a soft-start sequence. This allows the device to operate with a continuous output short circuit. During normal operation, the current is monitored at the drain of the internal power MOSFET. When the current limit is exceeded, the internal power MOSFET turns off until the next on-cycle and a counter increments. If the counter counts seven consecutive current-limit events, the device discharges the soft-start capacitor and shuts down for 512 clock periods before restarting with a soft-start sequence. Each time the power MOSFET turns on and the device does not exceed the current limit, the counter is reset. Thermal-Overload Protection The MAX5080/MAX5081 feature an integrated thermaloverload protection. Thermal-overload protection limits the total power dissipation in the device and protects it in the event of an extended thermal fault condition. When the die temperature exceeds +160°C, an internal thermal sensor shuts down the part, turning off the power MOSFET and allowing the IC to cool. After the temperature falls by 20°C, the part will restart with a soft-start sequence. Applications Information Setting the Undervoltage Lockout When the voltage at ON/OFF rises above 1.23V, the MAX5080/MAX5081 turns on. Connect a resistive divider from IN to ON/OFF to SGND to set the UVLO threshold (see Figure 5). First select the ON/OFF to the SGND resistor (R2) then calculate the resistor from IN to ON/OFF (R1) using the following equation: ⎡ VIN ⎤ R1 = R2 × ⎢ − 1⎥ ⎢⎣ VON/OFF ⎥⎦ An internal 250kHz ramp generator is compared against the output of the error amplifier to generate the PWM signal. The maximum amplitude of the ramp (VRAMP) automatically adjusts to compensate for input voltage and oscillator frequency changes. This causes the VIN/VRAMP to be a constant 10V/V across the input voltage range of 4.5V to 40V (MAX5080) or 7.5V to 40V (MAX5081) and the SYNC frequency range of 150kHz to 350kHz. where VIN is the input voltage at which the converter turns on, VON/OFF = 1.23V and R2 is chosen to be less than 600kΩ. If the external UVLO divider is not used, connect ON/OFF to IN directly. In this case, an internal undervoltage lockout feature monitors the supply voltage at IN and allows operation to start when IN rises above 4.1V (MAX5080) and 7.1V (MAX5081). Output Short-Circuit Protection (Hiccup Mode) Connect a resistive divider from OUT to FB to SGND to set the output voltage. First calculate the resistor from OUT to FB using the guidelines in the Compensation Design section. Once R3 is known, calculate R4 using the following equation: The MAX5080/MAX5081 protects against an output short circuit by utilizing hiccup-mode protection. In hiccup mode, a series of sequential cycle-by-cycle current-limit events will cause the part to shut down and restart with Setting the Output Voltage ______________________________________________________________________________________ 11 MAX5080/MAX5081 For applications that do not require a 4.5V minimum input, use the MAX5081. In this device the charge pump is omitted and the input voltage range is from 7.5V to 40V. In this situation the boost diode and the boost capacitor are still required (see the MAX5081 Typical Operating Circuit). MAX5080/MAX5081 1A, 40V, MAXPower Step-Down DC-DC Converters R4 = R3 ⎡ VOUT ⎤ − 1⎥ ⎢ ⎣ VFB ⎦ the input capacitor). The total voltage ripple is the sum of ∆VQ and ∆VESR. Calculate the input capacitance and ESR required for a specified ripple using the following equations: where VFB = 1.23V. Inductor Selection Three key inductor parameters must be specified for operation with the MAX5080/MAX5081: inductance value (L), peak inductor current (IPEAK), and inductor saturation current (ISAT). The minimum required inductance is a function of operating frequency, input-to-output voltage differential, and the peak-to-peak inductor current (∆IP-P). Higher ∆IP-P allows for a lower inductor value while a lower ∆IP-P requires a higher inductor value. A lower inductor value minimizes size and cost and improves large-signal and transient response, but reduces efficiency due to higher peak currents and higher peak-to-peak output voltage ripple for the same output capacitor. On the other hand, higher inductance increases efficiency by reducing the ripple current. Resistive losses due to extra wire turns can exceed the benefit gained from lower ripple current levels especially when the inductance is increased without also allowing for larger inductor dimensions. A good compromise is to choose ∆IP-P equal to 40% of the full load current. Calculate the inductor using the following equation: (V − V ) V L = OUT IN OUT VIN × fSW × ∆IP-P VIN and VOUT are typical values so that efficiency is optimum for typical conditions. The switching frequency (fSW) is fixed at 250kHz or can vary between 150kHz and 350kHz when synchronized to an external clock (see the Oscillator/Synchronization Input (SYNC) section). The peak-to-peak inductor current, which reflects the peak-topeak output ripple, is worst at the maximum input voltage. See the Output Capacitor Selection section to verify that the worst-case output ripple is acceptable. The inductor saturating current (ISAT) is also important to avoid runaway current during continuous output short circuit. Select an inductor with an ISAT specification higher than the maximum peak current limit of 2.6A. ∆VESR ESR = CIN = ∆IP-P ⎞ ⎛ ⎜ IOUT_MAX + ⎟ ⎝ 2 ⎠ IOUT_MAX × D(1 − D) ∆VQ × fSW where ∆IP-P = (VIN − VOUT ) × VOUT and VIN × fSW × L V D = OUT VIN IOUT_MAX is the maximum output current, D is the duty cycle, and fSW is the switching frequency. The MAX5080/MAX5081 includes internal and external UVLO hysteresis and soft-start to avoid possible unintentional chattering during turn-on. However, use a bulk capacitor if the input source impedance is high. Use enough input capacitance at lower input voltages to avoid possible undershoot below the undervoltage lockout threshold during transient loading. Output Capacitor Selection The allowable output voltage ripple and the maximum deviation of the output voltage during load steps determine the output capacitance and its ESR. The output ripple is mainly composed of ∆V Q (caused by the capacitor discharge) and ∆VESR (caused by the voltage drop across the equivalent series resistance of the output capacitor). The equations for calculating the peak-to-peak output voltage ripple are: ∆VQ = ∆IPP 16 × COUT × fSW Input Capacitor Selection The discontinuous input current of the buck converter causes large input ripple currents and therefore the input capacitor must be carefully chosen to keep the input voltage ripple within design requirements. The input voltage ripple is comprised of ∆VQ (caused by the capacitor discharge) and ∆VESR (caused by the ESR of 12 ∆VESR = ESR × ∆IP-P Normally, a good approximation of the output voltage ripple is ∆VRIPPLE ≈ ∆VESR + ∆VQ. If using ceramic capacitors, assume the contribution to the output voltage ripple from ESR and the capacitor discharge to be ______________________________________________________________________________________ 1A, 40V, MAXPower Step-Down DC-DC Converters ESR = COUT = ESL = (COUT) (C5 in the Typical Application Circuit) and its equivalent series resistance (ESR). The power modulator incorporates a voltage feed-forward feature, which automatically adjusts for variations in the input voltage resulting in a DC gain of 10. The following equations define the power modulator: GMOD(DC) = fLC = VIN VRAMP = 10 1 2π L × COUT fZESR = 1 2π × COUT × ESR The switching frequency is internally set at 250kHz or can vary from 150kHz to 350kHz when driven with an external SYNC signal. The crossover frequency (fC), which is the frequency when the closed-loop gain is equal to unity, should be set at 15kHz or below therefore: fC ≤15kHz ∆VESR ISTEP ISTEP × tRESPONSE ∆VQ ∆VESL × t STEP The error amplifier must provide a gain and phase bump to compensate for the rapid gain and phase loss from the LC double pole. This is accomplished by utilizing a type 3 compensator that introduces two zeroes and 3 poles into the control loop. The error amplifier has a low-frequency pole (fP1) near the origin. The two zeros are at: ISTEP where ISTEP is the load step, tSTEP is the rise time of the load step, and tRESPONSE is the response time of the controller. Compensation Design The MAX5080/MAX5081 use a voltage-mode control scheme that regulates the output voltage by comparing the error amplifier output (COMP) with an internal ramp to produce the required duty cycle. The output lowpass LC filter creates a double pole at the resonant frequency, which has a gain drop of -40dB/decade. The error amplifier must compensate for this gain drop and phase shift to achieve a stable closed-loop system. The basic regulator loop consists of a power modulator, an output feedback divider, and a voltage error amplifier. The power modulator has a DC gain set by VIN/VRAMP, with a double pole and a single zero set by the output inductance (L), the output capacitance fZ1 = 1 1 and fZ2 = 2π × R5 × C7 2π × (R6 + R3) × C6 and the higher frequency poles are at: fP2 = 1 and fP3 = 2π × R6 × C6 1 ⎛ C7 × C8 ⎞ 2π × R5 × ⎜ ⎟ ⎝ C7 + C8 ⎠ Compensation When fC < fZESR Figure 3 shows the error amplifier feedback as well as its gain response for circuits that use low-ESR output capacitors (ceramic). In this case fZESR occurs after fC. fZ1 is set to 0.8 x fLC(MOD) and fZ2 is set to fLC to compensate for the gain and phase loss due to the double pole. Choose the inductor (L) and output capacitor (C OUT ) as described in the Inductor and Output Capacitor Selection section. ______________________________________________________________________________________ 13 MAX5080/MAX5081 equal to 20% and 80%, respectively. ∆IP-P is the peak-topeak inductor current (see the Input Capacitors Selection section) and fSW is the converter’s switching frequency. The allowable deviation of the output voltage during fast load transients also determines the output capacitance, its ESR, and its equivalent series inductance (ESL). The output capacitor supplies the load current during a load step until the controller responds with a greater duty cycle. The response time (tRESPONSE ) depends on the closed-loop bandwidth of the converter (see the Compensation Design section). The resistive drop across the output capacitors ESR, the drop across the capacitors ESL (∆VESL), and the capacitor discharge causes a voltage droop during the loadstep. Use a combination of low-ESR tantalum/aluminum electrolyte and ceramic capacitors for better transient load and voltage ripple performance. Nonleaded capacitors and capacitors in parallel help reduce the ESL. Keep the maximum output voltage deviation below the tolerable limits of the electronics being powered. Use the following equations to calculate the required ESR, ESL, and capacitance value during a load step: MAX5080/MAX5081 1A, 40V, MAXPower Step-Down DC-DC Converters R5 C6 1 2π × C6 × 0.5 × fSW R6 = C8 C7 Since R3 >> R6, R3 + R6 can be approximated as R3. R3 is then calculated as: R6 R3 VOUT EA R4 COMP R3 ≈ REF 1 2π × fLC × C6 fP3 is set at 5xfC. Therefore C8 is calculated as: GAIN (dB) C8 = CLOSED-LOOP GAIN EA GAIN fZ1 fZ2 fC fP2 fP3 FREQUENCY Figure 3. Error Amplifier Compensation Circuit (Closed-Loop and Error-Amplifier Gain Plot) for Ceramic Capacitors Pick a value for the feedback resistor R5 in Figure 3 (values between 1kΩ and 10kΩ are adequate). C7 is then calculated as: C7 = 1 2π × 0.8 × fLC × R5 fC occurs between fZ2 and fP2. The error-amplifier gain (GEA) at fC is due primarily to C6 and R5. Therefore, GEA(fC) = 2π x fC x C6 x R5 and the modulator gain at fC is: GMOD(fC) = GMOD(DC) (2π)2 × L × COUT × fC2 C7 (2π × C7 × R5 × fP3 −1) Compensation When fC > fZESR For larger ESR capacitors such as tantalum and aluminum electrolytic ones, fZESR can occur before fC. If fZESR < fC, then fC occurs between fP2 and fP3. fZ1 and fZ2 remain the same as before however, fP2 is now set equal to fZESR. The output capacitor’s ESR zero frequency is higher than fLC but lower than the closedloop crossover frequency. The equations that define the error amplifier’s poles and zeroes (fZ1, fZ2, fP1, fP2, and fP3) are the same as before. However, fP2 is now lower than the closed-loop crossover frequency. Figure 4 shows the error amplifier feedback as well as its gain response for circuits that use higher-ESR output capacitors (tantalum or aluminum electrolytic). Pick a value for the feedback resistor R5 in Figure 4 (values between 1kΩ and 10kΩ are adequate). C7 is then calculated as: C7 = 1 2π × 0.8 × fLC × R5 The error amplifier gain between fP2 and fP3 is approximately equal to R5/R6 (given that R6 << R3). R6 can then be calculated as: Since GEA(fC) x GMOD(fC) = 1, C6 is calculated by: C6 = fC × L × COUT × 2π R5 × GMOD(DC) fP2 is set at 1/2 the switching frequency (fSW). R6 is then calculated by: 14 R6 ≈ R5 × 10 × fLC2 fC2 C6 is then calculated as: C6 = COUT × ESR R6 ______________________________________________________________________________________ 1A, 40V, MAXPower Step-Down DC-DC Converters C7 R5 C6 R6 R3 VOUT EA R4 COMP REF 2 R RON PMOSFET IRMS_MOSFET PMOSFET = I=RMS _ MOSFET2 x x ON GAIN (dB) CLOSED-LOOP GAIN fZ1 fZ2 fP2 EA GAIN fC fP3 FREQUENCY Figure 4. Error Amplifier Compensation Circuit (Closed-Loop and Error Amplifier Gain Plot) for Higher ESR Output Capacitors Since R3 >> R6, R3 + R6 can be approximated as R3. R3 is then calculated as: R3 ≈ 1 2π × fLC × C6 fP3 is set at 5xfC. Therefore, C8 is calculated as: C8 = 2 ⎡I2 PK + (I ⎤ D PK × IDC ) + I DC ⎥⎦ × ⎢⎣ 3 ∆IP−P IPK = IOUT + 2 ∆IP−P IDC = IOUT − 2 IRMS_MOSFET = C7 (2π × C7 × R5 × fP3 −1) Power Dissipation The MAX5080/MAX5081 is available in a thermally enhanced package and can dissipate up to 2.7W at TA = +70°C. When the die temperature reaches +160°C, the part shuts down and is allowed to cool. After the parts cool by 20°C, the device restarts with a soft-start. RON is the on-resistance of the internal power MOSFET (see Electrical Characteristics). The power loss due to switching the internal MOSFET: PSW = VIN × IOUT × (tR × tF ) × fSW 4 where tR and tF are the rise and fall times of the internal power MOSFET measured at LX. The power loss due to the switching supply current (ISW): PQ = VIN x ISW The total power dissipated in the device will be: PTOTAL = PMOSFET + PSW + PQ Chip Information TRANSISTOR COUNT: 4300 PROCESS: BiCMOS/DMOS ______________________________________________________________________________________ 15 MAX5080/MAX5081 The power dissipated in the device is the sum of the power dissipated from supply current (PQ), transition losses due to switching the internal power MOSFET (PSW), and the power dissipated due to the RMS current through the internal power MOSFET (PMOSFET). The total power dissipated in the package must be limited such that the junction temperature does not exceed its absolute maximum rating of +150°C at maximum ambient temperature. Calculate the power lost in the MAX5080/MAX5081 using the following equations: The power loss through the switch: C8 1A, 40V, MAXPower Step-Down DC-DC Converters MAX5080/MAX5081 Typical Application Circuits VIN 4.5V TO 40V C10 0.1µF IN C3 0.1µF DVREG C- D1 C+ C4 0.1µF BST R1 1.4MΩ LX L1 47µH REG C1 10µF ON/OFF R2 549kΩ C5 47µF D2 MAX5080 FB SYNC SGND PGND SS R6 187Ω VOUT R3 6.81kΩ C8 820pF COMP R4 4.02kΩ C9 0.047µF C2 0.1µF C6 6.8nF R5 3.01kΩ PGND C7 22nF PGND Figure 5. MAX5080 Typical Application Circuit VIN 7.5V TO 40V C10 0.1µF IN D1 C4 0.1µF BST DVREG R1 1.4MΩ LX L1 47µH REG C1 10µF ON/OFF R2 301kΩ SYNC SGND PGND C2 0.1µF PGND C5 47µF D2 MAX5081 FB SS C6 6.8nF R6 187Ω R4 4.02kΩ R5 3.01kΩ C7 22nF Figure 6. MAX5081 Typical Application Circuit 16 R3 6.81kΩ C8 820pF COMP C9 0.047µF VOUT ______________________________________________________________________________________ PGND 1A, 40V, MAXPower Step-Down DC-DC Converters VIN 7.5V TO 40V D1 IN CBST BST DVREG L1 R1 LX VOUT C6 REG C1 R3 C5 D2 MAX5081 R6 ON/OFF FB C8 SYNC SGND PGND R2 SS COMP R4 C7 R5 CSS C2 PGND PGND IN 13 IN 14 LX BST PGND LX LX BST PGND TOP VIEW LX Pin Configurations 12 11 10 9 12 11 10 9 8 C- IN 13 7 C+ IN 14 MAX5080 N.C. 7 N.C. MAX5081 SGND 16 5 SYNC 1 2 3 4 1 2 3 4 SS SYNC DVREG ON/OFF 5 6 FB 16 15 COMP SGND REG SS DVREG ON/OFF 6 FB 15 COMP REG TQFN 8 TQFN ______________________________________________________________________________________ 17 MAX5080/MAX5081 Typical Operating Circuits (continued) Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) QFN THIN.EPS MAX5080/MAX5081 1A, 40V, MAXPower Step-Down DC-DC Converters 18 ______________________________________________________________________________________ 1A, 40V, MAXPower Step-Down DC-DC Converters Revision History Pages changed at Rev 1: 1, 8, 18, 19 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19 © 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc. MAX5080/MAX5081 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)