19-1260; Rev 0; 10/97 +3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin µMAX Package ________________________Applications Automatic Calibration Gain Adjustment Transducer Drivers Process-Control I/O Boards Digitally Controlled Filters Motion-Controlled Systems µP-Controlled Systems Programmable Amplifiers/Attenuators ____________________________Features ♦ Single-Supply Operation: +4.5V to +5.25V (MAX551) +2.7V to +3.6V (MAX552) ♦ 12.5MHz 3-Wire Serial Interface ♦ SPI/QSPI and Microwire Compatible ♦ Power-On Reset Clears DAC Output to Zero ♦ Asynchronous Clear Input Clears DAC Output to Zero ♦ Voltage Mode or Bipolar Mode Operation with a Single Power Supply ♦ Schmitt-Trigger Digital Inputs for Direct Optocoupler Interface ♦ 0.4µA Supply Current ♦ 10-Pin µMAX Package ______________Ordering Information PINPACKAGE LINEARITY (LSB) PART TEMP. RANGE MAX551ACPA 0°C to +70°C 8 Plastic DIP ±1/2 MAX551BCPA MAX551ACUB MAX551BCUB 0°C to +70°C 0°C to +70°C 0°C to +70°C 8 Plastic DIP 10 µMAX 10 µMAX ±1 ±1/2 ±1 MAX551AEPA MAX551BEPA MAX551AEUB MAX551BEUB -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C 8 Plastic DIP 8 Plastic DIP 10 µMAX 10 µMAX ±1/2 ±1 ±1/2 ±1 Ordering Information continued at end of data sheet. ________________Functional Diagram _________________Pin Configurations REF RFB RFB OUT AGND* 12-BIT D/A CONVERTER VDD CLR* LOAD 12-BIT DAC REGISTER MAX551 MAX552 POWER-ON RESET SCLK 12-BIT SHIFT REGISTER *µMAX PACKAGE ONLY GND DIN TOP VIEW OUT 1 GND 2 VDD 3 MAX551 MAX552 8 RFB OUT 1 7 REF AGND 2 GND 3 6 SCLK 10 RFB 9 REF MAX551 MAX552 VDD 4 LOAD 4 5 DIN DIP 8 CLR 7 SCLK LOAD 5 6 DIN µMAX SPI and QSPI are trademarks of Motorola Inc. Microwire is a trademark of National Semiconductor Corp. ________________________________________________________________ Maxim Integrated Products 1 For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 408-737-7600 ext. 3468. MAX551/MAX552 _______________General Description The MAX551/MAX552 are 12-bit, current-output, 4-quadrant multiplying digital-to-analog converters (DACs). These devices are capable of providing unipolar or bipolar outputs when operating from either a single +5V (MAX551) or +3V (MAX552) power supply. An internal power-on-reset circuit clears all DAC registers on power-up, setting the DAC output voltage to 0V. The SPI™/QSPI™ and Microwire™-compatible 3-wire serial interface saves board space and reduces power dissipation compared with parallel-interface devices. The MAX551/MAX552 feature double-buffered interface logic with a 12-bit input register and a 12-bit DAC register. Data in the DAC register sets the DAC output voltage. Data is loaded into the input register via the serial interface. The LOAD input transfers data from the input register to the DAC register, updating the DAC output voltage. The MAX551/MAX552 are available in an 8-pin DIP package or a space-saving 10-pin µMAX package. The µMAX package provides an asynchronous clear (CLR) input that clears all DAC registers when pulled to GND, setting the output voltage to 0V. MAX551/MAX552 +3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin µMAX Package ABSOLUTE MAXIMUM RATINGS VDD to GND..............................................................................6V REF, RFB to GND.................................................................±12V Digital Inputs (SCLK, DIN, LOAD, CLR) to GND .....................................................................-0.3V to 6V OUT to GND ...............................................-0.3V to (VDD + 0.3V) AGND to GND ............................................-0.3V to (VDD + 0.3V) Continuous Power Dissipation (TA = +70°C) Plastic DIP (derate 9.09mW/°C above +70°C) .............727mW µMAX (derate 5.60mW/°C above +70°C) .....................444mW Operating Temperature Ranges MAX55_ _C_ _......................................................0°C to +70°C MAX55_ _E_ _ ...................................................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10sec) .............................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS—MAX551 (VDD = +4.5V to +5.25V, VREF = 5V, OUT = AGND = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE Resolution N 12 Bits MAX551A ±1/2 MAX551B ±1 Guaranteed monotonic over temperature MAX551A ±1/2 MAX551B ±1 Gain Error Using internal feedback resistor (RFB) MAX551A ±1 MAX551B ±2 Gain Tempco (∆Gain/∆Temp) Using internal feedback resistor (RFB) (Note 2) Integral Nonlinearity INL Differential Nonlinearity DNL Power-Supply Rejection PSR ±0.2 ∆VDD = +5%, -10% LSB LSB LSB ±1 ppm/°C 2 ppm/% DYNAMIC PERFORMANCE (Note 3) TA = +25°C, to 1/2LSB, OUT load is 100Ω||13pF, DAC register alternately loaded with 1s and 0s 0.08 1 µs Digital-to-Analog Glitch VREF = 0V, OUT load is 100Ω||13pF, DAC register alternately loaded with 1s and 0s 0.65 20 nV-s AC Feedthrough at OUT VREF = 5Vp-p at 10kHz, DAC register loaded with all 0s 0.3 1 mVp-p VREF = 6VRMS at 1kHz, DAC register loaded with all 1s -85 10Hz to 100kHz, measured between RFB and OUT 13 Current Settling Time Total Harmonic Distortion Output Noise-Voltage Density 2 tS THD _______________________________________________________________________________________ dB 15 nV/√Hz +3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin µMAX Package (VDD = +4.5V to +5.25V, VREF = 5V, OUT = AGND = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX 11 15 UNITS REFERENCE INPUT Input Resistance RREF Measured between REF and OUT 7 Input Resistance Tempco Reference -3dB Bandwidth BW VOUT = 0.31Vp-p, RL = 50Ω, code = full-scale kΩ 6.5 ppm/°C 725 kHz ANALOG OUTPUT DAC register loaded with all 0s OUT Leakage Current OUT Capacitance COUT TA = +25°C ±0.15 TA = TMIN to TMAX ±5 ±25 Code = zero scale (Note 2) 14 20 Code = full scale (Note 2) 20 30 nA pF DIGITAL INPUTS Input High Voltage VIH Input Low Voltage VIL Input Hysteresis HYST Input Leakage Current IIN Input Capacitance CIN 2.4 V 0.8 LOAD, CLR, DIN, and SCLK, VDD = 5V CLR SCLK, LOAD, DIN 156 V CLR = VDD V mV ±1 V CLR = 0V 18 Inputs at 0V or VDD 100 µA ±1 Inputs at 0V or VDD (Note 2) 8 pF SWITCHING CHARACTERISTICS SCLK Pulse Width High tCH 25 ns SCLK Pulse Width Low tCL 25 ns DIN Data to SCLK Setup tDS 15 ns DIN Data to SCLK Hold tDH 15 ns LOAD Pulse Width tLD 20 ns LSB SCLK to LOAD tSL 0 ns LOAD High to SCLK tLC 15 ns CLR Pulse Width tCLR 20 ns Supply Voltage VDD 4.50 Supply Current IDD POWER SUPPLY 5.25 V All digital inputs at VIL or VIH, CLR = VDD 0.5 1.5 mA All digital inputs at 0V or VDD, CLR = VDD 0.4 5 µA _______________________________________________________________________________________ 3 MAX551/MAX552 ELECTRICAL CHARACTERISTICS—MAX551 (continued) MAX551/MAX552 +3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin µMAX Package ELECTRICAL CHARACTERISTICS —MAX552 (VDD = +2.7V to +3.6V, VREF = 2.5V, OUT = AGND = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE Resolution N 12 Bits MAX552A ±1/2 MAX552B ±1 Guaranteed monotonic over temperature MAX552A ±1/2 MAX552B ±1 Gain Error Using internal feedback resistor (RFB) MAX552A ±1 MAX552B ±2 Gain Tempco (∆Gain/∆Temp) Using internal feedback resistor (RFB) (Note 2) Integral Nonlinearity INL Differential Nonlinearity DNL Power-Supply Rejection PSR ±0.3 ∆VDD = +20%, -10% LSB LSB LSB ±1 ppm/°C 1 ppm/% DYNAMIC PERFORMANCE (Note 3) TA = +25°C, to 1/2LSB, OUT load is 100Ω||13pF, DAC register alternately loaded with 1s and 0s 0.12 1 µs Digital-to-Analog Glitch VREF = 0V, OUT load is 100Ω||13pF, DAC register alternately loaded with 1s and 0s 0.6 20 nV-s AC Feedthrough at OUT VREF = 3Vp-p at 10kHz, DAC register loaded with all 0s 0.2 0.6 mVp-p VREF = 6VRMS at 1kHz, DAC register loaded with all 1s -85 10Hz to 100kHz, measured between RFB and OUT 13 15 11 15 Current Settling Time Total Harmonic Distortion tS THD Output Noise-Voltage Density dB nV/√Hz REFERENCE INPUT Input Resistance RREF Measured between REF and OUT Input Resistance Tempco Reference -3dB Bandwidth BW VOUT = 0.31Vp-p, RL = 50Ω, code = full-scale 7 kΩ 7.5 ppm/°C 725 kHz ANALOG OUTPUT DAC register loaded with all 0s OUT Leakage Current OUT Capacitance 4 COUT TA = +25°C ±0.13 ±5 nA TA = TMIN to TMAX ±25 Code = zero code (Note 2) 14 20 Code = full scale (Note 2) 20 30 _______________________________________________________________________________________ pF +3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin µMAX Package (VDD = +2.7V to +3.6V, VREF = 2.5V, VOUT = AGND = GND, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DIGITAL INPUTS Input High Voltage VIH Input Low Voltage 2.1 V VIL Input Hysteresis HYST Input Leakage Current IIN 0.6 LOAD, CLR, DIN, and SCLK, VDD = 3V CLR SCLK, LOAD, DIN Input Capacitance CIN 135 V CLR = VDD V mV ±1 V CLR = 0V 12 Inputs at 0V or VDD 75 µA ±1 Inputs at 0V or VDD (Note 2) 8 pF SWITCHING CHARACTERISTICS SCLK Pulse Width High tCH 40 ns SCLK Pulse Width Low tCL 40 ns DIN Data to SCLK Setup tDS 15 ns DIN Data to SCLK Hold tDH 15 ns LOAD Pulse Width tLD 30 ns LSB SCLK to LOAD tSL 0 ns LOAD High to SCLK tLC 15 ns CLR Pulse Width tCLR 30 ns Supply Voltage VDD 2.7 Supply Current IDD POWER SUPPLY 3.6 V All digital inputs at VIL or VIH, CLR = VDD 0.1 0.5 mA All digital inputs at 0V or VDD, CLR = VDD 0.07 5 µA Note 1: AGND and CLR are for µMAX only. Note 2: Guaranteed by design. Not subject to production testing. Note 3: Parametric limits are provided for design guidance, and are not production tested. _______________________________________________________________________________________ 5 MAX551/MAX552 ELECTRICAL CHARACTERISTICS —MAX552 (continued) __________________________________________Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) -60 0.3 0.2 0.6 VDD = 5.0V 0.4 -0.3 -0.4 0 0.001 0.01 1 2 3 4 5 4.7 4.9 5.0 5.1 REFERENCE VOLTAGE (V) MAX551 DNL vs. REFERENCE VOLTAGE MAX552 INL vs. REFERENCE VOLTAGE MAX552 DNL vs. REFERENCE VOLTAGE 0.2 0 0.1 0.3 0.2 0 0.1 0 -0.1 -0.1 -0.2 -0.2 -0.2 -0.3 -0.3 -0.3 -0.4 -0.4 -0.4 -0.5 -0.5 4.8 4.9 5.0 5.1 5.2 -0.5 2.2 5.3 2.3 2.4 2.5 2.6 2.7 2.8 GAIN (dB) 2.5 2.6 -1 -2 -3 -4 -5 -50 REFERENCE AC FEEDTHROUGH (dB) MAX551 OR MAX552 VREF = 0.31Vp-p, RL = 50Ω INPUT CODE = ALL 1s OUTPUT AMPLIFIER = MAX4166 2.4 REFERENCE AC FEEDTHROUGH vs. FREQUENCY MAX551/552 toc2 3 0 2.3 REFERENCE VOLTAGE (V) MULTIPLYING FREQUENCY RESPONSE 1 2.2 REFERENCE VOLTAGE (V) REFERENCE VOLTAGE (V) 2 -0.1 MAX4551/552 TOC1 INL (LSB) 0.1 MAX551 OR MAX552 VREF = 0.31Vp-p, RL = 50Ω INPUT CODE = ALL 0s OUTPUT AMPLIFIER = MAX4166 -60 -70 -80 -90 -6 -100 -7 0.01 0.1 1 FREQUENCY (MHz) 5.3 MAX551/MAX552 TOC3A 0.3 VDD = 3.6V 0.4 DNL (LSB) 0.2 VDD = 3.6V 0.4 0.5 MAX551/MAX5452 TOC4A 0.5 MAX551/MAX552 TOC2A 0.3 6 5.2 LOGIC INPUT VOLTAGE, VIN (V) VDD = 5.25V 4.7 4.8 FREQUENCY (MHz) 0.5 0.4 -0.5 0 1 0.1 0 -0.2 VDD = 3.3V VDD = 2.7V -100 0.1 -0.1 0.2 -80 VDD = 5.25V 0.4 INL (LSB) -40 0.5 MAX551/552 toc4 VIN AT DIN, SCLK, & LOAD CLR = VDD 0.8 SUPPLY CURRENT (mA) THD + N (dB) 1.0 MAX551/552 toc3 OUTPUT AMPLIFIER = MAX4166 1st 5 HARMONICS VREF = 0.42Vp-p, RL = 50Ω INPUT CODE = ALL 1s -20 MAX551 INL vs. REFERENCE VOLTAGE SUPPLY CURRENT vs. LOGIC INPUT VOLTAGE MAX551/MAX552 TOC1A MAX551 TOTAL HARMONIC DISTORTION vs. FREQUENCY 0 DNL (LSB) MAX551/MAX552 +3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin µMAX Package 10 0.01 0.1 FREQUENCY (MHz) _______________________________________________________________________________________ 1 2.7 2.8 +3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin µMAX Package PIN NAME FUNCTION DIP µMAX 1 1 OUT — 2 AGND 2 3 GND Digital Ground. Also Analog Ground for DIP package. 3 4 VDD Supply Voltage 4 5 LOAD 5 6 DIN 6 7 SCLK — 8 CLR Clear DAC Input. Clears the DAC register. Tie to VDD or float if not used. 7 9 REF Reference Input 8 10 RFB Feedback Resistor DAC Current Output Analog Ground Active-Low Load DAC Input. Driving this asynchronous input low transfers the contents of the input register to the DAC register. Serial-Data Input Serial-Clock Input. The serial input data is clocked in on SCLK’s rising edge. R R R R VREF 2R 2R 2R 2R 2R 2R RFB* RFB OUT AGND D11 (MSB) D10 D9 D1 DO (LSB) RFB* = R Figure 1. MAX551/MAX552 Simplified Circuit _______________________________________________________________________________________ 7 MAX551/MAX552 ______________________________________________________________Pin Description MAX551/MAX552 +3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin µMAX Package DIN BIT 11 MSB BIT 10 BIT 0 LSB BIT 1 tDH tDS 1 2 tCH 11 tCL SCLK LOAD SERIAL DATA INTO INPUT REGISTER tLC tSL tLD LOAD CLR tCLR Figure 2. Write-Cycle Timing Diagram Detailed Description The MAX551/MAX552 digital-to-analog converter (DAC) circuits consist of a laser-trimmed, thin-film R-2R resistor array with NMOS current switches (Figure 1). Binary-weighted currents are switched to either OUT or AGND, depending on the status of each input data bit. Although the currents at OUT and AGND depend on the digital input code, the sum of the two output currents is always equal to the input current at REF. The output current (IOUT) can be converted into a voltage by adding an external output amplifier (Figure 3). The REF input accepts a wide range of signals, including fixed and time-varying voltage or current inputs. If a current source is used at the reference input, use a low-tempco, external feedback resistor in place of the Table 1. Unipolar Binary-Code Table for Circuit of Figure 3 MSB 1111 DIGITAL INPUT LSB 1111 1111 1000 0000 0000 0000 0000 0001 0000 0000 0000 internal feedback resistor (RFB) to minimize gain variation with temperature. The internal feedback resistor (RFB) is compensated with an NMOS switch that matches the NMOS switches used in the R-2R array, resulting in excellent supply rejection and gain-temperature coefficient. The OUT pin output capacitance (C OUT ) is code dependent. COUT is typically 14pF at 000hex and 20pF at FFFhex. Serial Interface The MAX551/MAX552 serial interface is compatible with the SPI/QSPI and Microwire serial-interface standards. These devices accept serial clocks up to 12.5MHz (50% duty cycle). If the SCLK input is not +5V (+3V) VREF R1 100Ω REF ANALOG OUTPUT 4095 − VREF 4096 2048 VREF −VREF = − 2 4096 1 − VREF 4096 0 VDD R2 50Ω DIN RFB SCLK MAX551 OUT MAX552 LOAD GND C1 15pF 2 6 3 AGND ( ) ARE FOR MAX552 Figure 3. Unipolar Operation 8 _______________________________________________________________________________________ VOUT +3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin µMAX Package MAX551/MAX552 R4 20k R2 50Ω +5V (+3V) RFB VDD OUT VREF REF R1 100Ω SCLK MAX551 MAX552 LOAD R5 20k C1 33pF R3 10k AGND GND DIN VOUT ( ) ARE FOR MAX552 Figure 4. Bipolar Operation Table 2. Offset Binary-Code Table for Circuit of Figure 4 MSB DIGITAL INPUT LSB ANALOG OUTPUT 1111 1111 1111 2047 + VREF 2048 1000 0000 0001 1 + VREF 2048 1000 0000 0000 0111 1111 1111 0000 0000 0000 0 1 − VREF 2048 2048 − VREF 2048 symmetrical, then the clock signal used must meet the t CH and t CL requirements given in the Electrical Characteristics. Figure 2 shows the MAX551/MAX552 timing diagram. The most significant bit (MSB) is always loaded first on SCLK’s rising edge. When all data is shifted into the input register, the DAC register is loaded by driving the LOAD signal low. The DAC register is transparent when LOAD is low and latched when LOAD is high. The MAX551/MAX552 digital inputs are compatible with CMOS logic levels. The MAX551’s inputs are also compatible with TTL logic. Unipolar Operation Figure 3 shows the MAX551/MAX552’s basic application. This circuit is used for unipolar operation or 2quadrant multiplication. The code table for this mode is given in Table 1. Note that the output’s polarity is the opposite of the reference voltage polarity. In many applications the gain accuracy is sufficient and gain adjustment is not necessary. In these cases, resistors R1 and R2 in Figure 3 can be omitted. If the gain is trimmed and the DAC is operated over a wide temperature range, use low-tempco (<300ppm/°C) resistors for R1 and R2. Capacitor C1 provides phase compensation and reduces overshoot and ringing when fast amplifiers are used at the DAC’s output. Bipolar Operation Figure 4 shows the MAX551/MAX552 operating in bipolar (or 4-quadrant multiplying) mode. Matched resistors R3, R4, and R5 must be of the same material (preferably metal film or wire-wound) for good temperaturetracking characteristics (<15ppm/°C) and should match to 0.01% for 12-bit performance. The output code is offset binary, as listed in Table 2. To adjust the circuit, load the DAC with a code of 1000 0000 0000 and trim R1 for a 0V output. With R1 and R2 omitted, an alternative zero trim is needed to adjust the ratio of R3 and R4 for 0V out. Trim full scale by loading the DAC with all 0s or 1s and adjusting the VREF amplitude or varying R5 until the desired positive or negative output is obtained. In applications where gain trim is not required, omit resistors R1 and R2. If gain trim is desired and the DAC is operated over a wide tempera- _______________________________________________________________________________________ 9 MAX551/MAX552 +3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin µMAX Package ture range, then low-tempco (<300ppm/°C) resistors should be used. __________Applications Information +5V Output Amplifier For best linearity, terminate OUT and GND at exactly 0V. In most applications, OUT is connected to an inverting op amp’s summing junction. The amplifier’s input offset voltage can degrade the DAC’s linearity by causing OUT to be terminated to a nonzero voltage. The resulting error is: REFERENCE VOLTAGE VDD OUT REF VOUT MAX551 GND DIN SCLK LOAD Error Voltage = VOS (1 + RFB / RO) Figure 5. Single-Supply, Voltage Mode Operation where V OS = is the op amp’s offset and R O is the DAC’s output resistance, which is code dependent. The maximum error voltage (Ro = RFB) is 2VOS; the minimum error voltage (RO= ∞) is VOS. To minimize this error, use a low-offset amplifier such as the MAX4166 (unipolar output) or the MAX427 (bipolar output). Otherwise, the amplifier offset must be trimmed to zero. A good guide rule is that VOS should be no more than 1/10LSB. The output amplifier’s input bias current (IB) can also limit performance, since IB x RFB generates an offset error. Choose an op amp with an I B much less than (e.g., one-tenth) the DAC’s 1LSB output current (typically 111nA when VREF = 5V, and 55.5nA when VREF = 2.5V). Offset and linearity can also be impaired if the output amplifier’s noninverting input is grounded through a bias-current compensation resistor. This resistor adds to the offset at this pin and thus should not be used. For best performance, connect the noninverting input directly to ground. In static or DC applications, the output amplifier’s characteristics are not critical. In higher speed applications in which either the reference input is an AC signal or the DAC output must quickly settle to a new programmed value, the output op amp’s AC parameters must be considered. A compensation capacitor, C1, may be required when the DAC is used with a high-speed output amplifier. The purpose of the capacitor is to cancel the pole formed by the DAC output capacitance, COUT, and the 10 internal feedback resistor, RFB. Its value depends on the type of op amp used but typically ranges from 14pF to 30pF. Too small a value causes output ringing, while excess capacitance overdamps the output. C1’s size can be minimized and the output voltage settling time improved by keeping the circuit-board trace short and stray capacitance at OUT as low as possible. Single-Supply Operation Reference Voltage The MAX551/MAX552 are true 4-quadrant DACs, making them ideal for multiplying applications. The reference input accepts both AC and DC signals within a voltage range of ±6V. The R-2R ladder is implemented with thin-film resistors, enabling the use of unipolar or bipolar reference voltages with only a single power supply for the DAC. The voltage at the VREF input sets the DAC’s full-scale output voltage. If the reference is too noisy, it should be bypassed to GND (AGND on the 10-pin µMAX package) with a 0.1µF ceramic capacitor located as close to the REF pin as possible. Voltage Mode (MAX551) The MAX551 can be conveniently used in voltage mode, single-supply operation with OUT biased at any voltage between GND and V DD . OUT must not be allowed to go 0.3V lower than GND or 0.3V higher than VDD. Otherwise, internal diodes will turn on, causing a high current flow that could damage the device. ______________________________________________________________________________________ +3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin µMAX Package MAX551/MAX552 +5V (+3V) +5V (+3V) 10k C1 VDD REF DGND RFB MAX551 MAX552 OUT MAX4167 VOUT AC REFERENCE INPUT VDD AGND 10k MAX4166 REF OUT MAX551 MAX552 GND +1.43V TO +12.6V ( ) ARE FOR MAX552 MAX4167 Figure 7. Single-Supply AC Reference Input Circuit OUT 106M MAX6160 ADJ ( ) ARE FOR MAX552 Figure 6. Single-Supply, Current Mode Operation Figure 5 shows the MAX551 connected as a voltage output DAC. In this mode of operation, the OUT pin is connected to the reference-voltage source, and the GND pin is connected to the PCB ground plane. The DAC output now appears at the REF pin, which has a constant resistance equal to the reference input resistance (11kΩ typ). This output should be buffered with an op amp when a lower output impedance is required. The RFB pin is not used in this mode. The reference input (OUT) impedance is code dependent, and the circuit’s response time depends on the reference source’s behavior with changing load conditions. An advantage of voltage mode operation is that a negative reference is not required for a positive output. Note that the reference input (OUT) must always be positive and is limited to no more than 2V when VDD is 5V. The unipolar and bipolar circuits in Figures 3 and 4 can be converted to voltage mode. Current Mode Figure 6 shows the MAX551/MAX552 in a current output configuration in which the output amplifier is powered from a single supply, and AGND is biased to 1.23V. With 0V applied to the REF input, the output can be programmed from 1.23V (zero code) to 2.46V (full scale). With 2.45V applied to REF, the output can be programmed from 1.23V (zero code) to 0.01V (full scale). The MAX4166 op amp that drives AGND maintains the 1.23V bias as AGND’s impedance changes with the DAC’s digital code, from high impedance (zero code) to 7kΩ minimum (full scale). Using an AC Reference In applications where reference voltage has AC signal components, the MAX551/MAX552 have multiplying capability within the reference input range of ±6V. If the DAC and the output amplifier are operated with a single supply voltage, then an AC reference input can be offset with the circuit shown in Figure 7 to prevent the DAC output voltage from exceeding the output amplifier’s negative output rail. The reference input’s typical -3dB bandwidth is greater than 700kHz, as shown in the Typical Operating Characteristics graphs. Offsetting AGND The MAX551/MAX552 provide separate AGND and GND inputs in the µMAX package. With this package, AGND can be biased above GND to provide an arbitrary nonzero output voltage for a “0” input code (Figure 8). Layout, Grounding, and Bypassing Bypass VDD with a 0.1µF capacitor, located as close to VDD and GND as possible. The ground pins (AGND and GND) should be connected in a star configuration to the highest quality ground available, which should be located as close to the MAX551/MAX552 as possible. Since OUT and the output amplifier’s noninverting input are sensitive to offset voltage, nodes that are to be ______________________________________________________________________________________ 11 MAX551/MAX552 +3V/+5V, 12-Bit, Serial, Multiplying DACs in 10-Pin µMAX Package VIN VDD REF AGND VBIAS GND OUT MAX551 MAX552 tice, connect active inputs to VDD or GND through highvalue resistors (1MΩ) to prevent static charge accumulation if the pins are left floating, such as when a circuit card is left unconnected. The CLR input on the µMAX device has an internal pullup resistor with a typical value of 125kΩ. If the CLR input is not used, tie it to VDD to minimize supply current. _Ordering Information (continued) Figure 8. AGND Bias Current grounded should be connected directly to a singlepoint ground through a separate, low-resistance (less than 0.2Ω) connection. The current at OUT and AGND varies with input code, creating a code-dependent error if these terminals are connected to ground (or virtual ground) through a resistive path. Parasitic coupling of the signal from REF to OUT is an error source in dynamic applications. This coupling is normally a function of board layout and pin-to-pin package capacitance. Minimize digital feedthrough with guard traces between digital inputs, REF, and OUT pins. The MAX551/MAX552 have high-impedance digital inputs. To minimize noise pick-up, tie them to either VDD or GND when they are not in use. As a good prac- PINPACKAGE LINEARITY (LSB) PART TEMP. RANGE MAX552ACPA 0°C to +70°C 8 Plastic DIP ±1/2 MAX552BCPA MAX552ACUB MAX552BCUB 0°C to +70°C 0°C to +70°C 0°C to +70°C 8 Plastic DIP 10 µMAX 10 µMAX ±1 ±1/2 ±1 MAX552AEPA MAX552BEPA MAX552AEUB MAX552BEUB -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C 8 Plastic DIP 8 Plastic DIP 10 µMAX 10 µMAX ±1/2 ±1 ±1/2 ±1 ___________________Chip Information TRANSISTOR COUNT: 887 SUBSTRATE CONNECTED TO VDD Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ___________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 1997 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.